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9633 cxgbe should not reinvent the bool
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--- old/usr/src/uts/common/io/cxgbe/t4nex/osdep.h
+++ new/usr/src/uts/common/io/cxgbe/t4nex/osdep.h
1 1 /*
2 2 * This file and its contents are supplied under the terms of the
3 3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 4 * You may only use this file in accordance with the terms of version
5 5 * 1.0 of the CDDL.
6 6 *
7 7 * A full copy of the text of the CDDL should have accompanied this
8 8 * source. A copy of the CDDL is also available via the Internet at
9 9 * http://www.illumos.org/license/CDDL.
10 10 */
11 11
12 12 /*
13 13 * This file is part of the Chelsio T4 support code.
14 14 *
15 15 * Copyright (C) 2010-2013 Chelsio Communications. All rights reserved.
16 16 *
17 17 * This program is distributed in the hope that it will be useful, but WITHOUT
18 18 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 19 * FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this
20 20 * release for licensing terms and conditions.
21 21 */
22 22
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23 23 #ifndef __CXGBE_OSDEP_H
24 24 #define __CXGBE_OSDEP_H
25 25
26 26 #include <sys/ddi.h>
27 27 #include <sys/sunddi.h>
28 28 #include <sys/byteorder.h>
29 29 #include <sys/cmn_err.h>
30 30 #include <sys/pcie.h>
31 31 #include <sys/sysmacros.h>
32 32 #include <sys/inttypes.h>
33 +#include <sys/stdbool.h>
33 34
34 35 /* sys/user.h defines u, and that bothers us. */
35 36 #undef u
36 37
37 38 #define isdigit(x) ((x) >= '0' && (x) <= '9')
38 39 #define isspace(x) ((x) == ' ' || (x) == '\t')
39 40 #define toupper(x) (((x) >= 'a' && (x) <= 'z') ? (x) - 'a' + 'A' : (x))
40 41 #define fls(x) ddi_fls(x)
41 42
42 43 #define CH_ERR(sc, ...) cxgb_printf(sc->dip, CE_WARN, ##__VA_ARGS__)
43 44 #define CH_WARN(sc, ...) cxgb_printf(sc->dip, CE_WARN, ##__VA_ARGS__)
44 45 #define CH_WARN_RATELIMIT(sc, ...) cxgb_printf(sc->dip, CE_WARN, ##__VA_ARGS__)
45 46 #define CH_ALERT(sc, ...) cxgb_printf(sc->dip, CE_NOTE, ##__VA_ARGS__)
46 47 #define CH_INFO(sc, ...) cxgb_printf(sc->dip, CE_NOTE, ##__VA_ARGS__)
47 48
48 49 #define CH_MSG(sc, level, category, fmt, ...)
49 50 #ifdef DEBUG
50 51 #define CH_DBG(sc, category, fmt, ...) cxgb_printf(sc->dip, CE_NOTE, ##__VA_ARGS__)
51 52 #else
52 53 #define CH_DBG(sc, category, fmt, ...)
53 54 #endif
54 55 #define CH_DUMP_MBOX(adap, mbox, data_reg, size)
55 56
56 57 #define MII_BMCR 0x00
57 58 #define MII_BMSR 0x01
58 59 #define MII_PHYSID1 0x02
59 60 #define MII_PHYSID2 0x03
60 61 #define MII_ADVERTISE 0x04
61 62 #define MII_LPA 0x05
62 63 #define MII_EXPANSION 0x06
63 64 #define MII_CTRL1000 0x09
64 65 #define MII_DCOUNTER 0x12
65 66 #define MII_FCSCOUNTER 0x13
66 67 #define MII_NWAYTEST 0x14
67 68 #define MII_RERRCOUNTER 0x15
68 69 #define MII_SREVISION 0x16
69 70 #define MII_RESV1 0x17
70 71 #define MII_LBRERROR 0x18
71 72 #define MII_PHYADDR 0x19
72 73 #define MII_RESV2 0x1a
73 74 #define MII_TPISTATUS 0x1b
74 75 #define MII_NCONFIG 0x1c
75 76
76 77 #define BMCR_RESV 0x007f
77 78 #define BMCR_SPEED1000 0x0040
78 79 #define BMCR_CTST 0x0080
79 80 #define BMCR_FULLDPLX 0x0100
80 81 #define BMCR_ANRESTART 0x0200
81 82 #define BMCR_ISOLATE 0x0400
82 83 #define BMCR_PDOWN 0x0800
83 84 #define BMCR_ANENABLE 0x1000
84 85 #define BMCR_SPEED100 0x2000
85 86 #define BMCR_LOOPBACK 0x4000
86 87 #define BMCR_RESET 0x8000
87 88
88 89 #define BMSR_ERCAP 0x0001
89 90 #define BMSR_JCD 0x0002
90 91 #define BMSR_LSTATUS 0x0004
91 92 #define BMSR_ANEGCAPABLE 0x0008
92 93 #define BMSR_RFAULT 0x0010
93 94 #define BMSR_ANEGCOMPLETE 0x0020
94 95 #define BMSR_RESV 0x07c0
95 96 #define BMSR_10HALF 0x0800
96 97 #define BMSR_10FULL 0x1000
97 98 #define BMSR_100HALF 0x2000
98 99 #define BMSR_100FULL 0x4000
99 100 #define BMSR_100BASE4 0x8000
100 101
101 102 #define ADVERTISE_SLCT 0x001f
102 103 #define ADVERTISE_CSMA 0x0001
103 104 #define ADVERTISE_10HALF 0x0020
104 105 #define ADVERTISE_1000XFULL 0x0020
105 106 #define ADVERTISE_10FULL 0x0040
106 107 #define ADVERTISE_1000XHALF 0x0040
107 108 #define ADVERTISE_100HALF 0x0080
108 109 #define ADVERTISE_1000XPAUSE 0x0080
109 110 #define ADVERTISE_100FULL 0x0100
110 111 #define ADVERTISE_1000XPSE_ASYM 0x0100
111 112 #define ADVERTISE_100BASE4 0x0200
112 113 #define ADVERTISE_PAUSE_CAP 0x0400
113 114 #define ADVERTISE_PAUSE_ASYM 0x0800
114 115 #define ADVERTISE_RESV 0x1c00
115 116 #define ADVERTISE_RFAULT 0x2000
116 117 #define ADVERTISE_LPACK 0x4000
117 118 #define ADVERTISE_NPAGE 0x8000
118 119
119 120 #define ADVERTISE_1000FULL 0x0200
120 121 #define ADVERTISE_1000HALF 0x0100
121 122
122 123 #define PCI_VENDOR_ID 0x00
123 124 #define PCI_DEVICE_ID 0x02
124 125
125 126 #define PCI_BASE_ADDRESS_0 0x10
126 127 #define PCI_BASE_ADDRESS_1 0x14
127 128 #define PCI_BASE_ADDRESS_2 0x18
128 129 #define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL)
129 130
130 131 #define PCI_CAP_ID_EXP PCI_CAP_ID_PCI_E
131 132 #define PCI_EXP_DEVCTL PCIE_DEVCTL
132 133 #define PCI_EXP_DEVCTL_PAYLOAD PCIE_DEVCTL_MAX_PAYLOAD_MASK
133 134 #define PCI_EXP_DEVCTL_READRQ PCIE_DEVCTL_MAX_READ_REQ_MASK
134 135 #define PCI_EXP_LNKCTL PCIE_LINKCTL
135 136 #define PCI_EXP_LNKSTA PCIE_LINKSTS
136 137 #define PCI_EXP_LNKSTA_CLS PCIE_LINKSTS_SPEED_MASK
137 138 #define PCI_EXP_LNKSTA_NLW PCIE_LINKSTS_NEG_WIDTH_MASK
138 139 #define PCI_EXP_DEVCTL2 0x28
139 140
140 141 #define PCI_VPD_ADDR 2
141 142 #define PCI_VPD_ADDR_F 0x8000
142 143 #define PCI_VPD_DATA 4
143 144
144 145 #define __devinit
145 146 #ifndef ARRAY_SIZE
146 147 #define ARRAY_SIZE(x) (sizeof (x) / sizeof ((x)[0]))
147 148 #endif
148 149 #define DIV_ROUND_UP(x, y) howmany(x, y)
149 150
150 151 #define udelay(x) drv_usecwait(x)
151 152 #define msleep(x) delay(drv_usectohz(1000ULL * (x)))
152 153 #define mdelay(x) drv_usecwait(1000UL * (x))
153 154
154 155 #define le16_to_cpu(x) LE_16((uint16_t)(x))
155 156 #define le32_to_cpu(x) LE_32((uint32_t)(x))
156 157 #define le64_to_cpu(x) LE_64((uint64_t)(x))
157 158 #define cpu_to_le16(x) LE_16((uint16_t)(x))
158 159 #define cpu_to_le32(x) LE_32((uint32_t)(x))
159 160 #define cpu_to_le64(x) LE_64((uint64_t)(x))
160 161 #define be16_to_cpu(x) BE_16((uint16_t)(x))
161 162 #define be32_to_cpu(x) BE_32((uint32_t)(x))
162 163 #define be64_to_cpu(x) BE_64((uint64_t)(x))
163 164 #define cpu_to_be16(x) BE_16((uint16_t)(x))
164 165 #define cpu_to_be32(x) BE_32((uint32_t)(x))
165 166 #define cpu_to_be64(x) BE_64((uint64_t)(x))
166 167 #define swab32(x) BSWAP_32(x)
167 168
168 169 typedef uint8_t u8;
169 170 typedef uint16_t u16;
170 171 typedef uint32_t u32;
171 172 typedef uint64_t u64;
172 173
173 174 typedef uint8_t __u8;
174 175 typedef uint16_t __u16;
175 176 typedef uint32_t __u32;
176 177 typedef uint64_t __u64;
177 178 typedef uint8_t __be8;
178 179 typedef uint16_t __be16;
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179 180 typedef uint32_t __be32;
180 181 typedef uint64_t __be64;
181 182
182 183 typedef uint32_t __le32;
183 184
184 185 typedef int8_t s8;
185 186 typedef int16_t s16;
186 187 typedef int32_t s32;
187 188 typedef int64_t s64;
188 189
189 -typedef boolean_t bool;
190 -#define true B_TRUE
191 -#define false B_FALSE
192 -
193 190 #if defined(__sparc)
194 191 #define __BIG_ENDIAN_BITFIELD
195 192 #define PAGE_SIZE 8192
196 193 #define PAGE_SHIFT 13
197 194 #define CACHE_LINE 64
198 195 #else
199 196 #define __LITTLE_ENDIAN_BITFIELD
200 197 #define PAGE_SIZE 4096
201 198 #define PAGE_SHIFT 12
202 199 #define CACHE_LINE 32
203 200 #endif
204 201
205 202 #define SUPPORTED_10baseT_Half (1 << 0)
206 203 #define SUPPORTED_10baseT_Full (1 << 1)
207 204 #define SUPPORTED_100baseT_Half (1 << 2)
208 205 #define SUPPORTED_100baseT_Full (1 << 3)
209 206 #define SUPPORTED_1000baseT_Half (1 << 4)
210 207 #define SUPPORTED_1000baseT_Full (1 << 5)
211 208 #define SUPPORTED_Autoneg (1 << 6)
212 209 #define SUPPORTED_TP (1 << 7)
213 210 #define SUPPORTED_AUI (1 << 8)
214 211 #define SUPPORTED_MII (1 << 9)
215 212 #define SUPPORTED_FIBRE (1 << 10)
216 213 #define SUPPORTED_BNC (1 << 11)
217 214 #define SUPPORTED_10000baseT_Full (1 << 12)
218 215 #define SUPPORTED_Pause (1 << 13)
219 216 #define SUPPORTED_Asym_Pause (1 << 14)
220 217
221 218 #define ADVERTISED_10baseT_Half (1 << 0)
222 219 #define ADVERTISED_10baseT_Full (1 << 1)
223 220 #define ADVERTISED_100baseT_Half (1 << 2)
224 221 #define ADVERTISED_100baseT_Full (1 << 3)
225 222 #define ADVERTISED_1000baseT_Half (1 << 4)
226 223 #define ADVERTISED_1000baseT_Full (1 << 5)
227 224 #define ADVERTISED_Autoneg (1 << 6)
228 225 #define ADVERTISED_TP (1 << 7)
229 226 #define ADVERTISED_AUI (1 << 8)
230 227 #define ADVERTISED_MII (1 << 9)
231 228 #define ADVERTISED_FIBRE (1 << 10)
232 229 #define ADVERTISED_BNC (1 << 11)
233 230 #define ADVERTISED_10000baseT_Full (1 << 12)
234 231 #define ADVERTISED_Pause (1 << 13)
235 232 #define ADVERTISED_Asym_Pause (1 << 14)
236 233
237 234 #define AUTONEG_DISABLE 0
238 235 #define AUTONEG_ENABLE 1
239 236 #define SPEED_10 10
240 237 #define SPEED_100 100
241 238 #define SPEED_1000 1000
242 239 #define SPEED_10000 10000
243 240 #define SPEED_40000 40000
244 241 #define DUPLEX_HALF 0
245 242 #define DUPLEX_FULL 1
246 243
247 244 #define ETH_ALEN 6
248 245 int ilog2(long x);
249 246 unsigned char *strstrip(unsigned char *s);
250 247
251 248 #endif /* __CXGBE_OSDEP_H */
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