1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
23 */
24
25 #ifndef _SYS_DDI_INTR_IMPL_H
26 #define _SYS_DDI_INTR_IMPL_H
27
28 /*
29 * Sun DDI interrupt implementation specific definitions
30 */
31
32 #include <sys/list.h>
33 #include <sys/ksynch.h>
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 #ifdef _KERNEL
40
41 /*
42 * Typedef for interrupt ops
43 */
44 typedef enum {
45 DDI_INTROP_SUPPORTED_TYPES = 1, /* 1 get supported interrupts types */
46 DDI_INTROP_NINTRS, /* 2 get num of interrupts supported */
47 DDI_INTROP_ALLOC, /* 3 allocate interrupt handle */
48 DDI_INTROP_GETPRI, /* 4 get priority */
49 DDI_INTROP_SETPRI, /* 5 set priority */
50 DDI_INTROP_ADDISR, /* 6 add interrupt handler */
51 DDI_INTROP_DUPVEC, /* 7 duplicate interrupt handler */
52 DDI_INTROP_ENABLE, /* 8 enable interrupt */
53 DDI_INTROP_BLOCKENABLE, /* 9 block enable interrupts */
54 DDI_INTROP_BLOCKDISABLE, /* 10 block disable interrupts */
55 DDI_INTROP_DISABLE, /* 11 disable interrupt */
56 DDI_INTROP_REMISR, /* 12 remove interrupt handler */
57 DDI_INTROP_FREE, /* 13 free interrupt handle */
58 DDI_INTROP_GETCAP, /* 14 get capacity */
59 DDI_INTROP_SETCAP, /* 15 set capacity */
60 DDI_INTROP_SETMASK, /* 16 set mask */
61 DDI_INTROP_CLRMASK, /* 17 clear mask */
62 DDI_INTROP_GETPENDING, /* 18 get pending interrupt */
63 DDI_INTROP_NAVAIL, /* 19 get num of available interrupts */
64 DDI_INTROP_GETPOOL, /* 20 get resource management pool */
65 DDI_INTROP_GETTARGET, /* 21 get target for a given intr(s) */
66 DDI_INTROP_SETTARGET /* 22 set target for a given intr(s) */
67 } ddi_intr_op_t;
68
69 /* Version number used in the handles */
70 #define DDI_INTR_VERSION_1 1
71 #define DDI_INTR_VERSION DDI_INTR_VERSION_1
72
73 /*
74 * One such data structure is allocated per ddi_intr_handle_t
75 * This is the incore copy of the regular interrupt info.
76 */
77 typedef struct ddi_intr_handle_impl {
78 dev_info_t *ih_dip; /* dip associated with handle */
79 uint16_t ih_type; /* interrupt type being used */
80 ushort_t ih_inum; /* interrupt number */
81 uint32_t ih_vector; /* vector number */
82 int ih_irq; /* irq number */
83 uint16_t ih_ver; /* Version */
84 uint_t ih_state; /* interrupt handle state */
85 uint_t ih_cap; /* interrupt capabilities */
86 uint_t ih_pri; /* priority - bus dependent */
87 krwlock_t ih_rwlock; /* read/write lock per handle */
88
89 uint_t (*ih_cb_func)(caddr_t, caddr_t);
90 void *ih_cb_arg1;
91 void *ih_cb_arg2;
92
93 /*
94 * The following 3 members are used to support MSI-X specific features
95 */
96 uint_t ih_flags; /* Misc flags */
97 uint_t ih_dup_cnt; /* # of dupped msi-x vectors */
98 struct ddi_intr_handle_impl *ih_main;
99 /* pntr to the main vector */
100 /*
101 * The next set of members are for 'scratch' purpose only.
102 * The DDI interrupt framework uses them internally and their
103 * interpretation is left to the framework. For now,
104 * scratch1 - used to send NINTRs information
105 * to various nexus drivers.
106 * scratch2 - used to send 'behavior' flag
107 * information to the nexus drivers
108 * from ddi_intr_alloc(). It is also
109 * used to send 'h_array' to the nexus drivers
110 * for ddi_intr_block_enable/disable() on x86.
111 * private - On X86 it usually carries a pointer to
112 * ihdl_plat_t. Not used on SPARC platforms.
113 */
114 void *ih_private; /* Platform specific data */
115 uint_t ih_scratch1; /* Scratch1: #interrupts */
116 void *ih_scratch2; /* Scratch2: flag/h_array */
117
118 /*
119 * The ih_target field may not reflect the actual target that is
120 * currently being used for the given interrupt. This field is just a
121 * snapshot taken either during ddi_intr_add_handler() or
122 * get/set_intr_affinity() calls.
123 */
124 processorid_t ih_target; /* Target ID */
125 } ddi_intr_handle_impl_t;
126
127 /* values for ih_state (strictly for interrupt handle) */
128 #define DDI_IHDL_STATE_ALLOC 0x01 /* Allocated. ddi_intr_alloc() called */
129 #define DDI_IHDL_STATE_ADDED 0x02 /* Added interrupt handler */
130 /* ddi_intr_add_handler() called */
131 #define DDI_IHDL_STATE_ENABLE 0x04 /* Enabled. ddi_intr_enable() called */
132
133 #define DDI_INTR_IS_MSI_OR_MSIX(type) \
134 ((type) == DDI_INTR_TYPE_MSI || (type) == DDI_INTR_TYPE_MSIX)
135
136 #define DDI_INTR_BEHAVIOR_FLAG_VALID(f) \
137 (((f) == DDI_INTR_ALLOC_NORMAL) || ((f) == DDI_INTR_ALLOC_STRICT))
138
139 #define DDI_INTR_TYPE_FLAG_VALID(t) \
140 (((t) == DDI_INTR_TYPE_FIXED) || \
141 ((t) == DDI_INTR_TYPE_MSI) || \
142 ((t) == DDI_INTR_TYPE_MSIX))
143
144 /* values for ih_flags */
145 #define DDI_INTR_MSIX_DUP 0x01 /* MSI-X vector which has been dupped */
146
147 /* Maximum number of MSI resources to allocate */
148 #define DDI_MAX_MSI_ALLOC 2
149
150 /* Default number of MSI-X resources to allocate */
151 #define DDI_DEFAULT_MSIX_ALLOC 2
152
153 #define DDI_MSIX_ALLOC_DIVIDER 32
154 #define DDI_MIN_MSIX_ALLOC 8
155 #define DDI_MAX_MSIX_ALLOC 2048
156
157 struct av_softinfo;
158
159 /*
160 * One such data structure is allocated per ddi_soft_intr_handle
161 * This is the incore copy of the softint info.
162 */
163 typedef struct ddi_softint_hdl_impl {
164 dev_info_t *ih_dip; /* dip associated with handle */
165 uint_t ih_pri; /* priority - bus dependent */
166 krwlock_t ih_rwlock; /* read/write lock per handle */
167 struct av_softinfo *ih_pending; /* whether softint is pending */
168
169 uint_t (*ih_cb_func)(caddr_t, caddr_t);
170 /* cb function for soft ints */
171 void *ih_cb_arg1; /* arg1 of callback function */
172 void *ih_cb_arg2; /* arg2 passed to "trigger" */
173
174 /*
175 * The next member is for 'scratch' purpose only.
176 * The DDI interrupt framework uses it internally and its
177 * interpretation is left to the framework.
178 * private - used by the DDI framework to pass back
179 * and forth 'softid' information on SPARC
180 * side only. Not used on X86 platform.
181 */
182 void *ih_private; /* Platform specific data */
183 } ddi_softint_hdl_impl_t;
184
185 /* Softint internal implementation defines */
186 #define DDI_SOFT_INTR_PRI_M 4
187 #define DDI_SOFT_INTR_PRI_H 6
188
189 /*
190 * One such data structure is allocated for MSI-X enabled
191 * device. If no MSI-X is enabled then it is NULL
192 */
193 typedef struct ddi_intr_msix {
194 /* MSI-X Table related information */
195 ddi_acc_handle_t msix_tbl_hdl; /* MSI-X table handle */
196 uint32_t *msix_tbl_addr; /* MSI-X table addr */
197 uint32_t msix_tbl_offset; /* MSI-X table offset */
198
199 /* MSI-X PBA Table related information */
200 ddi_acc_handle_t msix_pba_hdl; /* MSI-X PBA handle */
201 uint32_t *msix_pba_addr; /* MSI-X PBA addr */
202 uint32_t msix_pba_offset; /* MSI-X PBA offset */
203
204 ddi_device_acc_attr_t msix_dev_attr; /* MSI-X device attr */
205 } ddi_intr_msix_t;
206
207 /*
208 * Interrupt Resource Management (IRM).
209 */
210
211 #define DDI_IRM_POLICY_LARGE 1
212 #define DDI_IRM_POLICY_EVEN 2
213
214 #define DDI_IRM_POLICY_VALID(p) (((p) == DDI_IRM_POLICY_LARGE) || \
215 ((p) == DDI_IRM_POLICY_EVEN))
216
217 #define DDI_IRM_FLAG_ACTIVE 0x1 /* Pool is active */
218 #define DDI_IRM_FLAG_QUEUED 0x2 /* Pool is queued */
219 #define DDI_IRM_FLAG_WAITERS 0x4 /* Pool has waiters */
220 #define DDI_IRM_FLAG_EXIT 0x8 /* Balance thread must exit */
221 #define DDI_IRM_FLAG_NEW 0x10 /* Request is new */
222 #define DDI_IRM_FLAG_CALLBACK 0x20 /* Request has callback */
223
224 /*
225 * One such data structure for each supply of interrupt vectors.
226 * Contains information about the size and policies defining the
227 * supply, and a list of associated device-specific requests.
228 */
229 typedef struct ddi_irm_pool {
230 int ipool_flags; /* Status flags of the pool */
231 int ipool_types; /* Types of interrupts */
232 int ipool_policy; /* Rebalancing policy */
233 uint_t ipool_totsz; /* Total size of the pool */
234 uint_t ipool_defsz; /* Default allocation size */
235 uint_t ipool_minno; /* Minimum number consumed */
236 uint_t ipool_reqno; /* Total number requested */
237 uint_t ipool_resno; /* Total number reserved */
238 kmutex_t ipool_lock; /* Protects all pool usage */
239 kmutex_t ipool_navail_lock; /* Protects 'navail' of reqs */
240 kcondvar_t ipool_cv; /* Condition variable */
241 kthread_t *ipool_thread; /* Balancing thread */
242 dev_info_t *ipool_owner; /* Device that created pool */
243 list_t ipool_req_list; /* All requests in pool */
244 list_t ipool_scratch_list; /* Requests being reduced */
245 list_node_t ipool_link; /* Links in global pool list */
246 } ddi_irm_pool_t;
247
248 /*
249 * One such data structure for each dip's devinfo_intr_t.
250 * Contains information about vectors requested from IRM.
251 */
252 typedef struct ddi_irm_req {
253 int ireq_flags; /* Flags for request */
254 int ireq_type; /* Type requested */
255 uint_t ireq_nreq; /* Number requested */
256 uint_t ireq_navail; /* Number available */
257 uint_t ireq_scratch; /* Scratch value */
258 dev_info_t *ireq_dip; /* Requesting device */
259 ddi_irm_pool_t *ireq_pool_p; /* Supplying pool */
260 list_node_t ireq_link; /* Request list link */
261 list_node_t ireq_scratch_link; /* Scratch list link */
262 } ddi_irm_req_t;
263
264 /*
265 * This structure is used to pass parameters to ndi_create_irm(),
266 * and describes the operating parameters of an IRM pool.
267 */
268 typedef struct ddi_irm_params {
269 int iparams_types; /* Types of interrupts in pool */
270 uint_t iparams_total; /* Total size of the pool */
271 } ddi_irm_params_t;
272
273 /*
274 * One such data structure is allocated for each dip.
275 * It has interrupt related information that can be
276 * stored/retrieved for convenience.
277 */
278 typedef struct devinfo_intr {
279 /* These three fields show what the device is capable of */
280 uint_t devi_intr_sup_types; /* Intrs supported by device */
281
282 ddi_intr_msix_t *devi_msix_p; /* MSI-X info, if supported */
283
284 /* Next three fields show current status for the device */
285 uint_t devi_intr_curr_type; /* Interrupt type being used */
286 uint_t devi_intr_sup_nintrs; /* #intr supported */
287 uint_t devi_intr_curr_nintrs; /* #intr currently being used */
288 /*
289 * #intr currently being enabled
290 * (for MSI block enable, the valuse is either 1 or 0.)
291 */
292 uint_t devi_intr_curr_nenables;
293
294 ddi_intr_handle_t *devi_intr_handle_p; /* Hdl for legacy intr APIs */
295
296 #if defined(__i386) || defined(__amd64)
297 /* Save the PCI config space handle */
298 ddi_acc_handle_t devi_cfg_handle;
299 int devi_cap_ptr; /* MSI or MSI-X cap pointer */
300 #endif
301
302 ddi_irm_req_t *devi_irm_req_p; /* IRM request information */
303 } devinfo_intr_t;
304
305 #define NEXUS_HAS_INTR_OP(dip) \
306 ((DEVI(dip)->devi_ops->devo_bus_ops) && \
307 (DEVI(dip)->devi_ops->devo_bus_ops->busops_rev >= BUSO_REV_9) && \
308 (DEVI(dip)->devi_ops->devo_bus_ops->bus_intr_op))
309
310 int i_ddi_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t op,
311 ddi_intr_handle_impl_t *hdlp, void *result);
312
313 int i_ddi_add_softint(ddi_softint_hdl_impl_t *);
314 void i_ddi_remove_softint(ddi_softint_hdl_impl_t *);
315 int i_ddi_trigger_softint(ddi_softint_hdl_impl_t *, void *);
316 int i_ddi_set_softint_pri(ddi_softint_hdl_impl_t *, uint_t);
317
318 void i_ddi_intr_devi_init(dev_info_t *dip);
319 void i_ddi_intr_devi_fini(dev_info_t *dip);
320
321 uint_t i_ddi_intr_get_supported_types(dev_info_t *dip);
322 void i_ddi_intr_set_supported_types(dev_info_t *dip, int sup_type);
323 uint_t i_ddi_intr_get_current_type(dev_info_t *dip);
324 void i_ddi_intr_set_current_type(dev_info_t *dip, int intr_type);
325 uint_t i_ddi_intr_get_supported_nintrs(dev_info_t *dip, int intr_type);
326 void i_ddi_intr_set_supported_nintrs(dev_info_t *dip, int nintrs);
327 uint_t i_ddi_intr_get_current_nintrs(dev_info_t *dip);
328 void i_ddi_intr_set_current_nintrs(dev_info_t *dip, int nintrs);
329 uint_t i_ddi_intr_get_current_nenables(dev_info_t *dip);
330 void i_ddi_intr_set_current_nenables(dev_info_t *dip, int nintrs);
331 uint_t i_ddi_intr_get_current_navail(dev_info_t *dip, int intr_type);
332 uint_t i_ddi_intr_get_limit(dev_info_t *dip, int intr_type,
333 ddi_irm_pool_t *pool_p);
334
335 ddi_irm_pool_t *i_ddi_intr_get_pool(dev_info_t *dip, int intr_type);
336
337 void irm_init(void);
338 int i_ddi_irm_insert(dev_info_t *dip, int intr_type, int count);
339 int i_ddi_irm_modify(dev_info_t *dip, int nreq);
340 int i_ddi_irm_remove(dev_info_t *dip);
341 void i_ddi_irm_set_cb(dev_info_t *dip, boolean_t cb_flag);
342 int i_ddi_irm_supported(dev_info_t *dip, int type);
343
344 ddi_intr_handle_t i_ddi_get_intr_handle(dev_info_t *dip, int inum);
345 void i_ddi_set_intr_handle(dev_info_t *dip, int inum, ddi_intr_handle_t hdl);
346
347 ddi_intr_msix_t *i_ddi_get_msix(dev_info_t *dip);
348 void i_ddi_set_msix(dev_info_t *dip, ddi_intr_msix_t *msix_p);
349
350 #if defined(__i386) || defined(__amd64)
351 ddi_acc_handle_t i_ddi_get_pci_config_handle(dev_info_t *dip);
352 void i_ddi_set_pci_config_handle(dev_info_t *dip, ddi_acc_handle_t handle);
353 int i_ddi_get_msi_msix_cap_ptr(dev_info_t *dip);
354 void i_ddi_set_msi_msix_cap_ptr(dev_info_t *dip, int cap_ptr);
355 #endif
356
357 int32_t i_ddi_get_intr_weight(dev_info_t *);
358 int32_t i_ddi_set_intr_weight(dev_info_t *, int32_t);
359
360 void i_ddi_alloc_intr_phdl(ddi_intr_handle_impl_t *);
361 void i_ddi_free_intr_phdl(ddi_intr_handle_impl_t *);
362
363 extern int irm_enable; /* global flag for IRM */
364
365 #define DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, func, arg1, arg2) \
366 hdlp->ih_cb_func = func; \
367 hdlp->ih_cb_arg1 = arg1; \
368 hdlp->ih_cb_arg2 = arg2;
369
370 #ifdef DEBUG
371 #define I_DDI_VERIFY_MSIX_HANDLE(hdlp) \
372 if ((hdlp->ih_type == DDI_INTR_TYPE_MSIX) && \
373 (hdlp->ih_flags & DDI_INTR_MSIX_DUP)) { \
374 ASSERT(hdlp->ih_dip == hdlp->ih_main->ih_dip); \
375 ASSERT(hdlp->ih_type == hdlp->ih_main->ih_type); \
376 ASSERT(hdlp->ih_vector == hdlp->ih_main->ih_vector); \
377 ASSERT(hdlp->ih_ver == hdlp->ih_main->ih_ver); \
378 ASSERT(hdlp->ih_cap == hdlp->ih_main->ih_cap); \
379 ASSERT(hdlp->ih_pri == hdlp->ih_main->ih_pri); \
380 }
381 #else
382 #define I_DDI_VERIFY_MSIX_HANDLE(hdlp)
383 #endif
384
385 #else /* _KERNEL */
386
387 typedef struct devinfo_intr devinfo_intr_t;
388
389 #endif /* _KERNEL */
390
391 /*
392 * Used only by old DDI interrupt interfaces.
393 */
394
395 /*
396 * This structure represents one interrupt possible from the given
397 * device. It is used in an array for devices with multiple interrupts.
398 */
399 struct intrspec {
400 uint_t intrspec_pri; /* interrupt priority */
401 uint_t intrspec_vec; /* vector # (0 if none) */
402 uint_t (*intrspec_func)(); /* function to call for interrupt, */
403 /* If (uint_t (*)()) 0, none. */
404 /* If (uint_t (*)()) 1, then */
405 };
406
407 #ifdef _KERNEL
408
409 /*
410 * Figure out how many FIXED nintrs are supported
411 */
412 int i_ddi_get_intx_nintrs(dev_info_t *dip);
413
414 /*
415 * NOTE:
416 * The following 4 busops entry points are obsoleted with version
417 * 9 or greater. Use i_ddi_intr_op interface in place of these
418 * obsolete interfaces.
419 *
420 * Remove these busops entry points and all related data structures
421 * in future minor/major solaris release.
422 */
423 typedef enum {DDI_INTR_CTLOPS_NONE} ddi_intr_ctlop_t;
424
425 /*
426 * Interrupt get/set affinity functions
427 */
428 int get_intr_affinity(ddi_intr_handle_t h, processorid_t *tgt_p);
429 int set_intr_affinity(ddi_intr_handle_t h, processorid_t tgt);
430
431 /* The following are obsolete interfaces */
432 ddi_intrspec_t i_ddi_get_intrspec(dev_info_t *dip, dev_info_t *rdip,
433 uint_t inumber);
434
435 int i_ddi_add_intrspec(dev_info_t *dip, dev_info_t *rdip,
436 ddi_intrspec_t intrspec, ddi_iblock_cookie_t *iblock_cookiep,
437 ddi_idevice_cookie_t *idevice_cookiep,
438 uint_t (*int_handler)(caddr_t int_handler_arg),
439 caddr_t int_handler_arg, int kind);
440
441 void i_ddi_remove_intrspec(dev_info_t *dip, dev_info_t *rdip,
442 ddi_intrspec_t intrspec, ddi_iblock_cookie_t iblock_cookie);
443
444 int i_ddi_intr_ctlops(dev_info_t *dip, dev_info_t *rdip,
445 ddi_intr_ctlop_t op, void *arg, void *val);
446
447 #endif /* _KERNEL */
448
449 #ifdef __cplusplus
450 }
451 #endif
452
453 #endif /* _SYS_DDI_INTR_IMPL_H */