271 0x10, 0x0f, 0x08, 0x04, 0x02, 0x01
272 };
273
274 /* 2200 register offsets */
275 static reg_off_t reg_off_2200 = {
276 0x00, /* flash_address */
277 0x02, /* flash_data */
278 0x06, /* ctrl_status */
279 0x08, /* ictrl */
280 0x0a, /* istatus */
281 0x0c, /* semaphore */
282 0x0e, /* nvram */
283 0x18, /* req_in */
284 0x18, /* req_out */
285 0x1a, /* resp_in */
286 0x1a, /* resp_out */
287 0xff, /* risc2host - n/a */
288 24, /* Number of mailboxes */
289
290 /* Mailbox in register offsets 0 - 23 */
291 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
292 0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea, 0xec, 0xee,
293 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe,
294 /* 2200 does not have mailbox 24-31 - n/a */
295 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
296
297 /* Mailbox out register offsets 0 - 23 */
298 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
299 0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea, 0xec, 0xee,
300 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe,
301 /* 2200 does not have mailbox 24-31 - n/a */
302 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
303
304 0x96, /* fpm_diag_config */
305 0xa4, /* pcr */
306 0xb0, /* mctr */
307 0xb8, /* fb_cmd */
308 0xc0, /* hccr */
309 0xcc, /* gpiod */
310 0xce, /* gpioe */
311 0xff, /* host_to_host_sema - n/a */
312 0xff, /* pri_req_in - n/a */
313 0xff, /* pri_req_out - n/a */
314 0xff, /* atio_req_in - n/a */
315 0xff, /* atio_req_out - n/a */
316 0xff, /* io_base_addr - n/a */
317 0xff, /* nx_host_int - n/a */
318 0xff /* nx_risc_int - n/a */
319 };
320
321 /* 2300 register offsets */
322 static reg_off_t reg_off_2300 = {
323 0x00, /* flash_address */
324 0x02, /* flash_data */
325 0x06, /* ctrl_status */
326 0x08, /* ictrl */
327 0x0a, /* istatus */
328 0x0c, /* semaphore */
329 0x0e, /* nvram */
330 0x10, /* req_in */
331 0x12, /* req_out */
332 0x14, /* resp_in */
333 0x16, /* resp_out */
334 0x18, /* risc2host */
335 32, /* Number of mailboxes */
336
337 /* Mailbox in register offsets 0 - 31 */
338 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e,
339 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
340 0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e,
341 0x70, 0x72, 0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e,
342
343 /* Mailbox out register offsets 0 - 31 */
344 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e,
345 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
346 0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e,
347 0x70, 0x72, 0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e,
348
349 0x96, /* fpm_diag_config */
350 0xa4, /* pcr */
351 0xb0, /* mctr */
352 0x80, /* fb_cmd */
353 0xc0, /* hccr */
354 0xcc, /* gpiod */
355 0xce, /* gpioe */
356 0x1c, /* host_to_host_sema */
357 0xff, /* pri_req_in - n/a */
358 0xff, /* pri_req_out - n/a */
359 0xff, /* atio_req_in - n/a */
360 0xff, /* atio_req_out - n/a */
361 0xff, /* io_base_addr - n/a */
362 0xff, /* nx_host_int - n/a */
363 0xff /* nx_risc_int - n/a */
364 };
365
366 /* 2400/2500 register offsets */
367 reg_off_t reg_off_2400_2500 = {
368 0x00, /* flash_address */
369 0x04, /* flash_data */
370 0x08, /* ctrl_status */
371 0x0c, /* ictrl */
372 0x10, /* istatus */
373 0xff, /* semaphore - n/a */
374 0xff, /* nvram - n/a */
375 0x1c, /* req_in */
376 0x20, /* req_out */
377 0x24, /* resp_in */
378 0x28, /* resp_out */
379 0x44, /* risc2host */
380 32, /* Number of mailboxes */
381
382 /* Mailbox in register offsets 0 - 31 */
383 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e,
384 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9c, 0x9e,
385 0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae,
386 0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe,
387
388 /* Mailbox out register offsets 0 - 31 */
389 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e,
390 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9c, 0x9e,
391 0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae,
392 0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe,
393
394 0xff, /* fpm_diag_config - n/a */
395 0xff, /* pcr - n/a */
396 0xff, /* mctr - n/a */
397 0xff, /* fb_cmd - n/a */
398 0x48, /* hccr */
399 0x4c, /* gpiod */
400 0x50, /* gpioe */
401 0xff, /* host_to_host_sema - n/a */
402 0x2c, /* pri_req_in */
403 0x30, /* pri_req_out */
404 0x3c, /* atio_req_in */
405 0x40, /* atio_req_out */
406 0x54, /* io_base_addr */
407 0xff, /* nx_host_int - n/a */
408 0xff /* nx_risc_int - n/a */
409 };
410
411 /* P3 register offsets */
412 static reg_off_t reg_off_8021 = {
413 0x00, /* flash_address */
414 0x04, /* flash_data */
415 0x08, /* ctrl_status */
416 0x0c, /* ictrl */
417 0x10, /* istatus */
418 0xff, /* semaphore - n/a */
419 0xff, /* nvram - n/a */
420 0xff, /* req_in - n/a */
421 0x0, /* req_out */
422 0x100, /* resp_in */
423 0x200, /* resp_out */
424 0x500, /* risc2host */
425 32, /* Number of mailboxes */
426
427 /* Mailbox in register offsets 0 - 31 */
428 0x300, 0x302, 0x304, 0x306, 0x308, 0x30a, 0x30c, 0x30e,
429 0x310, 0x312, 0x314, 0x316, 0x318, 0x31a, 0x31c, 0x31e,
430 0x320, 0x322, 0x324, 0x326, 0x328, 0x32a, 0x32c, 0x32e,
431 0x330, 0x332, 0x334, 0x336, 0x338, 0x33a, 0x33c, 0x33e,
432
433 /* Mailbox out register offsets 0 - 31 */
434 0x400, 0x402, 0x404, 0x406, 0x408, 0x40a, 0x40c, 0x40e,
435 0x410, 0x412, 0x414, 0x416, 0x418, 0x41a, 0x41c, 0x41e,
436 0x420, 0x422, 0x424, 0x426, 0x428, 0x42a, 0x42c, 0x42e,
437 0x430, 0x432, 0x434, 0x436, 0x438, 0x43a, 0x43c, 0x43e,
438
439 0xff, /* fpm_diag_config - n/a */
440 0xff, /* pcr - n/a */
441 0xff, /* mctr - n/a */
442 0xff, /* fb_cmd - n/a */
443 0x48, /* hccr */
444 0x4c, /* gpiod */
445 0x50, /* gpioe */
446 0xff, /* host_to_host_sema - n/a */
447 0x2c, /* pri_req_in */
448 0x30, /* pri_req_out */
449 0x3c, /* atio_req_in */
450 0x40, /* atio_req_out */
451 0x54, /* io_base_addr */
452 0x380, /* nx_host_int */
453 0x504 /* nx_risc_int */
454 };
455
456 /* mutex for protecting variables shared by all instances of the driver */
457 kmutex_t ql_global_mutex;
552
553 /* ELS command code to text converter */
554 cmd_table_t els_cmd_tbl[] = ELS_CMD_TABLE();
555 /* Mailbox command code to text converter */
556 cmd_table_t mbox_cmd_tbl[] = MBOX_CMD_TABLE();
557
558 char qlc_driver_version[] = QL_VERSION;
559
560 /*
561 * Loadable Driver Interface Structures.
562 * Declare and initialize the module configuration section...
563 */
564 static struct modldrv modldrv = {
565 &mod_driverops, /* type of module: driver */
566 "SunFC Qlogic FCA v" QL_VERSION, /* name of module */
567 &ql_devops /* driver dev_ops */
568 };
569
570 static struct modlinkage modlinkage = {
571 MODREV_1,
572 &modldrv,
573 NULL
574 };
575
576 /* ************************************************************************ */
577 /* Loadable Module Routines. */
578 /* ************************************************************************ */
579
580 /*
581 * _init
582 * Initializes a loadable module. It is called before any other
583 * routine in a loadable module.
584 *
585 * Returns:
586 * 0 = success
587 *
588 * Context:
589 * Kernel context.
590 */
591 int
592 _init(void)
593 {
16346 * ql_setup_msi
16347 * Set up aif MSI interrupts
16348 *
16349 * Input:
16350 * ha = adapter state pointer.
16351 *
16352 * Returns:
16353 * DDI_SUCCESS or DDI_FAILURE.
16354 *
16355 * Context:
16356 * Kernel context.
16357 */
16358 static int
16359 ql_setup_msi(ql_adapter_state_t *ha)
16360 {
16361 int32_t count = 0;
16362 int32_t avail = 0;
16363 int32_t actual = 0;
16364 int32_t msitype = DDI_INTR_TYPE_MSI;
16365 int32_t ret;
16366 ql_ifunc_t itrfun[10] = {0};
16367
16368 QL_PRINT_3(CE_CONT, "(%d): started\n", ha->instance);
16369
16370 if (ql_disable_msi != 0) {
16371 EL(ha, "MSI is disabled by user\n");
16372 return (DDI_FAILURE);
16373 }
16374
16375 /* MSI support is only suported on 24xx HBA's. */
16376 if (!(CFG_IST(ha, CFG_CTRL_24258081))) {
16377 EL(ha, "HBA does not support MSI\n");
16378 return (DDI_FAILURE);
16379 }
16380
16381 /* Get number of MSI interrupts the system supports */
16382 if (((ret = ddi_intr_get_nintrs(ha->dip, msitype, &count)) !=
16383 DDI_SUCCESS) || count == 0) {
16384 EL(ha, "failed, nintrs ret=%xh, cnt=%xh\n", ret, count);
16385 return (DDI_FAILURE);
16386 }
16468 *
16469 * Input:
16470 * ha = adapter state pointer.
16471 *
16472 * Returns:
16473 * DDI_SUCCESS or DDI_FAILURE.
16474 *
16475 * Context:
16476 * Kernel context.
16477 */
16478 static int
16479 ql_setup_msix(ql_adapter_state_t *ha)
16480 {
16481 uint16_t hwvect;
16482 int32_t count = 0;
16483 int32_t avail = 0;
16484 int32_t actual = 0;
16485 int32_t msitype = DDI_INTR_TYPE_MSIX;
16486 int32_t ret;
16487 uint32_t i;
16488 ql_ifunc_t itrfun[QL_MSIX_MAXAIF] = {0};
16489
16490 QL_PRINT_3(CE_CONT, "(%d): started\n", ha->instance);
16491
16492 if (ql_disable_msix != 0) {
16493 EL(ha, "MSI-X is disabled by user\n");
16494 return (DDI_FAILURE);
16495 }
16496
16497 /*
16498 * MSI-X support is only available on 24xx HBA's that have
16499 * rev A2 parts (revid = 3) or greater.
16500 */
16501 if (!((ha->device_id == 0x2532) || (ha->device_id == 0x2432) ||
16502 (ha->device_id == 0x8432) || (ha->device_id == 0x8001) ||
16503 (ha->device_id == 0x8021))) {
16504 EL(ha, "HBA does not support MSI-X\n");
16505 return (DDI_FAILURE);
16506 }
16507
16508 if (CFG_IST(ha, CFG_CTRL_2422) && (ha->rev_id < 3)) {
|
271 0x10, 0x0f, 0x08, 0x04, 0x02, 0x01
272 };
273
274 /* 2200 register offsets */
275 static reg_off_t reg_off_2200 = {
276 0x00, /* flash_address */
277 0x02, /* flash_data */
278 0x06, /* ctrl_status */
279 0x08, /* ictrl */
280 0x0a, /* istatus */
281 0x0c, /* semaphore */
282 0x0e, /* nvram */
283 0x18, /* req_in */
284 0x18, /* req_out */
285 0x1a, /* resp_in */
286 0x1a, /* resp_out */
287 0xff, /* risc2host - n/a */
288 24, /* Number of mailboxes */
289
290 /* Mailbox in register offsets 0 - 23 */
291 { 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
292 0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea, 0xec, 0xee,
293 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe,
294 /* 2200 does not have mailbox 24-31 - n/a */
295 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
296
297 /* Mailbox out register offsets 0 - 23 */
298 { 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
299 0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea, 0xec, 0xee,
300 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe,
301 /* 2200 does not have mailbox 24-31 - n/a */
302 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
303
304 0x96, /* fpm_diag_config */
305 0xa4, /* pcr */
306 0xb0, /* mctr */
307 0xb8, /* fb_cmd */
308 0xc0, /* hccr */
309 0xcc, /* gpiod */
310 0xce, /* gpioe */
311 0xff, /* host_to_host_sema - n/a */
312 0xff, /* pri_req_in - n/a */
313 0xff, /* pri_req_out - n/a */
314 0xff, /* atio_req_in - n/a */
315 0xff, /* atio_req_out - n/a */
316 0xff, /* io_base_addr - n/a */
317 0xff, /* nx_host_int - n/a */
318 0xff /* nx_risc_int - n/a */
319 };
320
321 /* 2300 register offsets */
322 static reg_off_t reg_off_2300 = {
323 0x00, /* flash_address */
324 0x02, /* flash_data */
325 0x06, /* ctrl_status */
326 0x08, /* ictrl */
327 0x0a, /* istatus */
328 0x0c, /* semaphore */
329 0x0e, /* nvram */
330 0x10, /* req_in */
331 0x12, /* req_out */
332 0x14, /* resp_in */
333 0x16, /* resp_out */
334 0x18, /* risc2host */
335 32, /* Number of mailboxes */
336
337 /* Mailbox in register offsets 0 - 31 */
338 { 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e,
339 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
340 0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e,
341 0x70, 0x72, 0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e },
342
343 /* Mailbox out register offsets 0 - 31 */
344 { 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e,
345 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
346 0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e,
347 0x70, 0x72, 0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e },
348
349 0x96, /* fpm_diag_config */
350 0xa4, /* pcr */
351 0xb0, /* mctr */
352 0x80, /* fb_cmd */
353 0xc0, /* hccr */
354 0xcc, /* gpiod */
355 0xce, /* gpioe */
356 0x1c, /* host_to_host_sema */
357 0xff, /* pri_req_in - n/a */
358 0xff, /* pri_req_out - n/a */
359 0xff, /* atio_req_in - n/a */
360 0xff, /* atio_req_out - n/a */
361 0xff, /* io_base_addr - n/a */
362 0xff, /* nx_host_int - n/a */
363 0xff /* nx_risc_int - n/a */
364 };
365
366 /* 2400/2500 register offsets */
367 reg_off_t reg_off_2400_2500 = {
368 0x00, /* flash_address */
369 0x04, /* flash_data */
370 0x08, /* ctrl_status */
371 0x0c, /* ictrl */
372 0x10, /* istatus */
373 0xff, /* semaphore - n/a */
374 0xff, /* nvram - n/a */
375 0x1c, /* req_in */
376 0x20, /* req_out */
377 0x24, /* resp_in */
378 0x28, /* resp_out */
379 0x44, /* risc2host */
380 32, /* Number of mailboxes */
381
382 /* Mailbox in register offsets 0 - 31 */
383 { 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e,
384 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9c, 0x9e,
385 0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae,
386 0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe },
387
388 /* Mailbox out register offsets 0 - 31 */
389 { 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e,
390 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9c, 0x9e,
391 0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae,
392 0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe },
393
394 0xff, /* fpm_diag_config - n/a */
395 0xff, /* pcr - n/a */
396 0xff, /* mctr - n/a */
397 0xff, /* fb_cmd - n/a */
398 0x48, /* hccr */
399 0x4c, /* gpiod */
400 0x50, /* gpioe */
401 0xff, /* host_to_host_sema - n/a */
402 0x2c, /* pri_req_in */
403 0x30, /* pri_req_out */
404 0x3c, /* atio_req_in */
405 0x40, /* atio_req_out */
406 0x54, /* io_base_addr */
407 0xff, /* nx_host_int - n/a */
408 0xff /* nx_risc_int - n/a */
409 };
410
411 /* P3 register offsets */
412 static reg_off_t reg_off_8021 = {
413 0x00, /* flash_address */
414 0x04, /* flash_data */
415 0x08, /* ctrl_status */
416 0x0c, /* ictrl */
417 0x10, /* istatus */
418 0xff, /* semaphore - n/a */
419 0xff, /* nvram - n/a */
420 0xff, /* req_in - n/a */
421 0x0, /* req_out */
422 0x100, /* resp_in */
423 0x200, /* resp_out */
424 0x500, /* risc2host */
425 32, /* Number of mailboxes */
426
427 /* Mailbox in register offsets 0 - 31 */
428 { 0x300, 0x302, 0x304, 0x306, 0x308, 0x30a, 0x30c, 0x30e,
429 0x310, 0x312, 0x314, 0x316, 0x318, 0x31a, 0x31c, 0x31e,
430 0x320, 0x322, 0x324, 0x326, 0x328, 0x32a, 0x32c, 0x32e,
431 0x330, 0x332, 0x334, 0x336, 0x338, 0x33a, 0x33c, 0x33e },
432
433 /* Mailbox out register offsets 0 - 31 */
434 { 0x400, 0x402, 0x404, 0x406, 0x408, 0x40a, 0x40c, 0x40e,
435 0x410, 0x412, 0x414, 0x416, 0x418, 0x41a, 0x41c, 0x41e,
436 0x420, 0x422, 0x424, 0x426, 0x428, 0x42a, 0x42c, 0x42e,
437 0x430, 0x432, 0x434, 0x436, 0x438, 0x43a, 0x43c, 0x43e },
438
439 0xff, /* fpm_diag_config - n/a */
440 0xff, /* pcr - n/a */
441 0xff, /* mctr - n/a */
442 0xff, /* fb_cmd - n/a */
443 0x48, /* hccr */
444 0x4c, /* gpiod */
445 0x50, /* gpioe */
446 0xff, /* host_to_host_sema - n/a */
447 0x2c, /* pri_req_in */
448 0x30, /* pri_req_out */
449 0x3c, /* atio_req_in */
450 0x40, /* atio_req_out */
451 0x54, /* io_base_addr */
452 0x380, /* nx_host_int */
453 0x504 /* nx_risc_int */
454 };
455
456 /* mutex for protecting variables shared by all instances of the driver */
457 kmutex_t ql_global_mutex;
552
553 /* ELS command code to text converter */
554 cmd_table_t els_cmd_tbl[] = ELS_CMD_TABLE();
555 /* Mailbox command code to text converter */
556 cmd_table_t mbox_cmd_tbl[] = MBOX_CMD_TABLE();
557
558 char qlc_driver_version[] = QL_VERSION;
559
560 /*
561 * Loadable Driver Interface Structures.
562 * Declare and initialize the module configuration section...
563 */
564 static struct modldrv modldrv = {
565 &mod_driverops, /* type of module: driver */
566 "SunFC Qlogic FCA v" QL_VERSION, /* name of module */
567 &ql_devops /* driver dev_ops */
568 };
569
570 static struct modlinkage modlinkage = {
571 MODREV_1,
572 { &modldrv, NULL }
573 };
574
575 /* ************************************************************************ */
576 /* Loadable Module Routines. */
577 /* ************************************************************************ */
578
579 /*
580 * _init
581 * Initializes a loadable module. It is called before any other
582 * routine in a loadable module.
583 *
584 * Returns:
585 * 0 = success
586 *
587 * Context:
588 * Kernel context.
589 */
590 int
591 _init(void)
592 {
16345 * ql_setup_msi
16346 * Set up aif MSI interrupts
16347 *
16348 * Input:
16349 * ha = adapter state pointer.
16350 *
16351 * Returns:
16352 * DDI_SUCCESS or DDI_FAILURE.
16353 *
16354 * Context:
16355 * Kernel context.
16356 */
16357 static int
16358 ql_setup_msi(ql_adapter_state_t *ha)
16359 {
16360 int32_t count = 0;
16361 int32_t avail = 0;
16362 int32_t actual = 0;
16363 int32_t msitype = DDI_INTR_TYPE_MSI;
16364 int32_t ret;
16365 ql_ifunc_t itrfun[10] = {{NULL}};
16366
16367 QL_PRINT_3(CE_CONT, "(%d): started\n", ha->instance);
16368
16369 if (ql_disable_msi != 0) {
16370 EL(ha, "MSI is disabled by user\n");
16371 return (DDI_FAILURE);
16372 }
16373
16374 /* MSI support is only suported on 24xx HBA's. */
16375 if (!(CFG_IST(ha, CFG_CTRL_24258081))) {
16376 EL(ha, "HBA does not support MSI\n");
16377 return (DDI_FAILURE);
16378 }
16379
16380 /* Get number of MSI interrupts the system supports */
16381 if (((ret = ddi_intr_get_nintrs(ha->dip, msitype, &count)) !=
16382 DDI_SUCCESS) || count == 0) {
16383 EL(ha, "failed, nintrs ret=%xh, cnt=%xh\n", ret, count);
16384 return (DDI_FAILURE);
16385 }
16467 *
16468 * Input:
16469 * ha = adapter state pointer.
16470 *
16471 * Returns:
16472 * DDI_SUCCESS or DDI_FAILURE.
16473 *
16474 * Context:
16475 * Kernel context.
16476 */
16477 static int
16478 ql_setup_msix(ql_adapter_state_t *ha)
16479 {
16480 uint16_t hwvect;
16481 int32_t count = 0;
16482 int32_t avail = 0;
16483 int32_t actual = 0;
16484 int32_t msitype = DDI_INTR_TYPE_MSIX;
16485 int32_t ret;
16486 uint32_t i;
16487 ql_ifunc_t itrfun[QL_MSIX_MAXAIF] = {{NULL}};
16488
16489 QL_PRINT_3(CE_CONT, "(%d): started\n", ha->instance);
16490
16491 if (ql_disable_msix != 0) {
16492 EL(ha, "MSI-X is disabled by user\n");
16493 return (DDI_FAILURE);
16494 }
16495
16496 /*
16497 * MSI-X support is only available on 24xx HBA's that have
16498 * rev A2 parts (revid = 3) or greater.
16499 */
16500 if (!((ha->device_id == 0x2532) || (ha->device_id == 0x2432) ||
16501 (ha->device_id == 0x8432) || (ha->device_id == 0x8001) ||
16502 (ha->device_id == 0x8021))) {
16503 EL(ha, "HBA does not support MSI-X\n");
16504 return (DDI_FAILURE);
16505 }
16506
16507 if (CFG_IST(ha, CFG_CTRL_2422) && (ha->rev_id < 3)) {
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