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7127 remove -Wno-missing-braces from Makefile.uts
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--- old/usr/src/uts/common/io/audio/drv/audio1575/audio1575.c
+++ new/usr/src/uts/common/io/audio/drv/audio1575/audio1575.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21 /*
22 22 * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
23 23 * Use is subject to license terms.
24 24 */
25 25
26 26
27 27 /*
28 28 * audio1575 Audio Driver
29 29 *
30 30 * The driver is primarily targeted at providing audio support for
31 31 * those systems which use the Uli M1575 audio core.
32 32 *
33 33 * The M1575 audio core, in AC'97 controller mode, has independent
34 34 * channels for PCM in, PCM out, mic in, modem in, and modem out.
35 35 *
36 36 * The AC'97 controller is a PCI bus master with scatter/gather
37 37 * support. Each channel has a DMA engine. Currently, we use only
38 38 * the PCM in and PCM out channels. Each DMA engine uses one buffer
39 39 * descriptor list. And the buffer descriptor list is an array of up
40 40 * to 32 entries, each of which describes a data buffer. Each entry
41 41 * contains a pointer to a data buffer, control bits, and the length
42 42 * of the buffer being pointed to, where the length is expressed as
43 43 * the number of samples. This, combined with the 16-bit sample size,
44 44 * gives the actual physical length of the buffer.
45 45 *
46 46 * NOTE:
47 47 * This driver depends on the drv/audio, misc/ac97
48 48 * modules being loaded first.
49 49 */
50 50
51 51 #include <sys/types.h>
52 52 #include <sys/modctl.h>
53 53 #include <sys/kmem.h>
54 54 #include <sys/conf.h>
55 55 #include <sys/ddi.h>
56 56 #include <sys/sunddi.h>
57 57 #include <sys/pci.h>
58 58 #include <sys/note.h>
59 59 #include <sys/audio/audio_driver.h>
60 60 #include <sys/audio/ac97.h>
61 61 #include "audio1575.h"
62 62
63 63 /*
64 64 * Module linkage routines for the kernel
65 65 */
66 66 static int audio1575_ddi_attach(dev_info_t *, ddi_attach_cmd_t);
67 67 static int audio1575_ddi_detach(dev_info_t *, ddi_detach_cmd_t);
68 68 static int audio1575_ddi_quiesce(dev_info_t *);
69 69
70 70 /*
71 71 * Entry point routine prototypes
72 72 */
73 73 static int audio1575_open(void *, int, unsigned *, caddr_t *);
74 74 static void audio1575_close(void *);
75 75 static int audio1575_start(void *);
76 76 static void audio1575_stop(void *);
77 77 static int audio1575_format(void *);
78 78 static int audio1575_channels(void *);
79 79 static int audio1575_rate(void *);
80 80 static uint64_t audio1575_count(void *);
81 81 static void audio1575_sync(void *, unsigned);
82 82
83 83 static audio_engine_ops_t audio1575_engine_ops = {
84 84 AUDIO_ENGINE_VERSION,
85 85 audio1575_open,
86 86 audio1575_close,
87 87 audio1575_start,
88 88 audio1575_stop,
89 89 audio1575_count,
90 90 audio1575_format,
91 91 audio1575_channels,
92 92 audio1575_rate,
93 93 audio1575_sync,
94 94 NULL,
95 95 NULL,
96 96 NULL
97 97 };
98 98
99 99 /*
100 100 * Local Routine Prototypes
101 101 */
102 102 static int audio1575_attach(dev_info_t *);
103 103 static int audio1575_resume(dev_info_t *);
104 104 static int audio1575_detach(dev_info_t *);
105 105 static int audio1575_suspend(dev_info_t *);
106 106
107 107 static int audio1575_alloc_port(audio1575_state_t *, int, uint8_t);
108 108 static void audio1575_free_port(audio1575_port_t *);
109 109
110 110 static int audio1575_codec_sync(audio1575_state_t *);
111 111 static void audio1575_write_ac97(void *, uint8_t, uint16_t);
112 112 static uint16_t audio1575_read_ac97(void *, uint8_t);
113 113 static int audio1575_chip_init(audio1575_state_t *);
114 114 static int audio1575_map_regs(audio1575_state_t *);
115 115 static void audio1575_unmap_regs(audio1575_state_t *);
116 116 static void audio1575_dma_stop(audio1575_state_t *, boolean_t);
117 117 static void audio1575_pci_enable(audio1575_state_t *);
118 118 static void audio1575_pci_disable(audio1575_state_t *);
119 119
120 120 static void audio1575_destroy(audio1575_state_t *);
121 121
122 122 /*
123 123 * Global variables, but used only by this file.
124 124 */
125 125
126 126 /*
127 127 * DDI Structures
128 128 */
129 129
130 130
131 131 /* Device operations structure */
132 132 static struct dev_ops audio1575_dev_ops = {
133 133 DEVO_REV, /* devo_rev */
134 134 0, /* devo_refcnt */
135 135 NULL, /* devo_getinfo */
136 136 nulldev, /* devo_identify - obsolete */
137 137 nulldev, /* devo_probe */
138 138 audio1575_ddi_attach, /* devo_attach */
139 139 audio1575_ddi_detach, /* devo_detach */
140 140 nodev, /* devo_reset */
141 141 NULL, /* devi_cb_ops */
142 142 NULL, /* devo_bus_ops */
143 143 NULL, /* devo_power */
144 144 audio1575_ddi_quiesce, /* devo_quiesce */
145 145 };
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146 146
147 147 /* Linkage structure for loadable drivers */
148 148 static struct modldrv audio1575_modldrv = {
149 149 &mod_driverops, /* drv_modops */
150 150 M1575_MOD_NAME, /* drv_linkinfo */
151 151 &audio1575_dev_ops, /* drv_dev_ops */
152 152 };
153 153
154 154 /* Module linkage structure */
155 155 static struct modlinkage audio1575_modlinkage = {
156 - MODREV_1, /* ml_rev */
157 - (void *)&audio1575_modldrv, /* ml_linkage */
158 - NULL /* NULL terminates the list */
156 + MODREV_1, /* ml_rev */
157 + { (void *)&audio1575_modldrv, NULL } /* ml_linkage */
159 158 };
160 159
161 160
162 161 /*
163 162 * device access attributes for register mapping
164 163 */
165 164 static struct ddi_device_acc_attr dev_attr = {
166 165 DDI_DEVICE_ATTR_V0,
167 166 DDI_STRUCTURE_LE_ACC,
168 167 DDI_STRICTORDER_ACC
169 168 };
170 169
171 170 static struct ddi_device_acc_attr buf_attr = {
172 171 DDI_DEVICE_ATTR_V0,
173 172 DDI_NEVERSWAP_ACC,
174 173 DDI_STRICTORDER_ACC
175 174 };
176 175
177 176 /*
178 177 * DMA attributes of buffer descriptor list
179 178 */
180 179 static ddi_dma_attr_t bdlist_dma_attr = {
181 180 DMA_ATTR_V0, /* version */
182 181 0x0000000000000000LL, /* dlim_addr_lo */
183 182 0x00000000ffffffffLL, /* dlim_addr_hi */
184 183 0x000000000000ffffLL, /* DMA counter register - 64 bits */
185 184 0x0000000000000008LL, /* DMA address align must be 8-bytes */
186 185 0x0000003c, /* 1 through 64 byte burst sizes */
187 186 0x00000008, /* min xfer DMA size BDList entry */
188 187 0x00000000000ffffLL, /* max xfer size, 64K */
189 188 0x000000000001fffLL, /* seg, set to PAGESIZE */
190 189 0x00000001, /* s/g list length, no s/g */
191 190 0x00000008, /* granularity of device minxfer */
192 191 0 /* DMA flags use virtual address */
193 192 };
194 193
195 194 /*
196 195 * DMA attributes of buffers to be used to receive/send audio data
197 196 */
198 197 static ddi_dma_attr_t sample_buf_dma_attr = {
199 198 DMA_ATTR_V0,
200 199 0x0000000000000000LL, /* dlim_addr_lo */
201 200 0x00000000ffffffffLL, /* dlim_addr_hi */
202 201 0x000000000001fffeLL, /* DMA counter register - 16 bits */
203 202 0x0000000000000004LL, /* DMA address align 2-byte boundary */
204 203 0x0000003c, /* 1 through 60 byte burst sizes */
205 204 0x00000004, /* min xfer DMA size BDList entry */
206 205 0x000000000001ffffLL, /* max xfer size, 64K */
207 206 0x000000000001ffffLL, /* seg, set to 64K */
208 207 0x00000001, /* s/g list length, no s/g */
209 208 0x00000004, /* granularity of device minxfer */
210 209 0 /* DMA flags use virtual address */
211 210 };
212 211
213 212 /*
214 213 * _init()
215 214 *
216 215 * Description:
217 216 * Driver initialization, called when driver is first loaded.
218 217 * This is how access is initially given to all the static structures.
219 218 *
220 219 * Arguments:
221 220 * None
222 221 *
223 222 * Returns:
224 223 * mod_install() status, see mod_install(9f)
225 224 */
226 225 int
227 226 _init(void)
228 227 {
229 228 int error;
230 229
231 230 audio_init_ops(&audio1575_dev_ops, M1575_NAME);
232 231
233 232 if ((error = mod_install(&audio1575_modlinkage)) != 0) {
234 233 audio_fini_ops(&audio1575_dev_ops);
235 234 }
236 235
237 236 return (error);
238 237 }
239 238
240 239 /*
241 240 * _fini()
242 241 *
243 242 * Description:
244 243 * Module de-initialization, called when the driver is to be unloaded.
245 244 *
246 245 * Arguments:
247 246 * None
248 247 *
249 248 * Returns:
250 249 * mod_remove() status, see mod_remove(9f)
251 250 */
252 251 int
253 252 _fini(void)
254 253 {
255 254 int error;
256 255
257 256 if ((error = mod_remove(&audio1575_modlinkage)) != 0) {
258 257 return (error);
259 258 }
260 259
261 260 /* clean up ops */
262 261 audio_fini_ops(&audio1575_dev_ops);
263 262
264 263 return (0);
265 264 }
266 265
267 266 /*
268 267 * _info()
269 268 *
270 269 * Description:
271 270 * Module information, returns information about the driver.
272 271 *
273 272 * Arguments:
274 273 * modinfo *modinfop Pointer to the opaque modinfo structure
275 274 *
276 275 * Returns:
277 276 * mod_info() status, see mod_info(9f)
278 277 */
279 278 int
280 279 _info(struct modinfo *modinfop)
281 280 {
282 281 return (mod_info(&audio1575_modlinkage, modinfop));
283 282 }
284 283
285 284
286 285 /* ******************* Driver Entry Points ********************************* */
287 286
288 287 /*
289 288 * audio1575_ddi_attach()
290 289 *
291 290 * Description:
292 291 * Implements the DDI attach(9e) entry point.
293 292 *
294 293 * Arguments:
295 294 * dev_info_t *dip Pointer to the device's dev_info struct
296 295 * ddi_attach_cmd_t cmd Attach command
297 296 *
298 297 * Returns:
299 298 * DDI_SUCCESS The driver was initialized properly
300 299 * DDI_FAILURE The driver couldn't be initialized properly
301 300 */
302 301 static int
303 302 audio1575_ddi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
304 303 {
305 304 switch (cmd) {
306 305 case DDI_ATTACH:
307 306 return (audio1575_attach(dip));
308 307
309 308 case DDI_RESUME:
310 309 return (audio1575_resume(dip));
311 310 }
312 311 return (DDI_FAILURE);
313 312 }
314 313
315 314 /*
316 315 * audio1575_ddi_detach()
317 316 *
318 317 * Description:
319 318 * Implements the detach(9e) entry point.
320 319 *
321 320 * Arguments:
322 321 * dev_info_t *dip Pointer to the device's dev_info struct
323 322 * ddi_detach_cmd_t cmd Detach command
324 323 *
325 324 * Returns:
326 325 * DDI_SUCCESS The driver was detached
327 326 * DDI_FAILURE The driver couldn't be detached
328 327 */
329 328 static int
330 329 audio1575_ddi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
331 330 {
332 331 switch (cmd) {
333 332 case DDI_DETACH:
334 333 return (audio1575_detach(dip));
335 334
336 335 case DDI_SUSPEND:
337 336 return (audio1575_suspend(dip));
338 337 }
339 338 return (DDI_FAILURE);
340 339 }
341 340
342 341 /*
343 342 * audio1575_ddi_quiesce()
344 343 *
345 344 * Description:
346 345 * Implements the quiesce(9e) entry point.
347 346 *
348 347 * Arguments:
349 348 * dev_info_t *dip Pointer to the device's dev_info struct
350 349 *
351 350 * Returns:
352 351 * DDI_SUCCESS The driver was quiesced
353 352 * DDI_FAILURE The driver couldn't be quiesced
354 353 */
355 354 static int
356 355 audio1575_ddi_quiesce(dev_info_t *dip)
357 356 {
358 357 audio1575_state_t *statep;
359 358
360 359 if ((statep = ddi_get_driver_private(dip)) == NULL)
361 360 return (DDI_FAILURE);
362 361
363 362 audio1575_dma_stop(statep, B_TRUE);
364 363 return (DDI_SUCCESS);
365 364 }
366 365
367 366 /*
368 367 * audio1575_open()
369 368 *
370 369 * Description:
371 370 * Opens a DMA engine for use.
372 371 *
373 372 * Arguments:
374 373 * void *arg The DMA engine to set up
375 374 * int flag Open flags
376 375 * unsigned *nframesp Receives number of frames
377 376 * caddr_t *bufp Receives kernel data buffer
378 377 *
379 378 * Returns:
380 379 * 0 on success
381 380 * errno on failure
382 381 */
383 382 static int
384 383 audio1575_open(void *arg, int flag, unsigned *nframesp, caddr_t *bufp)
385 384 {
386 385 audio1575_port_t *port = arg;
387 386
388 387 _NOTE(ARGUNUSED(flag));
389 388
390 389 port->count = 0;
391 390 *nframesp = port->nframes;
392 391 *bufp = port->samp_kaddr;
393 392
394 393 return (0);
395 394 }
396 395
397 396
398 397 /*
399 398 * audio1575_close()
400 399 *
401 400 * Description:
402 401 * Closes an audio DMA engine that was previously opened. Since
403 402 * nobody is using it, we take this opportunity to possibly power
404 403 * down the entire device.
405 404 *
406 405 * Arguments:
407 406 * void *arg The DMA engine to shut down
408 407 */
409 408 static void
410 409 audio1575_close(void *arg)
411 410 {
412 411 _NOTE(ARGUNUSED(arg));
413 412 }
414 413
415 414 /*
416 415 * audio1575_stop()
417 416 *
418 417 * Description:
419 418 * This is called by the framework to stop a port that is
420 419 * transferring data.
421 420 *
422 421 * Arguments:
423 422 * void *arg The DMA engine to stop
424 423 */
425 424 static void
426 425 audio1575_stop(void *arg)
427 426 {
428 427 audio1575_port_t *port = arg;
429 428 audio1575_state_t *statep = port->statep;
430 429
431 430 mutex_enter(&statep->lock);
432 431 if (port->num == M1575_REC) {
433 432 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE);
434 433 } else {
435 434 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE);
436 435 }
437 436 mutex_exit(&statep->lock);
438 437 }
439 438
440 439 /*
441 440 * audio1575_start()
442 441 *
443 442 * Description:
444 443 * This is called by the framework to start a port transferring data.
445 444 *
446 445 * Arguments:
447 446 * void *arg The DMA engine to start
448 447 *
449 448 * Returns:
450 449 * 0 on success (never fails, errno if it did)
451 450 */
452 451 static int
453 452 audio1575_start(void *arg)
454 453 {
455 454 audio1575_port_t *port = arg;
456 455 audio1575_state_t *statep = port->statep;
457 456
458 457 mutex_enter(&statep->lock);
459 458
460 459 port->offset = 0;
461 460
462 461 if (port->num == M1575_REC) {
463 462 /* Uli FIFO madness ... */
464 463 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST);
465 464 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE);
466 465
467 466 PUT8(M1575_PCMICR_REG, 0);
468 467 PUT8(M1575_PCMICR_REG, M1575_CR_RR);
469 468
470 469 PUT32(M1575_PCMIBDBAR_REG, port->bdl_paddr);
471 470 PUT8(M1575_PCMILVIV_REG, M1575_BD_NUMS - 1);
472 471
473 472 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE);
474 473
475 474 /* ULi says do fifo resets here */
476 475 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST);
477 476 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE);
478 477 PUT8(M1575_PCMICR_REG, 0);
479 478 SET32(M1575_DMACR_REG, M1575_DMACR_PCMISTART);
480 479
481 480 } else {
482 481
483 482 uint32_t scr;
484 483
485 484 /* Uli FIFO madness ... */
486 485 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMORST);
487 486 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE);
488 487
489 488 /* configure the number of channels properly */
490 489 scr = GET32(M1575_SCR_REG);
491 490 scr &= ~(M1575_SCR_6CHL_MASK | M1575_SCR_CHAMOD_MASK);
492 491 scr |= M1575_SCR_6CHL_2; /* select our proper ordering */
493 492 switch (port->nchan) {
494 493 case 2:
495 494 scr |= M1575_SCR_CHAMOD_2;
496 495 break;
497 496 case 4:
498 497 scr |= M1575_SCR_CHAMOD_4;
499 498 break;
500 499 case 6:
501 500 scr |= M1575_SCR_CHAMOD_6;
502 501 break;
503 502 }
504 503 PUT32(M1575_SCR_REG, scr);
505 504
506 505 PUT8(M1575_PCMOCR_REG, 0);
507 506 PUT8(M1575_PCMOCR_REG, M1575_CR_RR);
508 507
509 508 PUT32(M1575_PCMOBDBAR_REG, port->bdl_paddr);
510 509 PUT8(M1575_PCMOLVIV_REG, M1575_BD_NUMS - 1);
511 510
512 511 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE);
513 512 PUT8(M1575_PCMOCR_REG, 0);
514 513 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOSTART);
515 514 }
516 515
517 516 mutex_exit(&statep->lock);
518 517 return (0);
519 518 }
520 519
521 520
522 521
523 522 /*
524 523 * audio1575_format()
525 524 *
526 525 * Description:
527 526 * Called by the framework to query the format for the device.
528 527 *
529 528 * Arguments:
530 529 * void *arg The DMA engine to query
531 530 *
532 531 * Returns:
533 532 * AUDIO_FORMAT_S16_LE
534 533 */
535 534 static int
536 535 audio1575_format(void *arg)
537 536 {
538 537 _NOTE(ARGUNUSED(arg));
539 538
540 539 return (AUDIO_FORMAT_S16_LE);
541 540 }
542 541
543 542 /*
544 543 * audio1575_channels()
545 544 *
546 545 * Description:
547 546 * Called by the framework to query the channels for the device.
548 547 *
549 548 * Arguments:
550 549 * void *arg The DMA engine to query
551 550 *
552 551 * Returns:
553 552 * Number of channels for the device
554 553 */
555 554 static int
556 555 audio1575_channels(void *arg)
557 556 {
558 557 audio1575_port_t *port = arg;
559 558
560 559 return (port->nchan);
561 560 }
562 561
563 562 /*
564 563 * audio1575_rate()
565 564 *
566 565 * Description:
567 566 * Called by the framework to query the sample rate for the device.
568 567 *
569 568 * Arguments:
570 569 * void *arg The DMA engine to query
571 570 *
572 571 * Returns:
573 572 * 48000
574 573 */
575 574 static int
576 575 audio1575_rate(void *arg)
577 576 {
578 577 _NOTE(ARGUNUSED(arg));
579 578
580 579 return (48000);
581 580 }
582 581
583 582 /*
584 583 * audio1575_count()
585 584 *
586 585 * Description:
587 586 * This is called by the framework to get the engine's frame counter
588 587 *
589 588 * Arguments:
590 589 * void *arg The DMA engine to query
591 590 *
592 591 * Returns:
593 592 * frame count for current engine
594 593 */
595 594 static uint64_t
596 595 audio1575_count(void *arg)
597 596 {
598 597 audio1575_port_t *port = arg;
599 598 audio1575_state_t *statep = port->statep;
600 599 uint64_t val;
601 600 uint8_t civ;
602 601 unsigned n;
603 602 int civoff;
604 603 int lvioff;
605 604 int picoff;
606 605
607 606 mutex_enter(&statep->lock);
608 607
609 608 if (port->num == M1575_REC) {
610 609 civoff = M1575_PCMICIV_REG;
611 610 lvioff = M1575_PCMILVIV_REG;
612 611 picoff = M1575_PCMIPICB_REG;
613 612 } else {
614 613 civoff = M1575_PCMOCIV_REG;
615 614 lvioff = M1575_PCMOLVIV_REG;
616 615 picoff = M1575_PCMOPICB_REG;
617 616 }
618 617
619 618 /*
620 619 * Read the position counters. We also take this opportunity
621 620 * to update the last valid index to the one just previous to
622 621 * the one we're working on (so we'll fully loop.)
623 622 */
624 623 n = GET16(picoff);
625 624 civ = GET8(civoff);
626 625 PUT8(lvioff, (civ - 1) % M1575_BD_NUMS);
627 626
628 627 n = port->samp_size - (n * sizeof (int16_t));
629 628 if (n < port->offset) {
630 629 val = (port->samp_size - port->offset) + n;
631 630 } else {
632 631 val = n - port->offset;
633 632 }
634 633 port->offset = n;
635 634 port->count += (val / (port->nchan * sizeof (int16_t)));
636 635 val = port->count;
637 636 mutex_exit(&statep->lock);
638 637
639 638 return (val);
640 639 }
641 640
642 641 /*
643 642 * audio1575_sync()
644 643 *
645 644 * Description:
646 645 * This is called by the framework to synchronize DMA caches.
647 646 *
648 647 * Arguments:
649 648 * void *arg The DMA engine to sync
650 649 */
651 650 static void
652 651 audio1575_sync(void *arg, unsigned nframes)
653 652 {
654 653 audio1575_port_t *port = arg;
655 654 _NOTE(ARGUNUSED(nframes));
656 655
657 656 (void) ddi_dma_sync(port->samp_dmah, 0, 0, port->sync_dir);
658 657 }
659 658
660 659 /*
661 660 * audio1575_attach()
662 661 *
663 662 * Description:
664 663 * Attach an instance of the audio1575 driver. This routine does the
665 664 * device dependent attach tasks. When it is completed, it registers
666 665 * with the audio framework.
667 666 *
668 667 * Arguments:
669 668 * dev_info_t *dip Pointer to the device's dev_info struct
670 669 *
671 670 * Returns:
672 671 * DDI_SUCCESS The driver was initialized properly
673 672 * DDI_FAILURE The driver couldn't be initialized properly
674 673 */
675 674 static int
676 675 audio1575_attach(dev_info_t *dip)
677 676 {
678 677 audio1575_state_t *statep;
679 678 audio_dev_t *adev;
680 679 uint32_t devid;
681 680 const char *name;
682 681 const char *rev;
683 682 int maxch;
684 683
685 684 /* allocate the soft state structure */
686 685 statep = kmem_zalloc(sizeof (*statep), KM_SLEEP);
687 686 ddi_set_driver_private(dip, statep);
688 687 statep->dip = dip;
689 688
690 689 /*
691 690 * We want the micboost enabled by default as well.
692 691 */
693 692 (void) ddi_prop_update_int(DDI_DEV_T_NONE, dip, AC97_PROP_MICBOOST, 1);
694 693
695 694 /* allocate common audio dev structure */
696 695 adev = audio_dev_alloc(dip, 0);
697 696 if (adev == NULL) {
698 697 audio_dev_warn(NULL, "unable to allocate audio dev");
699 698 goto error;
700 699 }
701 700 statep->adev = adev;
702 701
703 702 /* map in the audio registers */
704 703 if (audio1575_map_regs(statep) != DDI_SUCCESS) {
705 704 audio_dev_warn(adev, "couldn't map registers");
706 705 goto error;
707 706 }
708 707
709 708 /* Enable PCI I/O and Memory Spaces */
710 709 audio1575_pci_enable(statep);
711 710
712 711 devid = (pci_config_get16(statep->pcih, PCI_CONF_VENID) << 16) |
713 712 pci_config_get16(statep->pcih, PCI_CONF_DEVID);
714 713 switch (devid) {
715 714 case 0x10b95455:
716 715 name = "Uli M1575 AC'97";
717 716 rev = "M5455";
718 717 break;
719 718 default:
720 719 name = "Uli AC'97";
721 720 rev = "Unknown";
722 721 break;
723 722 }
724 723 /* set device information -- this should check PCI config space */
725 724 audio_dev_set_description(adev, name);
726 725 audio_dev_set_version(adev, rev);
727 726
728 727 statep->ac97 = ac97_alloc(dip, audio1575_read_ac97,
729 728 audio1575_write_ac97, statep);
730 729 ASSERT(statep->ac97 != NULL);
731 730
732 731 /*
733 732 * Override "max-channels" property to prevent configuration
734 733 * of 4 or 6 (or possibly even 8!) channel audio. The default
735 734 * is to support as many channels as the hardware can do.
736 735 */
737 736 maxch = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
738 737 "max-channels", ac97_num_channels(statep->ac97));
739 738 if (maxch < 2) {
740 739 maxch = 2;
741 740 }
742 741
743 742 statep->maxch = min(maxch, 6) & ~1;
744 743
745 744 /* allocate port structures */
746 745 if ((audio1575_alloc_port(statep, M1575_PLAY, statep->maxch) !=
747 746 DDI_SUCCESS) ||
748 747 (audio1575_alloc_port(statep, M1575_REC, 2) != DDI_SUCCESS)) {
749 748 goto error;
750 749 }
751 750
752 751 if (audio1575_chip_init(statep) != DDI_SUCCESS) {
753 752 audio_dev_warn(adev, "failed to init chip");
754 753 goto error;
755 754 }
756 755
757 756 if (ac97_init(statep->ac97, adev) != DDI_SUCCESS) {
758 757 audio_dev_warn(adev, "ac'97 initialization failed");
759 758 goto error;
760 759 }
761 760
762 761 /* register with the framework */
763 762 if (audio_dev_register(adev) != DDI_SUCCESS) {
764 763 audio_dev_warn(adev, "unable to register with framework");
765 764 goto error;
766 765 }
767 766
768 767 /* everything worked out, so report the device */
769 768 ddi_report_dev(dip);
770 769
771 770 return (DDI_SUCCESS);
772 771
773 772 error:
774 773 audio1575_destroy(statep);
775 774 return (DDI_FAILURE);
776 775 }
777 776
778 777 /*
779 778 * audio1575_detach()
780 779 *
781 780 * Description:
782 781 * Detach an instance of the audio1575 driver.
783 782 *
784 783 * Arguments:
785 784 * dev_info_t *dip Pointer to the device's dev_info struct
786 785 *
787 786 * Returns:
788 787 * DDI_SUCCESS The driver was detached
789 788 * DDI_FAILURE The driver couldn't be detached
790 789 */
791 790 static int
792 791 audio1575_detach(dev_info_t *dip)
793 792 {
794 793 audio1575_state_t *statep;
795 794
796 795 statep = ddi_get_driver_private(dip);
797 796
798 797 if (audio_dev_unregister(statep->adev) != DDI_SUCCESS) {
799 798 return (DDI_FAILURE);
800 799 }
801 800
802 801 audio1575_destroy(statep);
803 802 return (DDI_SUCCESS);
804 803 }
805 804
806 805 /* *********************** Local Routines *************************** */
807 806
808 807 /*
809 808 * audio1575_alloc_port()
810 809 *
811 810 * Description:
812 811 * This routine allocates the DMA handles and the memory for the
813 812 * DMA engines to use. It also configures the BDL lists properly
814 813 * for use.
815 814 *
816 815 * Arguments:
817 816 * dev_info_t *dip Pointer to the device's devinfo
818 817 * int num M1575_PLAY or M1575_REC
819 818 * uint8_t nchan Number of channels (2 = stereo, 6 = 5.1, etc.)
820 819 *
821 820 * Returns:
822 821 * DDI_SUCCESS Registers successfully mapped
823 822 * DDI_FAILURE Registers not successfully mapped
824 823 */
825 824 static int
826 825 audio1575_alloc_port(audio1575_state_t *statep, int num, uint8_t nchan)
827 826 {
828 827 ddi_dma_cookie_t cookie;
829 828 uint_t count;
830 829 int dir;
831 830 unsigned caps;
832 831 audio_dev_t *adev;
833 832 audio1575_port_t *port;
834 833 uint32_t *kaddr;
835 834 int rc;
836 835 dev_info_t *dip;
837 836
838 837 adev = statep->adev;
839 838 dip = statep->dip;
840 839
841 840 port = kmem_zalloc(sizeof (*port), KM_SLEEP);
842 841 statep->ports[num] = port;
843 842 port->num = num;
844 843 port->statep = statep;
845 844 port->nchan = nchan;
846 845
847 846 if (num == M1575_REC) {
848 847 dir = DDI_DMA_READ;
849 848 caps = ENGINE_INPUT_CAP;
850 849 port->sync_dir = DDI_DMA_SYNC_FORKERNEL;
851 850 } else {
852 851 dir = DDI_DMA_WRITE;
853 852 caps = ENGINE_OUTPUT_CAP;
854 853 port->sync_dir = DDI_DMA_SYNC_FORDEV;
855 854 }
856 855
857 856 /*
858 857 * We use one big sample area. The sample area must be larger
859 858 * than about 1.5 framework fragment sizes. (Currently 480 *
860 859 * 1.5 = 720 frames.) This is necessary to ensure that we
861 860 * don't have to involve an interrupt service routine on our
862 861 * own, to keep the last valid index updated reasonably.
863 862 */
864 863 port->nframes = 2048;
865 864 port->samp_size = port->nframes * port->nchan * sizeof (int16_t);
866 865
867 866 /* allocate dma handle */
868 867 rc = ddi_dma_alloc_handle(dip, &sample_buf_dma_attr, DDI_DMA_SLEEP,
869 868 NULL, &port->samp_dmah);
870 869 if (rc != DDI_SUCCESS) {
871 870 audio_dev_warn(adev, "ddi_dma_alloc_handle failed: %d", rc);
872 871 return (DDI_FAILURE);
873 872 }
874 873 /* allocate DMA buffer */
875 874 rc = ddi_dma_mem_alloc(port->samp_dmah, port->samp_size, &buf_attr,
876 875 DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, &port->samp_kaddr,
877 876 &port->samp_size, &port->samp_acch);
878 877 if (rc == DDI_FAILURE) {
879 878 audio_dev_warn(adev, "dma_mem_alloc failed");
880 879 return (DDI_FAILURE);
881 880 }
882 881
883 882 /* bind DMA buffer */
884 883 rc = ddi_dma_addr_bind_handle(port->samp_dmah, NULL,
885 884 port->samp_kaddr, port->samp_size, dir|DDI_DMA_CONSISTENT,
886 885 DDI_DMA_SLEEP, NULL, &cookie, &count);
887 886 if ((rc != DDI_DMA_MAPPED) || (count != 1)) {
888 887 audio_dev_warn(adev,
889 888 "ddi_dma_addr_bind_handle failed: %d", rc);
890 889 return (DDI_FAILURE);
891 890 }
892 891 port->samp_paddr = cookie.dmac_address;
893 892
894 893 /*
895 894 * now, from here we allocate DMA memory for buffer descriptor list.
896 895 * we allocate adjacent DMA memory for all DMA engines.
897 896 */
898 897 rc = ddi_dma_alloc_handle(dip, &bdlist_dma_attr, DDI_DMA_SLEEP,
899 898 NULL, &port->bdl_dmah);
900 899 if (rc != DDI_SUCCESS) {
901 900 audio_dev_warn(adev, "ddi_dma_alloc_handle(bdlist) failed");
902 901 return (DDI_FAILURE);
903 902 }
904 903
905 904 /*
906 905 * we allocate all buffer descriptors lists in continuous dma memory.
907 906 */
908 907 port->bdl_size = sizeof (m1575_bd_entry_t) * M1575_BD_NUMS;
909 908 rc = ddi_dma_mem_alloc(port->bdl_dmah, port->bdl_size,
910 909 &dev_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL,
911 910 &port->bdl_kaddr, &port->bdl_size, &port->bdl_acch);
912 911 if (rc != DDI_SUCCESS) {
913 912 audio_dev_warn(adev, "ddi_dma_mem_alloc(bdlist) failed");
914 913 return (DDI_FAILURE);
915 914 }
916 915
917 916 /*
918 917 * Wire up the BD list. We do this *before* binding the BD list
919 918 * so that we don't have to do an extra ddi_dma_sync.
920 919 */
921 920 kaddr = (void *)port->bdl_kaddr;
922 921 for (int i = 0; i < M1575_BD_NUMS; i++) {
923 922
924 923 /* set base address of buffer */
925 924 ddi_put32(port->bdl_acch, kaddr, port->samp_paddr);
926 925 kaddr++;
927 926
928 927 /* set size in frames, and enable IOC interrupt */
929 928 ddi_put32(port->bdl_acch, kaddr,
930 929 ((port->samp_size / sizeof (int16_t)) | (1U << 31)));
931 930 kaddr++;
932 931 }
933 932
934 933 rc = ddi_dma_addr_bind_handle(port->bdl_dmah, NULL, port->bdl_kaddr,
935 934 port->bdl_size, DDI_DMA_WRITE|DDI_DMA_CONSISTENT, DDI_DMA_SLEEP,
936 935 NULL, &cookie, &count);
937 936 if ((rc != DDI_DMA_MAPPED) || (count != 1)) {
938 937 audio_dev_warn(adev, "addr_bind_handle failed");
939 938 return (DDI_FAILURE);
940 939 }
941 940 port->bdl_paddr = cookie.dmac_address;
942 941
943 942 port->engine = audio_engine_alloc(&audio1575_engine_ops, caps);
944 943 if (port->engine == NULL) {
945 944 audio_dev_warn(adev, "audio_engine_alloc failed");
946 945 return (DDI_FAILURE);
947 946 }
948 947
949 948 audio_engine_set_private(port->engine, port);
950 949 audio_dev_add_engine(adev, port->engine);
951 950
952 951 return (DDI_SUCCESS);
953 952 }
954 953
955 954 /*
956 955 * audio1575_free_port()
957 956 *
958 957 * Description:
959 958 * This routine unbinds the DMA cookies, frees the DMA buffers,
960 959 * deallocates the DMA handles.
961 960 *
962 961 * Arguments:
963 962 * audio1575_port_t *port The port structure for a DMA engine.
964 963 */
965 964 static void
966 965 audio1575_free_port(audio1575_port_t *port)
967 966 {
968 967 if (port == NULL)
969 968 return;
970 969
971 970 if (port->engine) {
972 971 audio_dev_remove_engine(port->statep->adev, port->engine);
973 972 audio_engine_free(port->engine);
974 973 }
975 974 if (port->bdl_paddr) {
976 975 (void) ddi_dma_unbind_handle(port->bdl_dmah);
977 976 }
978 977 if (port->bdl_acch) {
979 978 ddi_dma_mem_free(&port->bdl_acch);
980 979 }
981 980 if (port->bdl_dmah) {
982 981 ddi_dma_free_handle(&port->bdl_dmah);
983 982 }
984 983 if (port->samp_paddr) {
985 984 (void) ddi_dma_unbind_handle(port->samp_dmah);
986 985 }
987 986 if (port->samp_acch) {
988 987 ddi_dma_mem_free(&port->samp_acch);
989 988 }
990 989 if (port->samp_dmah) {
991 990 ddi_dma_free_handle(&port->samp_dmah);
992 991 }
993 992 kmem_free(port, sizeof (*port));
994 993 }
995 994
996 995 /*
997 996 * audio1575_map_regs()
998 997 *
999 998 * Description:
1000 999 * The registers are mapped in.
1001 1000 *
1002 1001 * Arguments:
1003 1002 * dev_info_t *dip Pointer to the device's devinfo
1004 1003 *
1005 1004 * Returns:
1006 1005 * DDI_SUCCESS Registers successfully mapped
1007 1006 * DDI_FAILURE Registers not successfully mapped
1008 1007 */
1009 1008 static int
1010 1009 audio1575_map_regs(audio1575_state_t *statep)
1011 1010 {
1012 1011 dev_info_t *dip = statep->dip;
1013 1012
1014 1013 /* map the M1575 Audio PCI Cfg Space */
1015 1014 if (pci_config_setup(dip, &statep->pcih) != DDI_SUCCESS) {
1016 1015 audio_dev_warn(statep->adev, "PCI config map failure");
1017 1016 goto error;
1018 1017 }
1019 1018
1020 1019 /* map the M1575 Audio registers in PCI IO Space */
1021 1020 if ((ddi_regs_map_setup(dip, M1575_AUDIO_IO_SPACE, &statep->regsp,
1022 1021 0, 0, &dev_attr, &statep->regsh)) != DDI_SUCCESS) {
1023 1022 audio_dev_warn(statep->adev, "Audio IO mapping failure");
1024 1023 goto error;
1025 1024 }
1026 1025 return (DDI_SUCCESS);
1027 1026
1028 1027 error:
1029 1028 audio1575_unmap_regs(statep);
1030 1029
1031 1030 return (DDI_FAILURE);
1032 1031 }
1033 1032
1034 1033 /*
1035 1034 * audio1575_unmap_regs()
1036 1035 *
1037 1036 * Description:
1038 1037 * This routine unmaps control registers.
1039 1038 *
1040 1039 * Arguments:
1041 1040 * audio1575_state_t *state The device's state structure
1042 1041 */
1043 1042 static void
1044 1043 audio1575_unmap_regs(audio1575_state_t *statep)
1045 1044 {
1046 1045 if (statep->regsh) {
1047 1046 ddi_regs_map_free(&statep->regsh);
1048 1047 }
1049 1048
1050 1049 if (statep->pcih) {
1051 1050 pci_config_teardown(&statep->pcih);
1052 1051 }
1053 1052 }
1054 1053
1055 1054 /*
1056 1055 * audio1575_chip_init()
1057 1056 *
1058 1057 * Description:
1059 1058 * This routine initializes the M1575 AC97 audio controller and the AC97
1060 1059 * codec. The AC97 codec registers are programmed from codec_shadow[].
1061 1060 * If we are not doing a restore, we initialize codec_shadow[], otherwise
1062 1061 * we use the current values of shadow. This routine expects that the
1063 1062 * PCI IO and Memory spaces have been mapped and enabled already.
1064 1063 * Arguments:
1065 1064 * audio1575_state_t *state The device's state structure
1066 1065 * restore from codec_shadow[]
1067 1066 * Returns:
1068 1067 * DDI_SUCCESS The hardware was initialized properly
1069 1068 * DDI_FAILURE The hardware couldn't be initialized properly
1070 1069 */
1071 1070 static int
1072 1071 audio1575_chip_init(audio1575_state_t *statep)
1073 1072 {
1074 1073 uint32_t ssr;
1075 1074 uint32_t rtsr;
1076 1075 uint32_t intrsr;
1077 1076 int i;
1078 1077 int j;
1079 1078 #ifdef __sparc
1080 1079 uint8_t clk_detect;
1081 1080 ddi_acc_handle_t pcih;
1082 1081 #endif
1083 1082 clock_t ticks;
1084 1083
1085 1084 /*
1086 1085 * clear the interrupt control and status register
1087 1086 * READ/WRITE/READ workaround required
1088 1087 * for buggy hardware
1089 1088 */
1090 1089
1091 1090 PUT32(M1575_INTRCR_REG, 0);
1092 1091 (void) GET32(M1575_INTRCR_REG);
1093 1092
1094 1093 intrsr = GET32(M1575_INTRSR_REG);
1095 1094 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK));
1096 1095 (void) GET32(M1575_INTRSR_REG);
1097 1096
1098 1097 ticks = drv_usectohz(M1575_LOOP_CTR);
1099 1098
1100 1099 /*
1101 1100 * SADA only supports stereo, so we set the channel bits
1102 1101 * to "00" to select 2 channels.
1103 1102 * will also set the following:
1104 1103 *
1105 1104 * Disable double rate enable
1106 1105 * no SPDIF output selected
1107 1106 * 16 bit audio record mode
1108 1107 * 16 bit pcm out mode
1109 1108 * PCM Out 6 chan mode FL FR CEN BL BR LFE
1110 1109 * PCM Out 2 channel mode (00)
1111 1110 */
1112 1111 for (i = 0; i < M1575_LOOP_CTR; i++) {
1113 1112 /* Reset the AC97 Codec and default to 2 channel 16 bit mode */
1114 1113 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST);
1115 1114 delay(ticks<<1);
1116 1115
1117 1116 /* Read the System Status Reg */
1118 1117 ssr = GET32(M1575_SSR_REG);
1119 1118
1120 1119 /* make sure and release the blocked reset bit */
1121 1120 if (ssr & M1575_SSR_RSTBLK) {
1122 1121 SET32(M1575_INTFCR_REG, M1575_INTFCR_RSTREL);
1123 1122 delay(ticks);
1124 1123
1125 1124 /* Read the System Status Reg */
1126 1125 ssr = GET32(M1575_SSR_REG);
1127 1126
1128 1127 /* make sure and release the blocked reset bit */
1129 1128 if (ssr & M1575_SSR_RSTBLK) {
1130 1129 return (DDI_FAILURE);
1131 1130 }
1132 1131
1133 1132 /* Reset the controller */
1134 1133 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST);
1135 1134 delay(ticks);
1136 1135 }
1137 1136
1138 1137 /* according AC'97 spec, wait for codec reset */
1139 1138 for (j = 0; j < M1575_LOOP_CTR; j++) {
1140 1139 if ((GET32(M1575_SCR_REG) & M1575_SCR_COLDRST) == 0) {
1141 1140 break;
1142 1141 }
1143 1142 delay(ticks);
1144 1143 }
1145 1144
1146 1145 /* codec reset failed */
1147 1146 if (j >= M1575_LOOP_CTR) {
1148 1147 audio_dev_warn(statep->adev,
1149 1148 "failure to reset codec");
1150 1149 return (DDI_FAILURE);
1151 1150 }
1152 1151
1153 1152 /*
1154 1153 * Wait for FACRDY First codec ready. The hardware can
1155 1154 * provide the state of
1156 1155 * codec ready bit on SDATA_IN[0] and as reflected in
1157 1156 * the Recv Tag Slot Reg.
1158 1157 */
1159 1158 rtsr = GET32(M1575_RTSR_REG);
1160 1159 if (rtsr & M1575_RTSR_FACRDY) {
1161 1160 break;
1162 1161 } else { /* reset the status and wait for new status to set */
1163 1162 rtsr |= M1575_RTSR_FACRDY;
1164 1163 PUT32(M1575_RTSR_REG, rtsr);
1165 1164 drv_usecwait(10);
1166 1165 }
1167 1166 }
1168 1167
1169 1168 /* if we could not reset the AC97 codec then report failure */
1170 1169 if (i >= M1575_LOOP_CTR) {
1171 1170 audio_dev_warn(statep->adev,
1172 1171 "no codec ready signal received");
1173 1172 return (DDI_FAILURE);
1174 1173 }
1175 1174
1176 1175 #ifdef __sparc
1177 1176 /* Magic code from ULi to Turn on the AC_LINK clock */
1178 1177 pcih = statep->pcih;
1179 1178 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1180 1179 pci_config_put8(pcih, M1575_PCIACD_REG, 4);
1181 1180 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1182 1181 (void) pci_config_get8(pcih, M1575_PCIACD_REG);
1183 1182 pci_config_put8(pcih, M1575_PCIACD_REG, 2);
1184 1183 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1185 1184 clk_detect = pci_config_get8(pcih, M1575_PCIACD_REG);
1186 1185
1187 1186 if (clk_detect != 1) {
1188 1187 audio_dev_warn(statep->adev, "No AC97 Clock Detected");
1189 1188 return (DDI_FAILURE);
1190 1189 }
1191 1190 #endif
1192 1191
1193 1192 /* Magic code from Uli to Init FIFO1 and FIFO2 */
1194 1193 PUT32(M1575_FIFOCR1_REG, 0x81818181);
1195 1194 PUT32(M1575_FIFOCR2_REG, 0x81818181);
1196 1195 PUT32(M1575_FIFOCR3_REG, 0x81818181);
1197 1196
1198 1197 /* Make sure that PCM in and PCM out are enabled */
1199 1198 SET32(M1575_INTFCR_REG, (M1575_INTFCR_PCMIENB | M1575_INTFCR_PCMOENB));
1200 1199
1201 1200 audio1575_dma_stop(statep, B_FALSE);
1202 1201
1203 1202 return (DDI_SUCCESS);
1204 1203 }
1205 1204
1206 1205 /*
1207 1206 * audio1575_dma_stop()
1208 1207 *
1209 1208 * Description:
1210 1209 * This routine is used to put each DMA engine into the quiet state.
1211 1210 *
1212 1211 * Arguments:
1213 1212 * audio1575_state_t *statep The device's state structure
1214 1213 */
1215 1214 static void
1216 1215 audio1575_dma_stop(audio1575_state_t *statep, boolean_t quiesce)
1217 1216 {
1218 1217 uint32_t intrsr;
1219 1218 int i;
1220 1219
1221 1220 if (statep->regsh == NULL) {
1222 1221 return;
1223 1222 }
1224 1223
1225 1224 /* pause bus master (needed for the following reset register) */
1226 1225 for (i = 0; i < M1575_LOOP_CTR; i++) {
1227 1226
1228 1227 SET32(M1575_DMACR_REG, M1575_DMACR_PAUSE_ALL);
1229 1228 if (GET32(M1575_DMACR_REG) & M1575_DMACR_PAUSE_ALL) {
1230 1229 break;
1231 1230 }
1232 1231 drv_usecwait(10);
1233 1232 }
1234 1233
1235 1234 if (i >= M1575_LOOP_CTR) {
1236 1235 if (!quiesce)
1237 1236 audio_dev_warn(statep->adev, "failed to stop DMA");
1238 1237 return;
1239 1238 }
1240 1239
1241 1240 /* Pause bus master (needed for the following reset register) */
1242 1241 PUT8(M1575_PCMICR_REG, 0);
1243 1242 PUT8(M1575_PCMOCR_REG, 0);
1244 1243 PUT8(M1575_MICICR_REG, 0);
1245 1244 PUT8(M1575_CSPOCR_REG, 0);
1246 1245 PUT8(M1575_PCMI2CR_RR, 0);
1247 1246 PUT8(M1575_MICI2CR_RR, 0);
1248 1247
1249 1248 /* Reset the bus master registers for all DMA engines */
1250 1249 PUT8(M1575_PCMICR_REG, M1575_PCMICR_RR);
1251 1250 PUT8(M1575_PCMOCR_REG, M1575_PCMOCR_RR);
1252 1251 PUT8(M1575_MICICR_REG, M1575_MICICR_RR);
1253 1252 PUT8(M1575_CSPOCR_REG, M1575_CSPOCR_RR);
1254 1253 PUT8(M1575_PCMI2CR_REG, M1575_PCMI2CR_RR);
1255 1254 PUT8(M1575_MICI2CR_REG, M1575_MICI2CR_RR);
1256 1255
1257 1256 /* Reset FIFOS */
1258 1257 PUT32(M1575_FIFOCR1_REG, 0x81818181);
1259 1258 PUT32(M1575_FIFOCR2_REG, 0x81818181);
1260 1259 PUT32(M1575_FIFOCR3_REG, 0x81818181);
1261 1260
1262 1261 /* Clear Interrupts */
1263 1262 SET16(M1575_PCMISR_REG, M1575_SR_CLR);
1264 1263 SET16(M1575_PCMOSR_REG, M1575_SR_CLR);
1265 1264 SET16(M1575_MICISR_REG, M1575_SR_CLR);
1266 1265 SET16(M1575_CSPOSR_REG, M1575_SR_CLR);
1267 1266 SET16(M1575_PCMI2SR_REG, M1575_SR_CLR);
1268 1267 SET16(M1575_MICI2SR_REG, M1575_SR_CLR);
1269 1268
1270 1269 /*
1271 1270 * clear the interrupt control and status register
1272 1271 * READ/WRITE/READ workaround required to flush PCI caches
1273 1272 */
1274 1273
1275 1274 PUT32(M1575_INTRCR_REG, 0);
1276 1275 (void) GET32(M1575_INTRCR_REG);
1277 1276
1278 1277 intrsr = GET32(M1575_INTRSR_REG);
1279 1278 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK));
1280 1279 (void) GET32(M1575_INTRSR_REG);
1281 1280 }
1282 1281
1283 1282 /*
1284 1283 * audio1575_codec_sync()
1285 1284 *
1286 1285 * Description:
1287 1286 * Serialize access to the AC97 audio mixer registers.
1288 1287 *
1289 1288 * Arguments:
1290 1289 * audio1575_state_t *state The device's state structure
1291 1290 *
1292 1291 * Returns:
1293 1292 * DDI_SUCCESS Ready for an I/O access to the codec
1294 1293 * DDI_FAILURE An I/O access is currently in progress, can't
1295 1294 * perform another I/O access.
1296 1295 */
1297 1296 static int
1298 1297 audio1575_codec_sync(audio1575_state_t *statep)
1299 1298 {
1300 1299 /* do the Uli Shuffle ... */
1301 1300 for (int i = 0; i < M1575_LOOP_CTR; i++) {
1302 1301 /* Read the semaphore, and loop till we own it */
1303 1302 if ((GET32(M1575_CASR_REG) & 1) == 0) {
1304 1303 for (int j = 0; j < M1575_LOOP_CTR; j++) {
1305 1304 /* Wait for CWRSUCC 0x8 */
1306 1305 if (GET32(M1575_CSPSR_REG) &
1307 1306 M1575_CSPSR_SUCC) {
1308 1307 return (DDI_SUCCESS);
1309 1308 }
1310 1309 drv_usecwait(1);
1311 1310 }
1312 1311 }
1313 1312 drv_usecwait(10);
1314 1313 }
1315 1314
1316 1315 return (DDI_FAILURE);
1317 1316 }
1318 1317
1319 1318 /*
1320 1319 * audio1575_write_ac97()
1321 1320 *
1322 1321 * Description:
1323 1322 * Set the specific AC97 Codec register.
1324 1323 *
1325 1324 * Arguments:
1326 1325 * void *arg The device's state structure
1327 1326 * uint8_t reg AC97 register number
1328 1327 * uint16_t data The data want to be set
1329 1328 */
1330 1329 static void
1331 1330 audio1575_write_ac97(void *arg, uint8_t reg, uint16_t data)
1332 1331 {
1333 1332 audio1575_state_t *statep = arg;
1334 1333 int i;
1335 1334
1336 1335 if (audio1575_codec_sync(statep) != DDI_SUCCESS) {
1337 1336 return;
1338 1337 }
1339 1338
1340 1339 /* write the data to WRITE to the lo word of the CPR register */
1341 1340 PUT16(M1575_CPR_REG, data);
1342 1341
1343 1342 /* write the address to WRITE to the hi word of the CPR register */
1344 1343 PUT16(M1575_CPR_REG+2, reg);
1345 1344
1346 1345 /* wait until command is completed sucessfully */
1347 1346 for (i = 0; i < M1575_LOOP_CTR; i++) {
1348 1347 /* Wait for Write Ready 0x01 */
1349 1348 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_WRRDY) {
1350 1349 break;
1351 1350 }
1352 1351 drv_usecwait(1);
1353 1352 }
1354 1353
1355 1354 if (i < M1575_LOOP_CTR) {
1356 1355 (void) audio1575_read_ac97(statep, reg);
1357 1356 }
1358 1357 }
1359 1358
1360 1359 /*
1361 1360 * audio1575_read_ac97()
1362 1361 *
1363 1362 * Description:
1364 1363 * Get the specific AC97 Codec register. It also updates codec_shadow[]
1365 1364 * with the register value.
1366 1365 *
1367 1366 * Arguments:
1368 1367 * void *arg The device's state structure
1369 1368 * uint8_t reg AC97 register number
1370 1369 *
1371 1370 * Returns:
1372 1371 * Value of AC97 register. (0xffff in failure situations).
1373 1372 */
1374 1373 static uint16_t
1375 1374 audio1575_read_ac97(void *arg, uint8_t reg)
1376 1375 {
1377 1376 audio1575_state_t *statep = arg;
1378 1377 uint16_t addr = 0;
1379 1378 uint16_t data = 0xffff;
1380 1379 int i;
1381 1380
1382 1381 if ((audio1575_codec_sync(statep)) != DDI_SUCCESS) {
1383 1382 return (data);
1384 1383 }
1385 1384
1386 1385 /*
1387 1386 * at this point we have the CASR semaphore
1388 1387 * and the codec is r/w ready
1389 1388 * OR in the READ opcode into the address field
1390 1389 */
1391 1390
1392 1391 addr = (reg | M1575_CPR_READ);
1393 1392
1394 1393 /* write the address to READ to the hi word of the CPR register */
1395 1394 PUT16(M1575_CPR_REG+2, addr);
1396 1395
1397 1396 /* wait until command is completed sucessfully */
1398 1397 for (i = 0; i < M1575_LOOP_CTR; i++) {
1399 1398 /* Wait for Read Ready 0x02 */
1400 1399 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_RDRDY) {
1401 1400 break;
1402 1401 }
1403 1402 drv_usecwait(1);
1404 1403 }
1405 1404
1406 1405 if (i < M1575_LOOP_CTR) {
1407 1406 /* read back the data and address */
1408 1407 data = GET16(M1575_SPR_REG);
1409 1408 addr = GET16(M1575_SPR_REG+2);
1410 1409 if (addr != reg) {
1411 1410 data = 0xffff;
1412 1411 }
1413 1412 }
1414 1413
1415 1414 return (data);
1416 1415 }
1417 1416
1418 1417 /*
1419 1418 * audio1575_pci_enable()
1420 1419 *
1421 1420 * Description:
1422 1421 * This routine Enables all PCI IO and MEMORY accesses
1423 1422 *
1424 1423 * Arguments:
1425 1424 * audio1575_state_t *statep The device's state structure
1426 1425 */
1427 1426 static void
1428 1427 audio1575_pci_enable(audio1575_state_t *statep)
1429 1428 {
1430 1429 uint16_t pcics_reg;
1431 1430
1432 1431 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM);
1433 1432 pcics_reg |= (PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
1434 1433 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg);
1435 1434 }
1436 1435
1437 1436 /*
1438 1437 * audio1575_pci_disable()
1439 1438 *
1440 1439 * Description:
1441 1440 * This routine Disables all PCI IO and MEMORY accesses
1442 1441 *
1443 1442 * Arguments:
1444 1443 * audio1575_state_t *statep The device's state structure
1445 1444 */
1446 1445 static void
1447 1446 audio1575_pci_disable(audio1575_state_t *statep)
1448 1447 {
1449 1448 uint16_t pcics_reg;
1450 1449
1451 1450 if (statep->pcih == NULL)
1452 1451 return;
1453 1452 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM);
1454 1453 pcics_reg &= ~(PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
1455 1454 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg);
1456 1455 }
1457 1456
1458 1457 /*
1459 1458 * audio1575_resume()
1460 1459 *
1461 1460 * Description:
1462 1461 * Resume operation of the device after sleeping or hibernating.
1463 1462 * Note that this should never fail, even if hardware goes wonky,
1464 1463 * because the current PM framework will panic if it does.
1465 1464 *
1466 1465 * Arguments:
1467 1466 * dev_info_t *dip Pointer to the device's dev_info struct
1468 1467 *
1469 1468 * Returns:
1470 1469 * DDI_SUCCESS The driver was resumed
1471 1470 */
1472 1471 static int
1473 1472 audio1575_resume(dev_info_t *dip)
1474 1473 {
1475 1474 audio1575_state_t *statep;
1476 1475 audio_dev_t *adev;
1477 1476
1478 1477 /* we've already allocated the state structure so get ptr */
1479 1478 statep = ddi_get_driver_private(dip);
1480 1479 adev = statep->adev;
1481 1480 ASSERT(!mutex_owned(&statep->lock));
1482 1481
1483 1482 if (audio1575_chip_init(statep) != DDI_SUCCESS) {
1484 1483 /*
1485 1484 * Note that PM gurus say we should return
1486 1485 * success here. Failure of audio shouldn't
1487 1486 * be considered FATAL to the system. The
1488 1487 * upshot is that audio will not progress.
1489 1488 */
1490 1489 audio_dev_warn(adev, "DDI_RESUME failed to init chip");
1491 1490 return (DDI_SUCCESS);
1492 1491 }
1493 1492
1494 1493 /* allow ac97 operations again */
1495 1494 ac97_reset(statep->ac97);
1496 1495
1497 1496 audio_dev_resume(adev);
1498 1497
1499 1498 return (DDI_SUCCESS);
1500 1499 }
1501 1500
1502 1501 /*
1503 1502 * audio1575_suspend()
1504 1503 *
1505 1504 * Description:
1506 1505 * Suspend an instance of the audio1575 driver.
1507 1506 *
1508 1507 * Arguments:
1509 1508 * dev_info_t *dip Pointer to the device's dev_info struct
1510 1509 *
1511 1510 * Returns:
1512 1511 * DDI_SUCCESS The driver was suspended
1513 1512 */
1514 1513 static int
1515 1514 audio1575_suspend(dev_info_t *dip)
1516 1515 {
1517 1516 audio1575_state_t *statep;
1518 1517
1519 1518 statep = ddi_get_driver_private(dip);
1520 1519
1521 1520 audio_dev_suspend(statep->adev);
1522 1521
1523 1522 return (DDI_SUCCESS);
1524 1523 }
1525 1524
1526 1525 /*
1527 1526 * audio1575_destroy()
1528 1527 *
1529 1528 * Description:
1530 1529 * This routine releases all resources held by the device instance,
1531 1530 * as part of either detach or a failure in attach.
1532 1531 *
1533 1532 * Arguments:
1534 1533 * audio1575_state_t *state The device soft state.
1535 1534 */
1536 1535 void
1537 1536 audio1575_destroy(audio1575_state_t *statep)
1538 1537 {
1539 1538 ddi_acc_handle_t pcih;
1540 1539
1541 1540 /* stop DMA engines */
1542 1541 audio1575_dma_stop(statep, B_FALSE);
1543 1542
1544 1543 if (statep->regsh != NULL) {
1545 1544 /* reset the codec */
1546 1545 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST);
1547 1546 }
1548 1547
1549 1548 if ((pcih = statep->pcih) != NULL) {
1550 1549 /* turn off the AC_LINK clock */
1551 1550 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1552 1551 pci_config_put8(pcih, M1575_PCIACD_REG, 4);
1553 1552 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1554 1553 }
1555 1554
1556 1555 /* Disable PCI I/O and Memory Spaces */
1557 1556 audio1575_pci_disable(statep);
1558 1557
1559 1558 audio1575_free_port(statep->ports[M1575_PLAY]);
1560 1559 audio1575_free_port(statep->ports[M1575_REC]);
1561 1560
1562 1561 audio1575_unmap_regs(statep);
1563 1562
1564 1563 if (statep->ac97 != NULL) {
1565 1564 ac97_free(statep->ac97);
1566 1565 }
1567 1566
1568 1567 if (statep->adev != NULL) {
1569 1568 audio_dev_free(statep->adev);
1570 1569 }
1571 1570
1572 1571 kmem_free(statep, sizeof (*statep));
1573 1572 }
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