1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
23 * Use is subject to license terms.
24 */
25
26
27 /*
28 * audio1575 Audio Driver
29 *
30 * The driver is primarily targeted at providing audio support for
31 * those systems which use the Uli M1575 audio core.
32 *
33 * The M1575 audio core, in AC'97 controller mode, has independent
34 * channels for PCM in, PCM out, mic in, modem in, and modem out.
35 *
36 * The AC'97 controller is a PCI bus master with scatter/gather
37 * support. Each channel has a DMA engine. Currently, we use only
38 * the PCM in and PCM out channels. Each DMA engine uses one buffer
39 * descriptor list. And the buffer descriptor list is an array of up
40 * to 32 entries, each of which describes a data buffer. Each entry
41 * contains a pointer to a data buffer, control bits, and the length
42 * of the buffer being pointed to, where the length is expressed as
43 * the number of samples. This, combined with the 16-bit sample size,
44 * gives the actual physical length of the buffer.
45 *
46 * NOTE:
47 * This driver depends on the drv/audio, misc/ac97
48 * modules being loaded first.
49 */
50
51 #include <sys/types.h>
52 #include <sys/modctl.h>
53 #include <sys/kmem.h>
54 #include <sys/conf.h>
55 #include <sys/ddi.h>
56 #include <sys/sunddi.h>
57 #include <sys/pci.h>
58 #include <sys/note.h>
59 #include <sys/audio/audio_driver.h>
60 #include <sys/audio/ac97.h>
61 #include "audio1575.h"
62
63 /*
64 * Module linkage routines for the kernel
65 */
66 static int audio1575_ddi_attach(dev_info_t *, ddi_attach_cmd_t);
67 static int audio1575_ddi_detach(dev_info_t *, ddi_detach_cmd_t);
68 static int audio1575_ddi_quiesce(dev_info_t *);
69
70 /*
71 * Entry point routine prototypes
72 */
73 static int audio1575_open(void *, int, unsigned *, caddr_t *);
74 static void audio1575_close(void *);
75 static int audio1575_start(void *);
76 static void audio1575_stop(void *);
77 static int audio1575_format(void *);
78 static int audio1575_channels(void *);
79 static int audio1575_rate(void *);
80 static uint64_t audio1575_count(void *);
81 static void audio1575_sync(void *, unsigned);
82
83 static audio_engine_ops_t audio1575_engine_ops = {
84 AUDIO_ENGINE_VERSION,
85 audio1575_open,
86 audio1575_close,
87 audio1575_start,
88 audio1575_stop,
89 audio1575_count,
90 audio1575_format,
91 audio1575_channels,
92 audio1575_rate,
93 audio1575_sync,
94 NULL,
95 NULL,
96 NULL
97 };
98
99 /*
100 * Local Routine Prototypes
101 */
102 static int audio1575_attach(dev_info_t *);
103 static int audio1575_resume(dev_info_t *);
104 static int audio1575_detach(dev_info_t *);
105 static int audio1575_suspend(dev_info_t *);
106
107 static int audio1575_alloc_port(audio1575_state_t *, int, uint8_t);
108 static void audio1575_free_port(audio1575_port_t *);
109
110 static int audio1575_codec_sync(audio1575_state_t *);
111 static void audio1575_write_ac97(void *, uint8_t, uint16_t);
112 static uint16_t audio1575_read_ac97(void *, uint8_t);
113 static int audio1575_chip_init(audio1575_state_t *);
114 static int audio1575_map_regs(audio1575_state_t *);
115 static void audio1575_unmap_regs(audio1575_state_t *);
116 static void audio1575_dma_stop(audio1575_state_t *, boolean_t);
117 static void audio1575_pci_enable(audio1575_state_t *);
118 static void audio1575_pci_disable(audio1575_state_t *);
119
120 static void audio1575_destroy(audio1575_state_t *);
121
122 /*
123 * Global variables, but used only by this file.
124 */
125
126 /*
127 * DDI Structures
128 */
129
130
131 /* Device operations structure */
132 static struct dev_ops audio1575_dev_ops = {
133 DEVO_REV, /* devo_rev */
134 0, /* devo_refcnt */
135 NULL, /* devo_getinfo */
136 nulldev, /* devo_identify - obsolete */
137 nulldev, /* devo_probe */
138 audio1575_ddi_attach, /* devo_attach */
139 audio1575_ddi_detach, /* devo_detach */
140 nodev, /* devo_reset */
141 NULL, /* devi_cb_ops */
142 NULL, /* devo_bus_ops */
143 NULL, /* devo_power */
144 audio1575_ddi_quiesce, /* devo_quiesce */
145 };
146
147 /* Linkage structure for loadable drivers */
148 static struct modldrv audio1575_modldrv = {
149 &mod_driverops, /* drv_modops */
150 M1575_MOD_NAME, /* drv_linkinfo */
151 &audio1575_dev_ops, /* drv_dev_ops */
152 };
153
154 /* Module linkage structure */
155 static struct modlinkage audio1575_modlinkage = {
156 MODREV_1, /* ml_rev */
157 { (void *)&audio1575_modldrv, NULL } /* ml_linkage */
158 };
159
160
161 /*
162 * device access attributes for register mapping
163 */
164 static struct ddi_device_acc_attr dev_attr = {
165 DDI_DEVICE_ATTR_V0,
166 DDI_STRUCTURE_LE_ACC,
167 DDI_STRICTORDER_ACC
168 };
169
170 static struct ddi_device_acc_attr buf_attr = {
171 DDI_DEVICE_ATTR_V0,
172 DDI_NEVERSWAP_ACC,
173 DDI_STRICTORDER_ACC
174 };
175
176 /*
177 * DMA attributes of buffer descriptor list
178 */
179 static ddi_dma_attr_t bdlist_dma_attr = {
180 DMA_ATTR_V0, /* version */
181 0x0000000000000000LL, /* dlim_addr_lo */
182 0x00000000ffffffffLL, /* dlim_addr_hi */
183 0x000000000000ffffLL, /* DMA counter register - 64 bits */
184 0x0000000000000008LL, /* DMA address align must be 8-bytes */
185 0x0000003c, /* 1 through 64 byte burst sizes */
186 0x00000008, /* min xfer DMA size BDList entry */
187 0x00000000000ffffLL, /* max xfer size, 64K */
188 0x000000000001fffLL, /* seg, set to PAGESIZE */
189 0x00000001, /* s/g list length, no s/g */
190 0x00000008, /* granularity of device minxfer */
191 0 /* DMA flags use virtual address */
192 };
193
194 /*
195 * DMA attributes of buffers to be used to receive/send audio data
196 */
197 static ddi_dma_attr_t sample_buf_dma_attr = {
198 DMA_ATTR_V0,
199 0x0000000000000000LL, /* dlim_addr_lo */
200 0x00000000ffffffffLL, /* dlim_addr_hi */
201 0x000000000001fffeLL, /* DMA counter register - 16 bits */
202 0x0000000000000004LL, /* DMA address align 2-byte boundary */
203 0x0000003c, /* 1 through 60 byte burst sizes */
204 0x00000004, /* min xfer DMA size BDList entry */
205 0x000000000001ffffLL, /* max xfer size, 64K */
206 0x000000000001ffffLL, /* seg, set to 64K */
207 0x00000001, /* s/g list length, no s/g */
208 0x00000004, /* granularity of device minxfer */
209 0 /* DMA flags use virtual address */
210 };
211
212 /*
213 * _init()
214 *
215 * Description:
216 * Driver initialization, called when driver is first loaded.
217 * This is how access is initially given to all the static structures.
218 *
219 * Arguments:
220 * None
221 *
222 * Returns:
223 * mod_install() status, see mod_install(9f)
224 */
225 int
226 _init(void)
227 {
228 int error;
229
230 audio_init_ops(&audio1575_dev_ops, M1575_NAME);
231
232 if ((error = mod_install(&audio1575_modlinkage)) != 0) {
233 audio_fini_ops(&audio1575_dev_ops);
234 }
235
236 return (error);
237 }
238
239 /*
240 * _fini()
241 *
242 * Description:
243 * Module de-initialization, called when the driver is to be unloaded.
244 *
245 * Arguments:
246 * None
247 *
248 * Returns:
249 * mod_remove() status, see mod_remove(9f)
250 */
251 int
252 _fini(void)
253 {
254 int error;
255
256 if ((error = mod_remove(&audio1575_modlinkage)) != 0) {
257 return (error);
258 }
259
260 /* clean up ops */
261 audio_fini_ops(&audio1575_dev_ops);
262
263 return (0);
264 }
265
266 /*
267 * _info()
268 *
269 * Description:
270 * Module information, returns information about the driver.
271 *
272 * Arguments:
273 * modinfo *modinfop Pointer to the opaque modinfo structure
274 *
275 * Returns:
276 * mod_info() status, see mod_info(9f)
277 */
278 int
279 _info(struct modinfo *modinfop)
280 {
281 return (mod_info(&audio1575_modlinkage, modinfop));
282 }
283
284
285 /* ******************* Driver Entry Points ********************************* */
286
287 /*
288 * audio1575_ddi_attach()
289 *
290 * Description:
291 * Implements the DDI attach(9e) entry point.
292 *
293 * Arguments:
294 * dev_info_t *dip Pointer to the device's dev_info struct
295 * ddi_attach_cmd_t cmd Attach command
296 *
297 * Returns:
298 * DDI_SUCCESS The driver was initialized properly
299 * DDI_FAILURE The driver couldn't be initialized properly
300 */
301 static int
302 audio1575_ddi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
303 {
304 switch (cmd) {
305 case DDI_ATTACH:
306 return (audio1575_attach(dip));
307
308 case DDI_RESUME:
309 return (audio1575_resume(dip));
310 }
311 return (DDI_FAILURE);
312 }
313
314 /*
315 * audio1575_ddi_detach()
316 *
317 * Description:
318 * Implements the detach(9e) entry point.
319 *
320 * Arguments:
321 * dev_info_t *dip Pointer to the device's dev_info struct
322 * ddi_detach_cmd_t cmd Detach command
323 *
324 * Returns:
325 * DDI_SUCCESS The driver was detached
326 * DDI_FAILURE The driver couldn't be detached
327 */
328 static int
329 audio1575_ddi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
330 {
331 switch (cmd) {
332 case DDI_DETACH:
333 return (audio1575_detach(dip));
334
335 case DDI_SUSPEND:
336 return (audio1575_suspend(dip));
337 }
338 return (DDI_FAILURE);
339 }
340
341 /*
342 * audio1575_ddi_quiesce()
343 *
344 * Description:
345 * Implements the quiesce(9e) entry point.
346 *
347 * Arguments:
348 * dev_info_t *dip Pointer to the device's dev_info struct
349 *
350 * Returns:
351 * DDI_SUCCESS The driver was quiesced
352 * DDI_FAILURE The driver couldn't be quiesced
353 */
354 static int
355 audio1575_ddi_quiesce(dev_info_t *dip)
356 {
357 audio1575_state_t *statep;
358
359 if ((statep = ddi_get_driver_private(dip)) == NULL)
360 return (DDI_FAILURE);
361
362 audio1575_dma_stop(statep, B_TRUE);
363 return (DDI_SUCCESS);
364 }
365
366 /*
367 * audio1575_open()
368 *
369 * Description:
370 * Opens a DMA engine for use.
371 *
372 * Arguments:
373 * void *arg The DMA engine to set up
374 * int flag Open flags
375 * unsigned *nframesp Receives number of frames
376 * caddr_t *bufp Receives kernel data buffer
377 *
378 * Returns:
379 * 0 on success
380 * errno on failure
381 */
382 static int
383 audio1575_open(void *arg, int flag, unsigned *nframesp, caddr_t *bufp)
384 {
385 audio1575_port_t *port = arg;
386
387 _NOTE(ARGUNUSED(flag));
388
389 port->count = 0;
390 *nframesp = port->nframes;
391 *bufp = port->samp_kaddr;
392
393 return (0);
394 }
395
396
397 /*
398 * audio1575_close()
399 *
400 * Description:
401 * Closes an audio DMA engine that was previously opened. Since
402 * nobody is using it, we take this opportunity to possibly power
403 * down the entire device.
404 *
405 * Arguments:
406 * void *arg The DMA engine to shut down
407 */
408 static void
409 audio1575_close(void *arg)
410 {
411 _NOTE(ARGUNUSED(arg));
412 }
413
414 /*
415 * audio1575_stop()
416 *
417 * Description:
418 * This is called by the framework to stop a port that is
419 * transferring data.
420 *
421 * Arguments:
422 * void *arg The DMA engine to stop
423 */
424 static void
425 audio1575_stop(void *arg)
426 {
427 audio1575_port_t *port = arg;
428 audio1575_state_t *statep = port->statep;
429
430 mutex_enter(&statep->lock);
431 if (port->num == M1575_REC) {
432 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE);
433 } else {
434 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE);
435 }
436 mutex_exit(&statep->lock);
437 }
438
439 /*
440 * audio1575_start()
441 *
442 * Description:
443 * This is called by the framework to start a port transferring data.
444 *
445 * Arguments:
446 * void *arg The DMA engine to start
447 *
448 * Returns:
449 * 0 on success (never fails, errno if it did)
450 */
451 static int
452 audio1575_start(void *arg)
453 {
454 audio1575_port_t *port = arg;
455 audio1575_state_t *statep = port->statep;
456
457 mutex_enter(&statep->lock);
458
459 port->offset = 0;
460
461 if (port->num == M1575_REC) {
462 /* Uli FIFO madness ... */
463 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST);
464 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE);
465
466 PUT8(M1575_PCMICR_REG, 0);
467 PUT8(M1575_PCMICR_REG, M1575_CR_RR);
468
469 PUT32(M1575_PCMIBDBAR_REG, port->bdl_paddr);
470 PUT8(M1575_PCMILVIV_REG, M1575_BD_NUMS - 1);
471
472 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE);
473
474 /* ULi says do fifo resets here */
475 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST);
476 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE);
477 PUT8(M1575_PCMICR_REG, 0);
478 SET32(M1575_DMACR_REG, M1575_DMACR_PCMISTART);
479
480 } else {
481
482 uint32_t scr;
483
484 /* Uli FIFO madness ... */
485 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMORST);
486 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE);
487
488 /* configure the number of channels properly */
489 scr = GET32(M1575_SCR_REG);
490 scr &= ~(M1575_SCR_6CHL_MASK | M1575_SCR_CHAMOD_MASK);
491 scr |= M1575_SCR_6CHL_2; /* select our proper ordering */
492 switch (port->nchan) {
493 case 2:
494 scr |= M1575_SCR_CHAMOD_2;
495 break;
496 case 4:
497 scr |= M1575_SCR_CHAMOD_4;
498 break;
499 case 6:
500 scr |= M1575_SCR_CHAMOD_6;
501 break;
502 }
503 PUT32(M1575_SCR_REG, scr);
504
505 PUT8(M1575_PCMOCR_REG, 0);
506 PUT8(M1575_PCMOCR_REG, M1575_CR_RR);
507
508 PUT32(M1575_PCMOBDBAR_REG, port->bdl_paddr);
509 PUT8(M1575_PCMOLVIV_REG, M1575_BD_NUMS - 1);
510
511 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE);
512 PUT8(M1575_PCMOCR_REG, 0);
513 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOSTART);
514 }
515
516 mutex_exit(&statep->lock);
517 return (0);
518 }
519
520
521
522 /*
523 * audio1575_format()
524 *
525 * Description:
526 * Called by the framework to query the format for the device.
527 *
528 * Arguments:
529 * void *arg The DMA engine to query
530 *
531 * Returns:
532 * AUDIO_FORMAT_S16_LE
533 */
534 static int
535 audio1575_format(void *arg)
536 {
537 _NOTE(ARGUNUSED(arg));
538
539 return (AUDIO_FORMAT_S16_LE);
540 }
541
542 /*
543 * audio1575_channels()
544 *
545 * Description:
546 * Called by the framework to query the channels for the device.
547 *
548 * Arguments:
549 * void *arg The DMA engine to query
550 *
551 * Returns:
552 * Number of channels for the device
553 */
554 static int
555 audio1575_channels(void *arg)
556 {
557 audio1575_port_t *port = arg;
558
559 return (port->nchan);
560 }
561
562 /*
563 * audio1575_rate()
564 *
565 * Description:
566 * Called by the framework to query the sample rate for the device.
567 *
568 * Arguments:
569 * void *arg The DMA engine to query
570 *
571 * Returns:
572 * 48000
573 */
574 static int
575 audio1575_rate(void *arg)
576 {
577 _NOTE(ARGUNUSED(arg));
578
579 return (48000);
580 }
581
582 /*
583 * audio1575_count()
584 *
585 * Description:
586 * This is called by the framework to get the engine's frame counter
587 *
588 * Arguments:
589 * void *arg The DMA engine to query
590 *
591 * Returns:
592 * frame count for current engine
593 */
594 static uint64_t
595 audio1575_count(void *arg)
596 {
597 audio1575_port_t *port = arg;
598 audio1575_state_t *statep = port->statep;
599 uint64_t val;
600 uint8_t civ;
601 unsigned n;
602 int civoff;
603 int lvioff;
604 int picoff;
605
606 mutex_enter(&statep->lock);
607
608 if (port->num == M1575_REC) {
609 civoff = M1575_PCMICIV_REG;
610 lvioff = M1575_PCMILVIV_REG;
611 picoff = M1575_PCMIPICB_REG;
612 } else {
613 civoff = M1575_PCMOCIV_REG;
614 lvioff = M1575_PCMOLVIV_REG;
615 picoff = M1575_PCMOPICB_REG;
616 }
617
618 /*
619 * Read the position counters. We also take this opportunity
620 * to update the last valid index to the one just previous to
621 * the one we're working on (so we'll fully loop.)
622 */
623 n = GET16(picoff);
624 civ = GET8(civoff);
625 PUT8(lvioff, (civ - 1) % M1575_BD_NUMS);
626
627 n = port->samp_size - (n * sizeof (int16_t));
628 if (n < port->offset) {
629 val = (port->samp_size - port->offset) + n;
630 } else {
631 val = n - port->offset;
632 }
633 port->offset = n;
634 port->count += (val / (port->nchan * sizeof (int16_t)));
635 val = port->count;
636 mutex_exit(&statep->lock);
637
638 return (val);
639 }
640
641 /*
642 * audio1575_sync()
643 *
644 * Description:
645 * This is called by the framework to synchronize DMA caches.
646 *
647 * Arguments:
648 * void *arg The DMA engine to sync
649 */
650 static void
651 audio1575_sync(void *arg, unsigned nframes)
652 {
653 audio1575_port_t *port = arg;
654 _NOTE(ARGUNUSED(nframes));
655
656 (void) ddi_dma_sync(port->samp_dmah, 0, 0, port->sync_dir);
657 }
658
659 /*
660 * audio1575_attach()
661 *
662 * Description:
663 * Attach an instance of the audio1575 driver. This routine does the
664 * device dependent attach tasks. When it is completed, it registers
665 * with the audio framework.
666 *
667 * Arguments:
668 * dev_info_t *dip Pointer to the device's dev_info struct
669 *
670 * Returns:
671 * DDI_SUCCESS The driver was initialized properly
672 * DDI_FAILURE The driver couldn't be initialized properly
673 */
674 static int
675 audio1575_attach(dev_info_t *dip)
676 {
677 audio1575_state_t *statep;
678 audio_dev_t *adev;
679 uint32_t devid;
680 const char *name;
681 const char *rev;
682 int maxch;
683
684 /* allocate the soft state structure */
685 statep = kmem_zalloc(sizeof (*statep), KM_SLEEP);
686 ddi_set_driver_private(dip, statep);
687 statep->dip = dip;
688
689 /*
690 * We want the micboost enabled by default as well.
691 */
692 (void) ddi_prop_update_int(DDI_DEV_T_NONE, dip, AC97_PROP_MICBOOST, 1);
693
694 /* allocate common audio dev structure */
695 adev = audio_dev_alloc(dip, 0);
696 if (adev == NULL) {
697 audio_dev_warn(NULL, "unable to allocate audio dev");
698 goto error;
699 }
700 statep->adev = adev;
701
702 /* map in the audio registers */
703 if (audio1575_map_regs(statep) != DDI_SUCCESS) {
704 audio_dev_warn(adev, "couldn't map registers");
705 goto error;
706 }
707
708 /* Enable PCI I/O and Memory Spaces */
709 audio1575_pci_enable(statep);
710
711 devid = (pci_config_get16(statep->pcih, PCI_CONF_VENID) << 16) |
712 pci_config_get16(statep->pcih, PCI_CONF_DEVID);
713 switch (devid) {
714 case 0x10b95455:
715 name = "Uli M1575 AC'97";
716 rev = "M5455";
717 break;
718 default:
719 name = "Uli AC'97";
720 rev = "Unknown";
721 break;
722 }
723 /* set device information -- this should check PCI config space */
724 audio_dev_set_description(adev, name);
725 audio_dev_set_version(adev, rev);
726
727 statep->ac97 = ac97_alloc(dip, audio1575_read_ac97,
728 audio1575_write_ac97, statep);
729 ASSERT(statep->ac97 != NULL);
730
731 /*
732 * Override "max-channels" property to prevent configuration
733 * of 4 or 6 (or possibly even 8!) channel audio. The default
734 * is to support as many channels as the hardware can do.
735 */
736 maxch = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
737 "max-channels", ac97_num_channels(statep->ac97));
738 if (maxch < 2) {
739 maxch = 2;
740 }
741
742 statep->maxch = min(maxch, 6) & ~1;
743
744 /* allocate port structures */
745 if ((audio1575_alloc_port(statep, M1575_PLAY, statep->maxch) !=
746 DDI_SUCCESS) ||
747 (audio1575_alloc_port(statep, M1575_REC, 2) != DDI_SUCCESS)) {
748 goto error;
749 }
750
751 if (audio1575_chip_init(statep) != DDI_SUCCESS) {
752 audio_dev_warn(adev, "failed to init chip");
753 goto error;
754 }
755
756 if (ac97_init(statep->ac97, adev) != DDI_SUCCESS) {
757 audio_dev_warn(adev, "ac'97 initialization failed");
758 goto error;
759 }
760
761 /* register with the framework */
762 if (audio_dev_register(adev) != DDI_SUCCESS) {
763 audio_dev_warn(adev, "unable to register with framework");
764 goto error;
765 }
766
767 /* everything worked out, so report the device */
768 ddi_report_dev(dip);
769
770 return (DDI_SUCCESS);
771
772 error:
773 audio1575_destroy(statep);
774 return (DDI_FAILURE);
775 }
776
777 /*
778 * audio1575_detach()
779 *
780 * Description:
781 * Detach an instance of the audio1575 driver.
782 *
783 * Arguments:
784 * dev_info_t *dip Pointer to the device's dev_info struct
785 *
786 * Returns:
787 * DDI_SUCCESS The driver was detached
788 * DDI_FAILURE The driver couldn't be detached
789 */
790 static int
791 audio1575_detach(dev_info_t *dip)
792 {
793 audio1575_state_t *statep;
794
795 statep = ddi_get_driver_private(dip);
796
797 if (audio_dev_unregister(statep->adev) != DDI_SUCCESS) {
798 return (DDI_FAILURE);
799 }
800
801 audio1575_destroy(statep);
802 return (DDI_SUCCESS);
803 }
804
805 /* *********************** Local Routines *************************** */
806
807 /*
808 * audio1575_alloc_port()
809 *
810 * Description:
811 * This routine allocates the DMA handles and the memory for the
812 * DMA engines to use. It also configures the BDL lists properly
813 * for use.
814 *
815 * Arguments:
816 * dev_info_t *dip Pointer to the device's devinfo
817 * int num M1575_PLAY or M1575_REC
818 * uint8_t nchan Number of channels (2 = stereo, 6 = 5.1, etc.)
819 *
820 * Returns:
821 * DDI_SUCCESS Registers successfully mapped
822 * DDI_FAILURE Registers not successfully mapped
823 */
824 static int
825 audio1575_alloc_port(audio1575_state_t *statep, int num, uint8_t nchan)
826 {
827 ddi_dma_cookie_t cookie;
828 uint_t count;
829 int dir;
830 unsigned caps;
831 audio_dev_t *adev;
832 audio1575_port_t *port;
833 uint32_t *kaddr;
834 int rc;
835 dev_info_t *dip;
836
837 adev = statep->adev;
838 dip = statep->dip;
839
840 port = kmem_zalloc(sizeof (*port), KM_SLEEP);
841 statep->ports[num] = port;
842 port->num = num;
843 port->statep = statep;
844 port->nchan = nchan;
845
846 if (num == M1575_REC) {
847 dir = DDI_DMA_READ;
848 caps = ENGINE_INPUT_CAP;
849 port->sync_dir = DDI_DMA_SYNC_FORKERNEL;
850 } else {
851 dir = DDI_DMA_WRITE;
852 caps = ENGINE_OUTPUT_CAP;
853 port->sync_dir = DDI_DMA_SYNC_FORDEV;
854 }
855
856 /*
857 * We use one big sample area. The sample area must be larger
858 * than about 1.5 framework fragment sizes. (Currently 480 *
859 * 1.5 = 720 frames.) This is necessary to ensure that we
860 * don't have to involve an interrupt service routine on our
861 * own, to keep the last valid index updated reasonably.
862 */
863 port->nframes = 2048;
864 port->samp_size = port->nframes * port->nchan * sizeof (int16_t);
865
866 /* allocate dma handle */
867 rc = ddi_dma_alloc_handle(dip, &sample_buf_dma_attr, DDI_DMA_SLEEP,
868 NULL, &port->samp_dmah);
869 if (rc != DDI_SUCCESS) {
870 audio_dev_warn(adev, "ddi_dma_alloc_handle failed: %d", rc);
871 return (DDI_FAILURE);
872 }
873 /* allocate DMA buffer */
874 rc = ddi_dma_mem_alloc(port->samp_dmah, port->samp_size, &buf_attr,
875 DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, &port->samp_kaddr,
876 &port->samp_size, &port->samp_acch);
877 if (rc == DDI_FAILURE) {
878 audio_dev_warn(adev, "dma_mem_alloc failed");
879 return (DDI_FAILURE);
880 }
881
882 /* bind DMA buffer */
883 rc = ddi_dma_addr_bind_handle(port->samp_dmah, NULL,
884 port->samp_kaddr, port->samp_size, dir|DDI_DMA_CONSISTENT,
885 DDI_DMA_SLEEP, NULL, &cookie, &count);
886 if ((rc != DDI_DMA_MAPPED) || (count != 1)) {
887 audio_dev_warn(adev,
888 "ddi_dma_addr_bind_handle failed: %d", rc);
889 return (DDI_FAILURE);
890 }
891 port->samp_paddr = cookie.dmac_address;
892
893 /*
894 * now, from here we allocate DMA memory for buffer descriptor list.
895 * we allocate adjacent DMA memory for all DMA engines.
896 */
897 rc = ddi_dma_alloc_handle(dip, &bdlist_dma_attr, DDI_DMA_SLEEP,
898 NULL, &port->bdl_dmah);
899 if (rc != DDI_SUCCESS) {
900 audio_dev_warn(adev, "ddi_dma_alloc_handle(bdlist) failed");
901 return (DDI_FAILURE);
902 }
903
904 /*
905 * we allocate all buffer descriptors lists in continuous dma memory.
906 */
907 port->bdl_size = sizeof (m1575_bd_entry_t) * M1575_BD_NUMS;
908 rc = ddi_dma_mem_alloc(port->bdl_dmah, port->bdl_size,
909 &dev_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL,
910 &port->bdl_kaddr, &port->bdl_size, &port->bdl_acch);
911 if (rc != DDI_SUCCESS) {
912 audio_dev_warn(adev, "ddi_dma_mem_alloc(bdlist) failed");
913 return (DDI_FAILURE);
914 }
915
916 /*
917 * Wire up the BD list. We do this *before* binding the BD list
918 * so that we don't have to do an extra ddi_dma_sync.
919 */
920 kaddr = (void *)port->bdl_kaddr;
921 for (int i = 0; i < M1575_BD_NUMS; i++) {
922
923 /* set base address of buffer */
924 ddi_put32(port->bdl_acch, kaddr, port->samp_paddr);
925 kaddr++;
926
927 /* set size in frames, and enable IOC interrupt */
928 ddi_put32(port->bdl_acch, kaddr,
929 ((port->samp_size / sizeof (int16_t)) | (1U << 31)));
930 kaddr++;
931 }
932
933 rc = ddi_dma_addr_bind_handle(port->bdl_dmah, NULL, port->bdl_kaddr,
934 port->bdl_size, DDI_DMA_WRITE|DDI_DMA_CONSISTENT, DDI_DMA_SLEEP,
935 NULL, &cookie, &count);
936 if ((rc != DDI_DMA_MAPPED) || (count != 1)) {
937 audio_dev_warn(adev, "addr_bind_handle failed");
938 return (DDI_FAILURE);
939 }
940 port->bdl_paddr = cookie.dmac_address;
941
942 port->engine = audio_engine_alloc(&audio1575_engine_ops, caps);
943 if (port->engine == NULL) {
944 audio_dev_warn(adev, "audio_engine_alloc failed");
945 return (DDI_FAILURE);
946 }
947
948 audio_engine_set_private(port->engine, port);
949 audio_dev_add_engine(adev, port->engine);
950
951 return (DDI_SUCCESS);
952 }
953
954 /*
955 * audio1575_free_port()
956 *
957 * Description:
958 * This routine unbinds the DMA cookies, frees the DMA buffers,
959 * deallocates the DMA handles.
960 *
961 * Arguments:
962 * audio1575_port_t *port The port structure for a DMA engine.
963 */
964 static void
965 audio1575_free_port(audio1575_port_t *port)
966 {
967 if (port == NULL)
968 return;
969
970 if (port->engine) {
971 audio_dev_remove_engine(port->statep->adev, port->engine);
972 audio_engine_free(port->engine);
973 }
974 if (port->bdl_paddr) {
975 (void) ddi_dma_unbind_handle(port->bdl_dmah);
976 }
977 if (port->bdl_acch) {
978 ddi_dma_mem_free(&port->bdl_acch);
979 }
980 if (port->bdl_dmah) {
981 ddi_dma_free_handle(&port->bdl_dmah);
982 }
983 if (port->samp_paddr) {
984 (void) ddi_dma_unbind_handle(port->samp_dmah);
985 }
986 if (port->samp_acch) {
987 ddi_dma_mem_free(&port->samp_acch);
988 }
989 if (port->samp_dmah) {
990 ddi_dma_free_handle(&port->samp_dmah);
991 }
992 kmem_free(port, sizeof (*port));
993 }
994
995 /*
996 * audio1575_map_regs()
997 *
998 * Description:
999 * The registers are mapped in.
1000 *
1001 * Arguments:
1002 * dev_info_t *dip Pointer to the device's devinfo
1003 *
1004 * Returns:
1005 * DDI_SUCCESS Registers successfully mapped
1006 * DDI_FAILURE Registers not successfully mapped
1007 */
1008 static int
1009 audio1575_map_regs(audio1575_state_t *statep)
1010 {
1011 dev_info_t *dip = statep->dip;
1012
1013 /* map the M1575 Audio PCI Cfg Space */
1014 if (pci_config_setup(dip, &statep->pcih) != DDI_SUCCESS) {
1015 audio_dev_warn(statep->adev, "PCI config map failure");
1016 goto error;
1017 }
1018
1019 /* map the M1575 Audio registers in PCI IO Space */
1020 if ((ddi_regs_map_setup(dip, M1575_AUDIO_IO_SPACE, &statep->regsp,
1021 0, 0, &dev_attr, &statep->regsh)) != DDI_SUCCESS) {
1022 audio_dev_warn(statep->adev, "Audio IO mapping failure");
1023 goto error;
1024 }
1025 return (DDI_SUCCESS);
1026
1027 error:
1028 audio1575_unmap_regs(statep);
1029
1030 return (DDI_FAILURE);
1031 }
1032
1033 /*
1034 * audio1575_unmap_regs()
1035 *
1036 * Description:
1037 * This routine unmaps control registers.
1038 *
1039 * Arguments:
1040 * audio1575_state_t *state The device's state structure
1041 */
1042 static void
1043 audio1575_unmap_regs(audio1575_state_t *statep)
1044 {
1045 if (statep->regsh) {
1046 ddi_regs_map_free(&statep->regsh);
1047 }
1048
1049 if (statep->pcih) {
1050 pci_config_teardown(&statep->pcih);
1051 }
1052 }
1053
1054 /*
1055 * audio1575_chip_init()
1056 *
1057 * Description:
1058 * This routine initializes the M1575 AC97 audio controller and the AC97
1059 * codec. The AC97 codec registers are programmed from codec_shadow[].
1060 * If we are not doing a restore, we initialize codec_shadow[], otherwise
1061 * we use the current values of shadow. This routine expects that the
1062 * PCI IO and Memory spaces have been mapped and enabled already.
1063 * Arguments:
1064 * audio1575_state_t *state The device's state structure
1065 * restore from codec_shadow[]
1066 * Returns:
1067 * DDI_SUCCESS The hardware was initialized properly
1068 * DDI_FAILURE The hardware couldn't be initialized properly
1069 */
1070 static int
1071 audio1575_chip_init(audio1575_state_t *statep)
1072 {
1073 uint32_t ssr;
1074 uint32_t rtsr;
1075 uint32_t intrsr;
1076 int i;
1077 int j;
1078 #ifdef __sparc
1079 uint8_t clk_detect;
1080 ddi_acc_handle_t pcih;
1081 #endif
1082 clock_t ticks;
1083
1084 /*
1085 * clear the interrupt control and status register
1086 * READ/WRITE/READ workaround required
1087 * for buggy hardware
1088 */
1089
1090 PUT32(M1575_INTRCR_REG, 0);
1091 (void) GET32(M1575_INTRCR_REG);
1092
1093 intrsr = GET32(M1575_INTRSR_REG);
1094 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK));
1095 (void) GET32(M1575_INTRSR_REG);
1096
1097 ticks = drv_usectohz(M1575_LOOP_CTR);
1098
1099 /*
1100 * SADA only supports stereo, so we set the channel bits
1101 * to "00" to select 2 channels.
1102 * will also set the following:
1103 *
1104 * Disable double rate enable
1105 * no SPDIF output selected
1106 * 16 bit audio record mode
1107 * 16 bit pcm out mode
1108 * PCM Out 6 chan mode FL FR CEN BL BR LFE
1109 * PCM Out 2 channel mode (00)
1110 */
1111 for (i = 0; i < M1575_LOOP_CTR; i++) {
1112 /* Reset the AC97 Codec and default to 2 channel 16 bit mode */
1113 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST);
1114 delay(ticks<<1);
1115
1116 /* Read the System Status Reg */
1117 ssr = GET32(M1575_SSR_REG);
1118
1119 /* make sure and release the blocked reset bit */
1120 if (ssr & M1575_SSR_RSTBLK) {
1121 SET32(M1575_INTFCR_REG, M1575_INTFCR_RSTREL);
1122 delay(ticks);
1123
1124 /* Read the System Status Reg */
1125 ssr = GET32(M1575_SSR_REG);
1126
1127 /* make sure and release the blocked reset bit */
1128 if (ssr & M1575_SSR_RSTBLK) {
1129 return (DDI_FAILURE);
1130 }
1131
1132 /* Reset the controller */
1133 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST);
1134 delay(ticks);
1135 }
1136
1137 /* according AC'97 spec, wait for codec reset */
1138 for (j = 0; j < M1575_LOOP_CTR; j++) {
1139 if ((GET32(M1575_SCR_REG) & M1575_SCR_COLDRST) == 0) {
1140 break;
1141 }
1142 delay(ticks);
1143 }
1144
1145 /* codec reset failed */
1146 if (j >= M1575_LOOP_CTR) {
1147 audio_dev_warn(statep->adev,
1148 "failure to reset codec");
1149 return (DDI_FAILURE);
1150 }
1151
1152 /*
1153 * Wait for FACRDY First codec ready. The hardware can
1154 * provide the state of
1155 * codec ready bit on SDATA_IN[0] and as reflected in
1156 * the Recv Tag Slot Reg.
1157 */
1158 rtsr = GET32(M1575_RTSR_REG);
1159 if (rtsr & M1575_RTSR_FACRDY) {
1160 break;
1161 } else { /* reset the status and wait for new status to set */
1162 rtsr |= M1575_RTSR_FACRDY;
1163 PUT32(M1575_RTSR_REG, rtsr);
1164 drv_usecwait(10);
1165 }
1166 }
1167
1168 /* if we could not reset the AC97 codec then report failure */
1169 if (i >= M1575_LOOP_CTR) {
1170 audio_dev_warn(statep->adev,
1171 "no codec ready signal received");
1172 return (DDI_FAILURE);
1173 }
1174
1175 #ifdef __sparc
1176 /* Magic code from ULi to Turn on the AC_LINK clock */
1177 pcih = statep->pcih;
1178 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1179 pci_config_put8(pcih, M1575_PCIACD_REG, 4);
1180 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1181 (void) pci_config_get8(pcih, M1575_PCIACD_REG);
1182 pci_config_put8(pcih, M1575_PCIACD_REG, 2);
1183 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1184 clk_detect = pci_config_get8(pcih, M1575_PCIACD_REG);
1185
1186 if (clk_detect != 1) {
1187 audio_dev_warn(statep->adev, "No AC97 Clock Detected");
1188 return (DDI_FAILURE);
1189 }
1190 #endif
1191
1192 /* Magic code from Uli to Init FIFO1 and FIFO2 */
1193 PUT32(M1575_FIFOCR1_REG, 0x81818181);
1194 PUT32(M1575_FIFOCR2_REG, 0x81818181);
1195 PUT32(M1575_FIFOCR3_REG, 0x81818181);
1196
1197 /* Make sure that PCM in and PCM out are enabled */
1198 SET32(M1575_INTFCR_REG, (M1575_INTFCR_PCMIENB | M1575_INTFCR_PCMOENB));
1199
1200 audio1575_dma_stop(statep, B_FALSE);
1201
1202 return (DDI_SUCCESS);
1203 }
1204
1205 /*
1206 * audio1575_dma_stop()
1207 *
1208 * Description:
1209 * This routine is used to put each DMA engine into the quiet state.
1210 *
1211 * Arguments:
1212 * audio1575_state_t *statep The device's state structure
1213 */
1214 static void
1215 audio1575_dma_stop(audio1575_state_t *statep, boolean_t quiesce)
1216 {
1217 uint32_t intrsr;
1218 int i;
1219
1220 if (statep->regsh == NULL) {
1221 return;
1222 }
1223
1224 /* pause bus master (needed for the following reset register) */
1225 for (i = 0; i < M1575_LOOP_CTR; i++) {
1226
1227 SET32(M1575_DMACR_REG, M1575_DMACR_PAUSE_ALL);
1228 if (GET32(M1575_DMACR_REG) & M1575_DMACR_PAUSE_ALL) {
1229 break;
1230 }
1231 drv_usecwait(10);
1232 }
1233
1234 if (i >= M1575_LOOP_CTR) {
1235 if (!quiesce)
1236 audio_dev_warn(statep->adev, "failed to stop DMA");
1237 return;
1238 }
1239
1240 /* Pause bus master (needed for the following reset register) */
1241 PUT8(M1575_PCMICR_REG, 0);
1242 PUT8(M1575_PCMOCR_REG, 0);
1243 PUT8(M1575_MICICR_REG, 0);
1244 PUT8(M1575_CSPOCR_REG, 0);
1245 PUT8(M1575_PCMI2CR_RR, 0);
1246 PUT8(M1575_MICI2CR_RR, 0);
1247
1248 /* Reset the bus master registers for all DMA engines */
1249 PUT8(M1575_PCMICR_REG, M1575_PCMICR_RR);
1250 PUT8(M1575_PCMOCR_REG, M1575_PCMOCR_RR);
1251 PUT8(M1575_MICICR_REG, M1575_MICICR_RR);
1252 PUT8(M1575_CSPOCR_REG, M1575_CSPOCR_RR);
1253 PUT8(M1575_PCMI2CR_REG, M1575_PCMI2CR_RR);
1254 PUT8(M1575_MICI2CR_REG, M1575_MICI2CR_RR);
1255
1256 /* Reset FIFOS */
1257 PUT32(M1575_FIFOCR1_REG, 0x81818181);
1258 PUT32(M1575_FIFOCR2_REG, 0x81818181);
1259 PUT32(M1575_FIFOCR3_REG, 0x81818181);
1260
1261 /* Clear Interrupts */
1262 SET16(M1575_PCMISR_REG, M1575_SR_CLR);
1263 SET16(M1575_PCMOSR_REG, M1575_SR_CLR);
1264 SET16(M1575_MICISR_REG, M1575_SR_CLR);
1265 SET16(M1575_CSPOSR_REG, M1575_SR_CLR);
1266 SET16(M1575_PCMI2SR_REG, M1575_SR_CLR);
1267 SET16(M1575_MICI2SR_REG, M1575_SR_CLR);
1268
1269 /*
1270 * clear the interrupt control and status register
1271 * READ/WRITE/READ workaround required to flush PCI caches
1272 */
1273
1274 PUT32(M1575_INTRCR_REG, 0);
1275 (void) GET32(M1575_INTRCR_REG);
1276
1277 intrsr = GET32(M1575_INTRSR_REG);
1278 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK));
1279 (void) GET32(M1575_INTRSR_REG);
1280 }
1281
1282 /*
1283 * audio1575_codec_sync()
1284 *
1285 * Description:
1286 * Serialize access to the AC97 audio mixer registers.
1287 *
1288 * Arguments:
1289 * audio1575_state_t *state The device's state structure
1290 *
1291 * Returns:
1292 * DDI_SUCCESS Ready for an I/O access to the codec
1293 * DDI_FAILURE An I/O access is currently in progress, can't
1294 * perform another I/O access.
1295 */
1296 static int
1297 audio1575_codec_sync(audio1575_state_t *statep)
1298 {
1299 /* do the Uli Shuffle ... */
1300 for (int i = 0; i < M1575_LOOP_CTR; i++) {
1301 /* Read the semaphore, and loop till we own it */
1302 if ((GET32(M1575_CASR_REG) & 1) == 0) {
1303 for (int j = 0; j < M1575_LOOP_CTR; j++) {
1304 /* Wait for CWRSUCC 0x8 */
1305 if (GET32(M1575_CSPSR_REG) &
1306 M1575_CSPSR_SUCC) {
1307 return (DDI_SUCCESS);
1308 }
1309 drv_usecwait(1);
1310 }
1311 }
1312 drv_usecwait(10);
1313 }
1314
1315 return (DDI_FAILURE);
1316 }
1317
1318 /*
1319 * audio1575_write_ac97()
1320 *
1321 * Description:
1322 * Set the specific AC97 Codec register.
1323 *
1324 * Arguments:
1325 * void *arg The device's state structure
1326 * uint8_t reg AC97 register number
1327 * uint16_t data The data want to be set
1328 */
1329 static void
1330 audio1575_write_ac97(void *arg, uint8_t reg, uint16_t data)
1331 {
1332 audio1575_state_t *statep = arg;
1333 int i;
1334
1335 if (audio1575_codec_sync(statep) != DDI_SUCCESS) {
1336 return;
1337 }
1338
1339 /* write the data to WRITE to the lo word of the CPR register */
1340 PUT16(M1575_CPR_REG, data);
1341
1342 /* write the address to WRITE to the hi word of the CPR register */
1343 PUT16(M1575_CPR_REG+2, reg);
1344
1345 /* wait until command is completed sucessfully */
1346 for (i = 0; i < M1575_LOOP_CTR; i++) {
1347 /* Wait for Write Ready 0x01 */
1348 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_WRRDY) {
1349 break;
1350 }
1351 drv_usecwait(1);
1352 }
1353
1354 if (i < M1575_LOOP_CTR) {
1355 (void) audio1575_read_ac97(statep, reg);
1356 }
1357 }
1358
1359 /*
1360 * audio1575_read_ac97()
1361 *
1362 * Description:
1363 * Get the specific AC97 Codec register. It also updates codec_shadow[]
1364 * with the register value.
1365 *
1366 * Arguments:
1367 * void *arg The device's state structure
1368 * uint8_t reg AC97 register number
1369 *
1370 * Returns:
1371 * Value of AC97 register. (0xffff in failure situations).
1372 */
1373 static uint16_t
1374 audio1575_read_ac97(void *arg, uint8_t reg)
1375 {
1376 audio1575_state_t *statep = arg;
1377 uint16_t addr = 0;
1378 uint16_t data = 0xffff;
1379 int i;
1380
1381 if ((audio1575_codec_sync(statep)) != DDI_SUCCESS) {
1382 return (data);
1383 }
1384
1385 /*
1386 * at this point we have the CASR semaphore
1387 * and the codec is r/w ready
1388 * OR in the READ opcode into the address field
1389 */
1390
1391 addr = (reg | M1575_CPR_READ);
1392
1393 /* write the address to READ to the hi word of the CPR register */
1394 PUT16(M1575_CPR_REG+2, addr);
1395
1396 /* wait until command is completed sucessfully */
1397 for (i = 0; i < M1575_LOOP_CTR; i++) {
1398 /* Wait for Read Ready 0x02 */
1399 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_RDRDY) {
1400 break;
1401 }
1402 drv_usecwait(1);
1403 }
1404
1405 if (i < M1575_LOOP_CTR) {
1406 /* read back the data and address */
1407 data = GET16(M1575_SPR_REG);
1408 addr = GET16(M1575_SPR_REG+2);
1409 if (addr != reg) {
1410 data = 0xffff;
1411 }
1412 }
1413
1414 return (data);
1415 }
1416
1417 /*
1418 * audio1575_pci_enable()
1419 *
1420 * Description:
1421 * This routine Enables all PCI IO and MEMORY accesses
1422 *
1423 * Arguments:
1424 * audio1575_state_t *statep The device's state structure
1425 */
1426 static void
1427 audio1575_pci_enable(audio1575_state_t *statep)
1428 {
1429 uint16_t pcics_reg;
1430
1431 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM);
1432 pcics_reg |= (PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
1433 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg);
1434 }
1435
1436 /*
1437 * audio1575_pci_disable()
1438 *
1439 * Description:
1440 * This routine Disables all PCI IO and MEMORY accesses
1441 *
1442 * Arguments:
1443 * audio1575_state_t *statep The device's state structure
1444 */
1445 static void
1446 audio1575_pci_disable(audio1575_state_t *statep)
1447 {
1448 uint16_t pcics_reg;
1449
1450 if (statep->pcih == NULL)
1451 return;
1452 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM);
1453 pcics_reg &= ~(PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
1454 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg);
1455 }
1456
1457 /*
1458 * audio1575_resume()
1459 *
1460 * Description:
1461 * Resume operation of the device after sleeping or hibernating.
1462 * Note that this should never fail, even if hardware goes wonky,
1463 * because the current PM framework will panic if it does.
1464 *
1465 * Arguments:
1466 * dev_info_t *dip Pointer to the device's dev_info struct
1467 *
1468 * Returns:
1469 * DDI_SUCCESS The driver was resumed
1470 */
1471 static int
1472 audio1575_resume(dev_info_t *dip)
1473 {
1474 audio1575_state_t *statep;
1475 audio_dev_t *adev;
1476
1477 /* we've already allocated the state structure so get ptr */
1478 statep = ddi_get_driver_private(dip);
1479 adev = statep->adev;
1480 ASSERT(!mutex_owned(&statep->lock));
1481
1482 if (audio1575_chip_init(statep) != DDI_SUCCESS) {
1483 /*
1484 * Note that PM gurus say we should return
1485 * success here. Failure of audio shouldn't
1486 * be considered FATAL to the system. The
1487 * upshot is that audio will not progress.
1488 */
1489 audio_dev_warn(adev, "DDI_RESUME failed to init chip");
1490 return (DDI_SUCCESS);
1491 }
1492
1493 /* allow ac97 operations again */
1494 ac97_reset(statep->ac97);
1495
1496 audio_dev_resume(adev);
1497
1498 return (DDI_SUCCESS);
1499 }
1500
1501 /*
1502 * audio1575_suspend()
1503 *
1504 * Description:
1505 * Suspend an instance of the audio1575 driver.
1506 *
1507 * Arguments:
1508 * dev_info_t *dip Pointer to the device's dev_info struct
1509 *
1510 * Returns:
1511 * DDI_SUCCESS The driver was suspended
1512 */
1513 static int
1514 audio1575_suspend(dev_info_t *dip)
1515 {
1516 audio1575_state_t *statep;
1517
1518 statep = ddi_get_driver_private(dip);
1519
1520 audio_dev_suspend(statep->adev);
1521
1522 return (DDI_SUCCESS);
1523 }
1524
1525 /*
1526 * audio1575_destroy()
1527 *
1528 * Description:
1529 * This routine releases all resources held by the device instance,
1530 * as part of either detach or a failure in attach.
1531 *
1532 * Arguments:
1533 * audio1575_state_t *state The device soft state.
1534 */
1535 void
1536 audio1575_destroy(audio1575_state_t *statep)
1537 {
1538 ddi_acc_handle_t pcih;
1539
1540 /* stop DMA engines */
1541 audio1575_dma_stop(statep, B_FALSE);
1542
1543 if (statep->regsh != NULL) {
1544 /* reset the codec */
1545 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST);
1546 }
1547
1548 if ((pcih = statep->pcih) != NULL) {
1549 /* turn off the AC_LINK clock */
1550 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1551 pci_config_put8(pcih, M1575_PCIACD_REG, 4);
1552 pci_config_put8(pcih, M1575_PCIACD_REG, 0);
1553 }
1554
1555 /* Disable PCI I/O and Memory Spaces */
1556 audio1575_pci_disable(statep);
1557
1558 audio1575_free_port(statep->ports[M1575_PLAY]);
1559 audio1575_free_port(statep->ports[M1575_REC]);
1560
1561 audio1575_unmap_regs(statep);
1562
1563 if (statep->ac97 != NULL) {
1564 ac97_free(statep->ac97);
1565 }
1566
1567 if (statep->adev != NULL) {
1568 audio_dev_free(statep->adev);
1569 }
1570
1571 kmem_free(statep, sizeof (*statep));
1572 }