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5218 posix definition of NULL
correct unistd.h and iso/stddef_iso.h
update gate source affected
*** 48,58 ****
PCI_MDPE, PCI_STAT_S_PERROR, NULL,
PCI_SIG_SERR, PCI_STAT_S_SYSERR, NULL,
PCI_MA, PCI_STAT_R_MAST_AB, NULL,
PCI_REC_TA, PCI_STAT_R_TARG_AB, NULL,
PCI_SIG_TA, PCI_STAT_S_TARG_AB, NULL,
! NULL, NULL, NULL
};
/* Translate Fabric ereports to ereport.io.pci.sec-* */
static fab_erpt_tbl_t fab_pci_bdg_erpt_tbl[] = {
PCI_DET_PERR, PCI_STAT_PERROR, NULL,
--- 48,58 ----
PCI_MDPE, PCI_STAT_S_PERROR, NULL,
PCI_SIG_SERR, PCI_STAT_S_SYSERR, NULL,
PCI_MA, PCI_STAT_R_MAST_AB, NULL,
PCI_REC_TA, PCI_STAT_R_TARG_AB, NULL,
PCI_SIG_TA, PCI_STAT_S_TARG_AB, NULL,
! NULL, 0 , NULL
};
/* Translate Fabric ereports to ereport.io.pci.sec-* */
static fab_erpt_tbl_t fab_pci_bdg_erpt_tbl[] = {
PCI_DET_PERR, PCI_STAT_PERROR, NULL,
*** 61,78 ****
#ifdef sparc
PCI_MA, PCI_STAT_R_MAST_AB, NULL,
#endif
PCI_REC_TA, PCI_STAT_R_TARG_AB, NULL,
PCI_SIG_TA, PCI_STAT_S_TARG_AB, NULL,
! NULL, NULL, NULL, NULL,
};
/* Translate Fabric ereports to ereport.io.pci.dto */
static fab_erpt_tbl_t fab_pci_bdg_ctl_erpt_tbl[] = {
PCI_DTO, PCI_BCNF_BCNTRL_DTO_STAT, NULL,
! NULL, NULL, NULL
};
/* Translate Fabric ereports to ereport.io.pciex.* */
static fab_erpt_tbl_t fab_pcie_ce_erpt_tbl[] = {
PCIEX_RE, PCIE_AER_CE_RECEIVER_ERR, NULL,
--- 61,78 ----
#ifdef sparc
PCI_MA, PCI_STAT_R_MAST_AB, NULL,
#endif
PCI_REC_TA, PCI_STAT_R_TARG_AB, NULL,
PCI_SIG_TA, PCI_STAT_S_TARG_AB, NULL,
! NULL, 0 , NULL
};
/* Translate Fabric ereports to ereport.io.pci.dto */
static fab_erpt_tbl_t fab_pci_bdg_ctl_erpt_tbl[] = {
PCI_DTO, PCI_BCNF_BCNTRL_DTO_STAT, NULL,
! NULL, 0, NULL
};
/* Translate Fabric ereports to ereport.io.pciex.* */
static fab_erpt_tbl_t fab_pcie_ce_erpt_tbl[] = {
PCIEX_RE, PCIE_AER_CE_RECEIVER_ERR, NULL,
*** 79,89 ****
PCIEX_RNR, PCIE_AER_CE_REPLAY_ROLLOVER, NULL,
PCIEX_RTO, PCIE_AER_CE_REPLAY_TO, NULL,
PCIEX_BDP, PCIE_AER_CE_BAD_DLLP, NULL,
PCIEX_BTP, PCIE_AER_CE_BAD_TLP, NULL,
PCIEX_ANFE, PCIE_AER_CE_AD_NFE, NULL,
! NULL, NULL, NULL
};
/*
* Translate Fabric ereports to ereport.io.pciex.*
* The Target Ereports for this section is only used on leaf devices, with the
--- 79,89 ----
PCIEX_RNR, PCIE_AER_CE_REPLAY_ROLLOVER, NULL,
PCIEX_RTO, PCIE_AER_CE_REPLAY_TO, NULL,
PCIEX_BDP, PCIE_AER_CE_BAD_DLLP, NULL,
PCIEX_BTP, PCIE_AER_CE_BAD_TLP, NULL,
PCIEX_ANFE, PCIE_AER_CE_AD_NFE, NULL,
! NULL, 0, NULL
};
/*
* Translate Fabric ereports to ereport.io.pciex.*
* The Target Ereports for this section is only used on leaf devices, with the
*** 102,112 ****
PCIEX_CA, PCIE_AER_UCE_CA, PCI_TARG_REC_TA,
#ifdef sparc
PCIEX_UR, PCIE_AER_UCE_UR, PCI_TARG_MA,
#endif
PCIEX_POIS, PCIE_AER_UCE_PTLP, PCI_TARG_MDPE,
! NULL, NULL, NULL
};
/* Translate Fabric ereports to ereport.io.pciex.* */
static fab_erpt_tbl_t fab_pcie_sue_erpt_tbl[] = {
PCIEX_S_TA_SC, PCIE_AER_SUCE_TA_ON_SC, PCI_TARG_REC_TA,
--- 102,112 ----
PCIEX_CA, PCIE_AER_UCE_CA, PCI_TARG_REC_TA,
#ifdef sparc
PCIEX_UR, PCIE_AER_UCE_UR, PCI_TARG_MA,
#endif
PCIEX_POIS, PCIE_AER_UCE_PTLP, PCI_TARG_MDPE,
! NULL, 0, NULL
};
/* Translate Fabric ereports to ereport.io.pciex.* */
static fab_erpt_tbl_t fab_pcie_sue_erpt_tbl[] = {
PCIEX_S_TA_SC, PCIE_AER_SUCE_TA_ON_SC, PCI_TARG_REC_TA,
*** 122,150 ****
PCIEX_S_UADR, PCIE_AER_SUCE_UC_ADDR_ERR, PCI_TARG_MDPE,
PCIEX_S_TEX, PCIE_AER_SUCE_TIMER_EXPIRED, NULL,
PCIEX_S_PERR, PCIE_AER_SUCE_PERR_ASSERT, PCI_TARG_MDPE,
PCIEX_S_SERR, PCIE_AER_SUCE_SERR_ASSERT, NULL,
PCIEX_INTERR, PCIE_AER_SUCE_INTERNAL_ERR, NULL,
! NULL, NULL, NULL
};
/* Translate Fabric ereports to ereport.io.pcix.* */
static fab_erpt_tbl_t fab_pcix_erpt_tbl[] = {
PCIX_SPL_DIS, PCI_PCIX_SPL_DSCD, NULL,
PCIX_UNEX_SPL, PCI_PCIX_UNEX_SPL, NULL,
PCIX_RX_SPL_MSG, PCI_PCIX_RX_SPL_MSG, NULL,
! NULL, NULL, NULL
};
static fab_erpt_tbl_t *fab_pcix_bdg_erpt_tbl = fab_pcix_erpt_tbl;
/* Translate Fabric ereports to ereport.io.pcix.sec-* */
static fab_erpt_tbl_t fab_pcix_bdg_sec_erpt_tbl[] = {
PCIX_SPL_DIS, PCI_PCIX_BSS_SPL_DSCD, NULL,
PCIX_UNEX_SPL, PCI_PCIX_BSS_UNEX_SPL, NULL,
PCIX_BSS_SPL_OR, PCI_PCIX_BSS_SPL_OR, NULL,
PCIX_BSS_SPL_DLY, PCI_PCIX_BSS_SPL_DLY, NULL,
! NULL, NULL, NULL
};
/* Translate Fabric ereports to ereport.io.pciex.* */
static fab_erpt_tbl_t fab_pcie_nadv_erpt_tbl[] = {
#ifdef sparc
--- 122,150 ----
PCIEX_S_UADR, PCIE_AER_SUCE_UC_ADDR_ERR, PCI_TARG_MDPE,
PCIEX_S_TEX, PCIE_AER_SUCE_TIMER_EXPIRED, NULL,
PCIEX_S_PERR, PCIE_AER_SUCE_PERR_ASSERT, PCI_TARG_MDPE,
PCIEX_S_SERR, PCIE_AER_SUCE_SERR_ASSERT, NULL,
PCIEX_INTERR, PCIE_AER_SUCE_INTERNAL_ERR, NULL,
! NULL, 0, NULL
};
/* Translate Fabric ereports to ereport.io.pcix.* */
static fab_erpt_tbl_t fab_pcix_erpt_tbl[] = {
PCIX_SPL_DIS, PCI_PCIX_SPL_DSCD, NULL,
PCIX_UNEX_SPL, PCI_PCIX_UNEX_SPL, NULL,
PCIX_RX_SPL_MSG, PCI_PCIX_RX_SPL_MSG, NULL,
! NULL, 0, NULL
};
static fab_erpt_tbl_t *fab_pcix_bdg_erpt_tbl = fab_pcix_erpt_tbl;
/* Translate Fabric ereports to ereport.io.pcix.sec-* */
static fab_erpt_tbl_t fab_pcix_bdg_sec_erpt_tbl[] = {
PCIX_SPL_DIS, PCI_PCIX_BSS_SPL_DSCD, NULL,
PCIX_UNEX_SPL, PCI_PCIX_BSS_UNEX_SPL, NULL,
PCIX_BSS_SPL_OR, PCI_PCIX_BSS_SPL_OR, NULL,
PCIX_BSS_SPL_DLY, PCI_PCIX_BSS_SPL_DLY, NULL,
! NULL, 0, NULL
};
/* Translate Fabric ereports to ereport.io.pciex.* */
static fab_erpt_tbl_t fab_pcie_nadv_erpt_tbl[] = {
#ifdef sparc
*** 151,171 ****
PCIEX_UR, PCIE_DEVSTS_UR_DETECTED, NULL,
#endif
PCIEX_FAT, PCIE_DEVSTS_FE_DETECTED, NULL,
PCIEX_NONFAT, PCIE_DEVSTS_NFE_DETECTED, NULL,
PCIEX_CORR, PCIE_DEVSTS_CE_DETECTED, NULL,
! NULL, NULL, NULL
};
/* Translate Fabric ereports to ereport.io.pciex.* */
static fab_erpt_tbl_t fab_pcie_rc_erpt_tbl[] = {
PCIEX_RC_FE_MSG, PCIE_AER_RE_STS_FE_MSGS_RCVD, NULL,
PCIEX_RC_NFE_MSG, PCIE_AER_RE_STS_NFE_MSGS_RCVD, NULL,
PCIEX_RC_CE_MSG, PCIE_AER_RE_STS_CE_RCVD, NULL,
PCIEX_RC_MCE_MSG, PCIE_AER_RE_STS_MUL_CE_RCVD, NULL,
PCIEX_RC_MUE_MSG, PCIE_AER_RE_STS_MUL_FE_NFE_RCVD, NULL,
! NULL, NULL, NULL
};
/*
* Translate Fabric ereports to pseudo ereport.io.pciex.* RC Fabric Messages.
* If the RP is not a PCIe compliant RP or does not support AER, rely on the
--- 151,171 ----
PCIEX_UR, PCIE_DEVSTS_UR_DETECTED, NULL,
#endif
PCIEX_FAT, PCIE_DEVSTS_FE_DETECTED, NULL,
PCIEX_NONFAT, PCIE_DEVSTS_NFE_DETECTED, NULL,
PCIEX_CORR, PCIE_DEVSTS_CE_DETECTED, NULL,
! NULL, 0, NULL
};
/* Translate Fabric ereports to ereport.io.pciex.* */
static fab_erpt_tbl_t fab_pcie_rc_erpt_tbl[] = {
PCIEX_RC_FE_MSG, PCIE_AER_RE_STS_FE_MSGS_RCVD, NULL,
PCIEX_RC_NFE_MSG, PCIE_AER_RE_STS_NFE_MSGS_RCVD, NULL,
PCIEX_RC_CE_MSG, PCIE_AER_RE_STS_CE_RCVD, NULL,
PCIEX_RC_MCE_MSG, PCIE_AER_RE_STS_MUL_CE_RCVD, NULL,
PCIEX_RC_MUE_MSG, PCIE_AER_RE_STS_MUL_FE_NFE_RCVD, NULL,
! NULL, 0, NULL
};
/*
* Translate Fabric ereports to pseudo ereport.io.pciex.* RC Fabric Messages.
* If the RP is not a PCIe compliant RP or does not support AER, rely on the
*** 173,183 ****
*/
static fab_erpt_tbl_t fab_pcie_fake_rc_erpt_tbl[] = {
PCIEX_RC_FE_MSG, PCIE_DEVSTS_FE_DETECTED, NULL,
PCIEX_RC_NFE_MSG, PCIE_DEVSTS_NFE_DETECTED, NULL,
PCIEX_RC_CE_MSG, PCIE_DEVSTS_CE_DETECTED, NULL,
! NULL, NULL, NULL,
};
/* ARGSUSED */
void
fab_pci_fabric_to_data(fmd_hdl_t *hdl, nvlist_t *nvl, fab_data_t *data)
--- 173,183 ----
*/
static fab_erpt_tbl_t fab_pcie_fake_rc_erpt_tbl[] = {
PCIEX_RC_FE_MSG, PCIE_DEVSTS_FE_DETECTED, NULL,
PCIEX_RC_NFE_MSG, PCIE_DEVSTS_NFE_DETECTED, NULL,
PCIEX_RC_CE_MSG, PCIE_DEVSTS_CE_DETECTED, NULL,
! NULL, 0, NULL
};
/* ARGSUSED */
void
fab_pci_fabric_to_data(fmd_hdl_t *hdl, nvlist_t *nvl, fab_data_t *data)