4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
24 */
25
26 /*
27 * Library file that has miscellaneous support for npe(7d)
28 */
29
30 #include <sys/conf.h>
31 #include <sys/pci.h>
32 #include <sys/sunndi.h>
33 #include <sys/acpi/acpi.h>
34 #include <sys/acpi/acpi_pci.h>
35 #include <sys/acpica.h>
36 #include <sys/pci_cap.h>
37 #include <sys/pcie_impl.h>
38 #include <sys/x86_archext.h>
39 #include <io/pciex/pcie_nvidia.h>
40 #include <io/pciex/pcie_nb5000.h>
41 #include <sys/pci_cfgacc_x86.h>
42 #include <sys/cpuvar.h>
43
44 /*
45 * Prototype declaration
46 */
47 void npe_query_acpi_mcfg(dev_info_t *dip);
48 void npe_ck804_fix_aer_ptr(ddi_acc_handle_t cfg_hdl);
49 int npe_disable_empty_bridges_workaround(dev_info_t *child);
50 void npe_nvidia_error_workaround(ddi_acc_handle_t cfg_hdl);
51 void npe_intel_error_workaround(ddi_acc_handle_t cfg_hdl);
52 boolean_t npe_is_child_pci(dev_info_t *dip);
53 int npe_enable_htmsi(ddi_acc_handle_t cfg_hdl);
54 void npe_enable_htmsi_children(dev_info_t *dip);
55
56 int npe_enable_htmsi_flag = 1;
57
58 /*
59 * Default ecfga base address
60 */
61 int64_t npe_default_ecfga_base = 0xE0000000;
62
63 extern uint32_t npe_aer_uce_mask;
64
65 /*
66 * Query the MCFG table using ACPI. If MCFG is found, setup the
67 * 'ecfg' property accordingly. Otherwise, set the values
68 * to the default values.
69 */
70 void
71 npe_query_acpi_mcfg(dev_info_t *dip)
72 {
73 MCFG_TABLE *mcfgp;
74 CFG_BASE_ADDR_ALLOC *cfg_baap;
75 char *cfg_baa_endp;
76 int64_t ecfginfo[4];
77 int ecfg_found = 0;
78
79 /* Query the MCFG table using ACPI */
80 if (AcpiGetTable(ACPI_SIG_MCFG, 1,
81 (ACPI_TABLE_HEADER **)&mcfgp) == AE_OK) {
82
83 cfg_baap = (CFG_BASE_ADDR_ALLOC *)mcfgp->CfgBaseAddrAllocList;
84 cfg_baa_endp = ((char *)mcfgp) + mcfgp->Length;
85
86 while ((char *)cfg_baap < cfg_baa_endp) {
87 if (cfg_baap->base_addr != (uint64_t)0 &&
88 cfg_baap->segment == 0) {
89 /*
90 * Set up the 'ecfg' property to hold
91 * base_addr, segment, and first/last bus.
92 * We only do the first entry that maps
93 * segment 0; nonzero segments are not yet
94 * known, or handled. If they appear,
95 * we'll need to figure out which bus node
96 * should have which entry by examining the
97 * ACPI _SEG method on each bus node.
98 */
99 ecfginfo[0] = cfg_baap->base_addr;
100 ecfginfo[1] = cfg_baap->segment;
101 ecfginfo[2] = cfg_baap->start_bno;
102 ecfginfo[3] = cfg_baap->end_bno;
103 (void) ndi_prop_update_int64_array(
104 DDI_DEV_T_NONE, dip, "ecfg",
105 ecfginfo, 4);
106 ecfg_found = 1;
107 break;
108 }
109 cfg_baap++;
110 }
111 }
112 if (ecfg_found)
113 return;
114 /*
115 * If MCFG is not found or ecfga_base is not found in MCFG table,
116 * set the property to the default values.
117 */
118 ecfginfo[0] = npe_default_ecfga_base;
119 ecfginfo[1] = 0; /* segment 0 */
120 ecfginfo[2] = 0; /* first bus 0 */
121 ecfginfo[3] = 0xff; /* last bus ff */
122 (void) ndi_prop_update_int64_array(DDI_DEV_T_NONE, dip,
|
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
24 * Copyright 2013 PALO, Richard. All rights reserved.
25 */
26
27 /*
28 * Library file that has miscellaneous support for npe(7d)
29 */
30
31 #include <sys/conf.h>
32 #include <sys/pci.h>
33 #include <sys/sunndi.h>
34 #include <acpica/include/acpi.h>
35 #include <sys/acpica.h>
36 #include <sys/pci_cap.h>
37 #include <sys/pcie_impl.h>
38 #include <sys/x86_archext.h>
39 #include <io/pciex/pcie_nvidia.h>
40 #include <io/pciex/pcie_nb5000.h>
41 #include <sys/pci_cfgacc_x86.h>
42 #include <sys/cpuvar.h>
43
44 /*
45 * Prototype declaration
46 */
47 void npe_query_acpi_mcfg(dev_info_t *dip);
48 void npe_ck804_fix_aer_ptr(ddi_acc_handle_t cfg_hdl);
49 int npe_disable_empty_bridges_workaround(dev_info_t *child);
50 void npe_nvidia_error_workaround(ddi_acc_handle_t cfg_hdl);
51 void npe_intel_error_workaround(ddi_acc_handle_t cfg_hdl);
52 boolean_t npe_is_child_pci(dev_info_t *dip);
53 int npe_enable_htmsi(ddi_acc_handle_t cfg_hdl);
54 void npe_enable_htmsi_children(dev_info_t *dip);
55
56 int npe_enable_htmsi_flag = 1;
57
58 /*
59 * Default ecfga base address
60 */
61 int64_t npe_default_ecfga_base = 0xE0000000;
62
63 extern uint32_t npe_aer_uce_mask;
64
65 /*
66 * Query the MCFG table using ACPI. If MCFG is found, setup the
67 * 'ecfg' property accordingly. Otherwise, set the values
68 * to the default values.
69 */
70 void
71 npe_query_acpi_mcfg(dev_info_t *dip)
72 {
73 ACPI_TABLE_HEADER *mcfgp;
74 ACPI_MCFG_ALLOCATION *cfg_baap;
75 char *cfg_baa_endp;
76 int64_t ecfginfo[4];
77 int ecfg_found = 0;
78
79 /* Query the MCFG table using ACPI */
80 if (AcpiGetTable(ACPI_SIG_MCFG, 1, &mcfgp) == AE_OK) {
81
82 cfg_baap = (ACPI_MCFG_ALLOCATION *)((ACPI_TABLE_MCFG *)mcfgp + 1);
83 cfg_baa_endp = ((char *)mcfgp) + mcfgp->Length;
84
85 while ((char *)cfg_baap < cfg_baa_endp) {
86 if (cfg_baap->Address != (uint64_t)0 &&
87 cfg_baap->PciSegment == 0) {
88 /*
89 * Set up the 'ecfg' property to hold
90 * base_addr, segment, and first/last bus.
91 * We only do the first entry that maps
92 * segment 0; nonzero segments are not yet
93 * known, or handled. If they appear,
94 * we'll need to figure out which bus node
95 * should have which entry by examining the
96 * ACPI _SEG method on each bus node.
97 */
98 ecfginfo[0] = cfg_baap->Address;
99 ecfginfo[1] = cfg_baap->PciSegment;
100 ecfginfo[2] = cfg_baap->StartBusNumber;
101 ecfginfo[3] = cfg_baap->EndBusNumber;
102 (void) ndi_prop_update_int64_array(
103 DDI_DEV_T_NONE, dip, "ecfg",
104 ecfginfo, 4);
105 ecfg_found = 1;
106 break;
107 }
108 cfg_baap++;
109 }
110 }
111 if (ecfg_found)
112 return;
113 /*
114 * If MCFG is not found or ecfga_base is not found in MCFG table,
115 * set the property to the default values.
116 */
117 ecfginfo[0] = npe_default_ecfga_base;
118 ecfginfo[1] = 0; /* segment 0 */
119 ecfginfo[2] = 0; /* first bus 0 */
120 ecfginfo[3] = 0xff; /* last bus ff */
121 (void) ndi_prop_update_int64_array(DDI_DEV_T_NONE, dip,
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