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acpica-unix2-20130823
PANKOVs restructure

*** 19,39 **** * CDDL HEADER END */ /* * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved. */ /* * Library file that has miscellaneous support for npe(7d) */ #include <sys/conf.h> #include <sys/pci.h> #include <sys/sunndi.h> ! #include <sys/acpi/acpi.h> ! #include <sys/acpi/acpi_pci.h> #include <sys/acpica.h> #include <sys/pci_cap.h> #include <sys/pcie_impl.h> #include <sys/x86_archext.h> #include <io/pciex/pcie_nvidia.h> --- 19,39 ---- * CDDL HEADER END */ /* * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright 2013 PALO, Richard. All rights reserved. */ /* * Library file that has miscellaneous support for npe(7d) */ #include <sys/conf.h> #include <sys/pci.h> #include <sys/sunndi.h> ! #include <acpica/include/acpi.h> #include <sys/acpica.h> #include <sys/pci_cap.h> #include <sys/pcie_impl.h> #include <sys/x86_archext.h> #include <io/pciex/pcie_nvidia.h>
*** 68,93 **** * to the default values. */ void npe_query_acpi_mcfg(dev_info_t *dip) { ! MCFG_TABLE *mcfgp; ! CFG_BASE_ADDR_ALLOC *cfg_baap; char *cfg_baa_endp; int64_t ecfginfo[4]; int ecfg_found = 0; /* Query the MCFG table using ACPI */ ! if (AcpiGetTable(ACPI_SIG_MCFG, 1, ! (ACPI_TABLE_HEADER **)&mcfgp) == AE_OK) { ! cfg_baap = (CFG_BASE_ADDR_ALLOC *)mcfgp->CfgBaseAddrAllocList; cfg_baa_endp = ((char *)mcfgp) + mcfgp->Length; while ((char *)cfg_baap < cfg_baa_endp) { ! if (cfg_baap->base_addr != (uint64_t)0 && ! cfg_baap->segment == 0) { /* * Set up the 'ecfg' property to hold * base_addr, segment, and first/last bus. * We only do the first entry that maps * segment 0; nonzero segments are not yet --- 68,92 ---- * to the default values. */ void npe_query_acpi_mcfg(dev_info_t *dip) { ! ACPI_TABLE_HEADER *mcfgp; ! ACPI_MCFG_ALLOCATION *cfg_baap; char *cfg_baa_endp; int64_t ecfginfo[4]; int ecfg_found = 0; /* Query the MCFG table using ACPI */ ! if (AcpiGetTable(ACPI_SIG_MCFG, 1, &mcfgp) == AE_OK) { ! cfg_baap = (ACPI_MCFG_ALLOCATION *)((ACPI_TABLE_MCFG *)mcfgp + 1); cfg_baa_endp = ((char *)mcfgp) + mcfgp->Length; while ((char *)cfg_baap < cfg_baa_endp) { ! if (cfg_baap->Address != (uint64_t)0 && ! cfg_baap->PciSegment == 0) { /* * Set up the 'ecfg' property to hold * base_addr, segment, and first/last bus. * We only do the first entry that maps * segment 0; nonzero segments are not yet
*** 94,107 **** * known, or handled. If they appear, * we'll need to figure out which bus node * should have which entry by examining the * ACPI _SEG method on each bus node. */ ! ecfginfo[0] = cfg_baap->base_addr; ! ecfginfo[1] = cfg_baap->segment; ! ecfginfo[2] = cfg_baap->start_bno; ! ecfginfo[3] = cfg_baap->end_bno; (void) ndi_prop_update_int64_array( DDI_DEV_T_NONE, dip, "ecfg", ecfginfo, 4); ecfg_found = 1; break; --- 93,106 ---- * known, or handled. If they appear, * we'll need to figure out which bus node * should have which entry by examining the * ACPI _SEG method on each bus node. */ ! ecfginfo[0] = cfg_baap->Address; ! ecfginfo[1] = cfg_baap->PciSegment; ! ecfginfo[2] = cfg_baap->StartBusNumber; ! ecfginfo[3] = cfg_baap->EndBusNumber; (void) ndi_prop_update_int64_array( DDI_DEV_T_NONE, dip, "ecfg", ecfginfo, 4); ecfg_found = 1; break;