1 /*-
   2  * Copyright 2007-2013 Solarflare Communications Inc.  All rights reserved.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
  14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  23  * SUCH DAMAGE.
  24  */
  25 
  26 #ifndef _SYS_TXC43128_IMPL_H
  27 #define _SYS_TXC43128_IMPL_H
  28 
  29 #ifdef  __cplusplus
  30 extern "C" {
  31 #endif
  32 
  33 #if EFSYS_OPT_PHY_TXC43128
  34 
  35 #define TXC43128_MMD_MASK                                               \
  36         ((1 << PMA_PMD_MMD) |                                             \
  37         (1 << PCS_MMD) |                                          \
  38         (1 << PHY_XS_MMD))
  39 
  40 #define SIGDET  0x000a
  41 #define RX0SIGDET_LBN 1
  42 #define RX0SIGDET_WIDTH 1
  43 #define RX1SIGDET_LBN 2
  44 #define RX1SIGDET_WIDTH 1
  45 #define RX2SIGDET_LBN 3
  46 #define RX2SIGDET_WIDTH 1
  47 #define RX3SIGDET_LBN 4
  48 #define RX3SIGDET_WIDTH 1
  49 
  50 #define GLCMD 0xc004
  51 #define LMTSWRST_LBN 14
  52 #define LMTSWRST_WIDTH 1
  53 
  54 #define ATXPRE0 0xc043
  55 #define ATXPRE1 0xc044
  56 #define TXPRE02_LBN 3
  57 #define TXPRE02_WIDTH 5
  58 #define TXPRE13_LBN 11
  59 #define TXPRE13_WIDTH 5
  60 
  61 #define ATXAMP0 0xc041
  62 #define ATXAMP1 0xc042
  63 #define TXAMP02_LBN 3
  64 #define TXAMP02_WIDTH 5
  65 #define TXAMP13_LBN 11
  66 #define TXAMP13_WIDTH 5
  67 
  68 #define BCTL 0xc280
  69 #define BSTRT_LBN 15
  70 #define BSTRT_WIDTH 1
  71 #define BSTOP_LBN 14
  72 #define BSTOP_WIDTH 1
  73 #define BSTEN_LBN 13
  74 #define BSTEN_WIDTH 1
  75 #define B10EN_LBN 12
  76 #define B10EN_WIDTH 1
  77 #define BTYPE_LBN 10
  78 #define BTYPE_WIDTH 2
  79 #define TSDET_DECODE 0
  80 #define CRPAT_DECODE 1
  81 #define CJPAT_DECODE 2
  82 #define TSRND_DECODE 3
  83 
  84 #define BTXFRMCNT 0xc281
  85 #define BRX0FRMCNT 0xc282
  86 #define BRX1FRMCNT 0xc283
  87 #define BRX2FRMCNT 0xc284
  88 #define BRX3FRMCNT 0xc285
  89 #define BRX0ERRCNT 0xc286
  90 #define BRX1ERRCNT 0xc287
  91 #define BRX2ERRCNT 0xc288
  92 #define BRX3ERRCNT 0xc289
  93 
  94 #define MNCTL 0xc340
  95 #define MRST_LBN 15
  96 #define MRST_WIDTH 1
  97 #define ALG2TXALED_LBN 14
  98 #define ALG2TXALED_WIDTH 1
  99 #define ALG2RXALED_LBN 13
 100 #define ALG2RXALED_WIDTH 1
 101 
 102 #define PIOCFG 0xc345
 103 #define PIO15FNC_LBN 15
 104 #define PIO15FNC_WIDTH 1
 105 #define PIO14FNC_LBN 14
 106 #define PIO14FNC_WIDTH 1
 107 #define PIO13FNC_LBN 13
 108 #define PIO13FNC_WIDTH 1
 109 #define PIO12FNC_LBN 12
 110 #define PIO12FNC_WIDTH 1
 111 #define PIO11FNC_LBN 11
 112 #define PIO11FNC_WIDTH 1
 113 #define PIO10FNC_LBN 10
 114 #define PIO10FNC_WIDTH 1
 115 #define PIO9FNC_LBN 9
 116 #define PIO9FNC_WIDTH 1
 117 #define PIO8FNC_LBN 8
 118 #define PIO8FNC_WIDTH 1
 119 #define PIOFNC_LED_DECODE 0
 120 #define PIOFNC_GPIO_DECODE 1
 121 
 122 #define PIODO 0xc346
 123 #define PIO15OUT_LBN 15
 124 #define PIO15OUT_WIDTH 1
 125 #define PIO14OUT_LBN 14
 126 #define PIO14OUT_WIDTH 1
 127 #define PIO13OUT_LBN 13
 128 #define PIO13OUT_WIDTH 1
 129 #define PIO12OUT_LBN 12
 130 #define PIO12OUT_WIDTH 1
 131 #define PIO11OUT_LBN 11
 132 #define PIO11OUT_WIDTH 1
 133 #define PIO10OUT_LBN 10
 134 #define PIO10OUT_WIDTH 1
 135 #define PIO9OUT_LBN 9
 136 #define PIO9OUT_WIDTH 1
 137 #define PIO8OUT_LBN 8
 138 #define PIO8OUT_WIDTH 1
 139 
 140 #define PIODIR 0xc348
 141 #define PIO15DIR_LBN 15
 142 #define PIO15DIR_WIDTH 1
 143 #define PIO14DIR_LBN 14
 144 #define PIO14DIR_WIDTH 1
 145 #define PIO13DIR_LBN 13
 146 #define PIO13DIR_WIDTH 1
 147 #define PIO12DIR_LBN 12
 148 #define PIO12DIR_WIDTH 1
 149 #define PIO11DIR_LBN 11
 150 #define PIO11DIR_WIDTH 1
 151 #define PIO10DIR_LBN 10
 152 #define PIO10DIR_WIDTH 1
 153 #define PIO9DIR_LBN 9
 154 #define PIO9DIR_WIDTH 1
 155 #define PIO8DIR_LBN 8
 156 #define PIO8DIR_WIDTH 1
 157 #define PIODIR_IN_DECODE 0
 158 #define PIODIR_OUT_DECODE 1
 159 
 160 #define MNDBLCFG 0xc34f
 161 #define PXS8BLPBK_LBN 11
 162 #define PXS8BLPBK_WIDTH 1
 163 #define LNALPBK_LBN 10
 164 #define LNALPBK_WIDTH 1
 165 
 166 #endif  /* EFSYS_OPT_PHY_TXC43128 */
 167 
 168 #ifdef  __cplusplus
 169 }
 170 #endif
 171 
 172 #endif  /* _SYS_TXC43128_IMPL_H */