1 /*-
2 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26 #ifndef _SYS_SFT9001_IMPL_H
27 #define _SYS_SFT9001_IMPL_H
28
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32
33 #if EFSYS_OPT_PHY_SFT9001
34
35 #define SFT9001_MMD_MASK \
36 ((1 << PMA_PMD_MMD) | \
37 (1 << PCS_MMD) | \
38 (1 << PHY_XS_MMD) | \
39 (1 << AN_MMD) | \
40 (1 << CL22EXT_MMD))
41
42 #define PMA_PMD_PWR_BACKOFF_REG 0x83
43 #define LP_TX_PWR_BACKOFF_LBN 13
44 #define LP_TX_PWR_BACKOFF_WIDTH 3
45 #define TX_PWR_BACKOFF_LBN 10
46 #define TX_PWR_BACKOFF_WIDTH 3
47 #define SHORT_REACH_LBN 0
48 #define SHORT_REACH_WIDTH 1
49
50 #define PMA_PMD_XCONTROL_REG 0xc000
51 #define SSR_LBN 15
52 #define SSR_WIDTH 1
53 #define ROBUST_LBN 14
54 #define ROBUST_WIDTH 1
55 #define CLK312_OUT_SEL_LBN 8
56 #define CLK312_OUT_SEL_WIDTH 1
57 #define SEL_312MHZ_DECODE 1
58 #define SEL_156MHZ_DECODE 0
59 #define TEST_CLKOUT_SEL_LBN 4
60 #define TEST_CLKOUT_SEL_WIDTH 4
61 #define SEL_125MHZ_DECODE 5
62 #define TEST_CLKOUT_EN_LBN 3
63 #define TEST_CLKOUT_EN_WIDTH 1
64 #define CLK312_OUT_EN_LBN 2
65 #define CLK312_OUT_EN_WIDTH 1
66 #define GMII_EN_LBN 1
67 #define GMII_EN_WIDTH 1
68
69 #define PMA_PMD_LED_CONTROL_REG 0xc007
70 #define LED_ACTIVITY_EN_LBN 3
71 #define LED_ACTIVITY_EN_WIDTH 1
72 #define LED_FLASH_PERIOD_LBN 1
73 #define LED_FLASH_PERIOD_WIDTH 2
74
75 #define PMA_PMD_LED_OVERRIDE_REG 0xc009
76 #define LED_TMODE_LBN 14
77 #define LED_TMODE_WIDTH 2
78 #define LED_SPARE_LBN 12
79 #define LED_SPARE_WIDTH 2
80 #define LED_MS_LBN 10
81 #define LED_MS_WIDTH 2
82 #define LED_RX_LBN 8
83 #define LED_RX_WIDTH 2
84 #define LED_TX_LBN 6
85 #define LED_TX_WIDTH 2
86 #define LED_SPEED1_LBN 4
87 #define LED_SPEED1_WIDTH 2
88 #define LED_SPEED0_LBN 2
89 #define LED_SPEED0_WIDTH 2
90 #define LED_LINK_LBN 0
91 #define LED_LINK_WIDTH 2
92 #define LED_NORMAL_DECODE 0
93 #define LED_ON_DECODE 1
94 #define LED_OFF_DECODE 2
95 #define LED_FLASH_DECODE 3
96
97 #define PMA_PMD_DIAG_RESULT_REG 0xc016
98 #define PAIR_A_CODE_LBN 12
99 #define PAIR_A_CODE_WIDTH 4
100 #define PAIR_B_CODE_LBN 8
101 #define PAIR_B_CODE_WIDTH 4
102 #define PAIR_C_CODE_LBN 4
103 #define PAIR_C_CODE_WIDTH 4
104 #define PAIR_D_CODE_LBN 0
105 #define PAIR_D_CODE_WIDTH 4
106 #define PAIR_BUSY_DECODE 0x9
107 #define INTER_PAIR_SHORT_DECODE 0x4
108 #define INTRA_PAIR_SHORT_DECODE 0x3
109 #define PAIR_OPEN_DECODE 0x2
110 #define PAIR_OK_DECODE 0x1
111
112 #define PMA_PMD_DIAG_A_LENGTH_REG 0xc017
113 #define PMA_PMD_DIAG_B_LENGTH_REG 0xc018
114 #define PMA_PMD_DIAG_C_LENGTH_REG 0xc019
115 #define PMA_PMD_DIAG_D_LENGTH_REG 0xc01a
116
117 #define PMA_PMD_FW_REV0_REG 0xc026
118 #define PMA_PMD_FW_REV1_REG 0xc027
119
120 #define PMA_PMD_SPEED_REG 0xc028
121 #define SPEED_RES_LBN 4
122 #define SPEED_RES_WIDTH 4
123 #define SPEED_10BASE_T_DECODE 1
124 #define SPEED_100BASE_TX_DECODE 2
125 #define SPEED_1000BASE_T_DECODE 3
126 #define SPEED_10GBASE_T_DECODE 4
127
128 #define PMA_PMD_DIAG_CONTROL_REG 0xc03d
129 #define RUN_DIAG_IMMED_LBN 15
130 #define RUN_DIAG_IMMED_WIDTH 1
131 #define RUN_DIAG_AUTO_LBN 14
132 #define RUN_DIAG_AUTO_WIDTH 1
133 #define INTER_PAIR_CHECK_DIS_LBN 13
134 #define INTER_PAIR_CHECK_DIS_WIDTH 1
135 #define BREAK_LINK_LBN 12
136 #define BREAK_LINK_WIDTH 1
137 #define DIAG_RUNNING_LBN 11
138 #define DIAG_RUNNING_WIDTH 1
139 #define LENGTH_UNIT_LBN 10
140 #define LENGTH_UNIT_WIDTH 1
141 #define LENGTH_M_DECODE 1
142 #define LENGTH_CM_DECODE 0
143
144 #define PCS_BOOT_STATUS_REG 0xd000
145 #define RESET_CAUSE_LBN 8
146 #define RESET_CAUSE_WIDTH 2
147 #define HW_RESET_DECODE 0x0
148 #define SW_RESET_DECODE 0x1
149 #define WD_RESET_DECODE 0x2
150 #define SW_WD_RESET_DECODE 0x3
151 #define UPLOAD_PROGRESS_LBN 7
152 #define UPLOAD_PROGRESS_WIDTH 1
153 #define CODE_DOWNLOAD_LBN 6
154 #define CODE_DOWNLOAD_WIDTH 1
155 #define CKSUM_OK_LBN 5
156 #define CKSUM_OK_WIDTH 1
157 #define CODE_STARTED_LBN 4
158 #define CODE_STARTED_WIDTH 1
159 #define BOOT_STATUS_LBN 3
160 #define BOOT_STATUS_WIDTH 1
161 #define BOOT_PROGRESS_LBN 1
162 #define BOOT_PROGRESS_WIDTH 2
163 #define INIT_DECODE 0x0
164 #define MDIO_WAIT_DECODE 0x1
165 #define CKSUM_START_DECODE 0x2
166 #define APP_JMP_DECODE 0x3
167 #define FATAL_ERR_LBN 0
168 #define FATAL_ERR_WIDTH 1
169
170 #define PCS_LM_RAM_LS_ADDR_REG 0xd004
171 #define LM_RAM_LS_ADDR_LBN 0
172 #define LM_RAM_LS_ADDR_WIDTH 16
173
174 #define PCS_LM_RAM_MS_ADDR_REG 0xd005
175 #define LM_RAM_MS_ADDR_LBN 0
176 #define LM_RAM_MS_ADDR_WIDTH 3
177 #define BYTE_ACCESS_LBN 15
178 #define BYTE_ACCESS_WIDTH 1
179
180 #define PCS_LM_RAM_DATA_REG 0xd006
181 #define LM_RAM_DATA_LBN 0
182 #define LM_RAM_DATA_WIDTH 16
183
184 #define PHY_XS_TEST1_REG 0xc00a
185 #define PHY_XS_NE_LOOPBACK_LBN 8
186 #define PHY_XS_NE_LOOPBACK_WIDTH 1
187
188 #define CL22EXT_CONTROL_REG 0xc000
189 #define CL22EXT_NE_LOOPBACK_LBN 14
190 #define CL22EXT_NE_LOOPBACK_WIDTH 1
191
192 #define CL22EXT_STATUS_REG 0xc001
193 #define CL22EXT_LINK_UP_LBN 2
194 #define CL22EXT_LINK_UP_WIDTH 1
195 #define CL22EXT_JABBER_LBN 1
196 #define CL22EXT_JABBER_WIDTH 1
197
198 #define CL22EXT_MS_CONTROL_REG 0xc009
199 #define CL22EXT_1000BASE_T_ADV_LBN 8
200 #define CL22EXT_1000BASE_T_ADV_WIDTH 1
201 #define CL22EXT_1000BASE_T_FDX_ADV_LBN 9
202 #define CL22EXT_1000BASE_T_FDX_ADV_WIDTH 1
203
204 #define CL22EXT_MS_STATUS_REG 0xc00a
205 #define CL22EXT_1000BASE_T_LP_LBN 10
206 #define CL22EXT_1000BASE_T_LP_WIDTH 1
207 #define CL22EXT_1000BASE_T_FDX_LP_LBN 11
208 #define CL22EXT_1000BASE_T_FDX_LP_WIDTH 1
209
210 #define LOADER_MMD 1
211 #define LOADER_MAX_BUFF_SZ_REG 49192
212 #define LOADER_ACTUAL_BUFF_SZ_REG 49193
213 #define LOADER_CMD_RESPONSE_REG 49194
214 #define LOADER_CMD_ERASE_FLASH 0x0001
215 #define LOADER_CMD_FILL_BUFFER 0x0002
216 #define LOADER_CMD_PROGRAM_FLASH 0x0003
217 #define LOADER_CMD_READ_FLASH 0x0004
218 #define LOADER_RESPONSE_OK 0x0100
219 #define LOADER_RESPONSE_ERROR 0x0200
220 #define LOADER_RESPONSE_BUSY 0x0300
221 #define LOADER_WORDS_WRITTEN_REG 49195
222 #define LOADER_WORDS_READ_REG 49195
223 #define LOADER_FLASH_ADDR_LOW_REG 49196
224 #define LOADER_FLASH_ADDR_HI_REG 49197
225 #define LOADER_DATA_REG 49198
226
227 #define FIRMWARE_BLOCK_SIZE 0x4000
228 #define FIRMWARE_MAX_SIZE 0x30000
229
230 #endif /* EFSYS_OPT_PHY_SFT9001 */
231
232 #ifdef __cplusplus
233 }
234 #endif
235
236 #endif /* _SYS_SFT9001_IMPL_H */