1 /*-
   2  * Copyright 2007-2013 Solarflare Communications Inc.  All rights reserved.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
  14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  23  * SUCH DAMAGE.
  24  */
  25 
  26 #ifndef _SYS_QT2022C2_H
  27 #define _SYS_QT2022C2_H
  28 
  29 #include "efx.h"
  30 
  31 #ifdef  __cplusplus
  32 extern "C" {
  33 #endif
  34 
  35 #if EFSYS_OPT_PHY_QT2022C2
  36 
  37 #define QT2022C2_LOOPBACK_MASK                                          \
  38             ((1 << EFX_LOOPBACK_PHY_XS) |                         \
  39             (1 << EFX_LOOPBACK_PCS) |                                     \
  40             (1 << EFX_LOOPBACK_PMA_PMD) |                         \
  41             FALCON_XMAC_LOOPBACK_MASK)
  42 
  43 #define QT2022C2_LED_MASK                                               \
  44             ((1 << EFX_PHY_LED_OFF) |                                     \
  45             (1 << EFX_PHY_LED_ON))
  46 
  47 #define QT2022C2_NPROPS         0
  48 
  49 #define QT2022C2_ADV_CAP_MASK                                           \
  50             ((1 << EFX_PHY_CAP_10000FDX) |                                \
  51             (1 << EFX_PHY_CAP_PAUSE))
  52 
  53 #define QT2022C2_ADV_CAP_PERM   0
  54 
  55 #define QT2022C2_BIST_MASK      0
  56 
  57 extern  __checkReturn   int
  58 qt2022c2_reset(
  59         __in            efx_nic_t *enp);
  60 
  61 extern  __checkReturn   int
  62 qt2022c2_reconfigure(
  63         __in            efx_nic_t *enp);
  64 
  65 extern  __checkReturn   int
  66 qt2022c2_verify(
  67         __in            efx_nic_t *enp);
  68 
  69 extern  __checkReturn   int
  70 qt2022c2_uplink_check(
  71         __in            efx_nic_t *enp,
  72         __out           boolean_t *upp);
  73 
  74 extern  __checkReturn   int
  75 qt2022c2_downlink_check(
  76         __in            efx_nic_t *enp,
  77         __out           efx_link_mode_t *modep,
  78         __out           unsigned int *fcntlp,
  79         __out           uint32_t *lp_cap_maskp);
  80 
  81 extern  __checkReturn   int
  82 qt2022c2_oui_get(
  83         __in            efx_nic_t *enp,
  84         __out           uint32_t *ouip);
  85 
  86 #if EFSYS_OPT_PHY_STATS
  87 
  88 /* START MKCONFIG GENERATED Qt2022c2PhyHeaderStatsMask 5655dc14f9b46071 */
  89 #define QT2022C2_STAT_MASK \
  90         (1ULL << EFX_PHY_STAT_OUI) | \
  91         (1ULL << EFX_PHY_STAT_PMA_PMD_LINK_UP) | \
  92         (1ULL << EFX_PHY_STAT_PMA_PMD_RX_FAULT) | \
  93         (1ULL << EFX_PHY_STAT_PMA_PMD_TX_FAULT) | \
  94         (1ULL << EFX_PHY_STAT_PCS_LINK_UP) | \
  95         (1ULL << EFX_PHY_STAT_PCS_RX_FAULT) | \
  96         (1ULL << EFX_PHY_STAT_PCS_TX_FAULT) | \
  97         (1ULL << EFX_PHY_STAT_PCS_BER) | \
  98         (1ULL << EFX_PHY_STAT_PCS_BLOCK_ERRORS) | \
  99         (1ULL << EFX_PHY_STAT_PHY_XS_LINK_UP) | \
 100         (1ULL << EFX_PHY_STAT_PHY_XS_RX_FAULT) | \
 101         (1ULL << EFX_PHY_STAT_PHY_XS_TX_FAULT) | \
 102         (1ULL << EFX_PHY_STAT_PHY_XS_ALIGN) | \
 103         (1ULL << EFX_PHY_STAT_PHY_XS_SYNC_A) | \
 104         (1ULL << EFX_PHY_STAT_PHY_XS_SYNC_B) | \
 105         (1ULL << EFX_PHY_STAT_PHY_XS_SYNC_C) | \
 106         (1ULL << EFX_PHY_STAT_PHY_XS_SYNC_D)
 107 
 108 /* END MKCONFIG GENERATED Qt2022c2PhyHeaderStatsMask */
 109 
 110 extern  __checkReturn                   int
 111 qt2022c2_stats_update(
 112         __in                            efx_nic_t *enp,
 113         __in                            efsys_mem_t *esmp,
 114         __out_ecount(EFX_PHY_NSTATS)    uint32_t *stat);
 115 
 116 #endif  /* EFSYS_OPT_PHY_STATS */
 117 
 118 #if EFSYS_OPT_PHY_PROPS
 119 
 120 #if EFSYS_OPT_NAMES
 121 
 122 extern          const char __cs *
 123 qt2022c2_prop_name(
 124         __in    efx_nic_t *enp,
 125         __in    unsigned int id);
 126 
 127 #endif
 128 
 129 extern  __checkReturn   int
 130 qt2022c2_prop_get(
 131         __in            efx_nic_t *enp,
 132         __in            unsigned int id,
 133         __in            uint32_t flags,
 134         __out           uint32_t *valp);
 135 
 136 extern  __checkReturn   int
 137 qt2022c2_prop_set(
 138         __in            efx_nic_t *enp,
 139         __in            unsigned int id,
 140         __in            uint32_t val);
 141 
 142 #endif  /* EFSYS_OPT_PHY_PROPS */
 143 
 144 #endif  /* EFSYS_OPT_PHY_QT2022C2 */
 145 
 146 #ifdef  __cplusplus
 147 }
 148 #endif
 149 
 150 #endif  /* _SYS_QT2022C2_H */