1 /*-
2 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26 #ifndef _SYS_FALCON_STATS_H
27 #define _SYS_FALCON_STATS_H
28
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32
33 /*
34 * Falcon GMAC stats
35 */
36 #define G_RX_GOOD_OCT_OFFSET 0x0
37 #define G_RX_GOOD_OCT_WIDTH 6
38 #define G_RX_BAD_OCT_OFFSET 0x8
39 #define G_RX_BAD_OCT_WIDTH 6
40 #define G_RX_MISS_PKT_OFFSET 0x10
41 #define G_RX_MISS_PKT_WIDTH 4
42 #define G_RX_FALSE_CRS_OFFSET 0x14
43 #define G_RX_FALSE_CRS_WIDTH 4
44 #define G_RX_PAUSE_PKT_OFFSET 0x18
45 #define G_RX_PAUSE_PKT_WIDTH 4
46 #define G_RX_BAD_PKT_OFFSET 0x1C
47 #define G_RX_BAD_PKT_WIDTH 4
48 #define G_RX_UCAST_PKT_OFFSET 0x20
49 #define G_RX_UCAST_PKT_WIDTH 4
50 #define G_RX_MCAST_PKT_OFFSET 0x24
51 #define G_RX_MCAST_PKT_WIDTH 4
52 #define G_RX_BCAST_PKT_OFFSET 0x28
53 #define G_RX_BCAST_PKT_WIDTH 4
54 #define G_RX_GOOD_LT_64_PKT_OFFSET 0x2C
55 #define G_RX_GOOD_LT_64_PKT_WIDTH 4
56 #define G_RX_BAD_LT_64_PKT_OFFSET 0x30
57 #define G_RX_BAD_LT_64_PKT_WIDTH 4
58 #define G_RX_64_PKT_OFFSET 0x34
59 #define G_RX_64_PKT_WIDTH 4
60 #define G_RX_65_TO_127_PKT_OFFSET 0x38
61 #define G_RX_65_TO_127_PKT_WIDTH 4
62 #define G_RX_128_TO_255_PKT_OFFSET 0x3C
63 #define G_RX_128_TO_255_PKT_WIDTH 4
64 #define G_RX_256_TO_511_PKT_OFFSET 0x40
65 #define G_RX_256_TO_511_PKT_WIDTH 4
66 #define G_RX_512_TO_1023_PKT_OFFSET 0x44
67 #define G_RX_512_TO_1023_PKT_WIDTH 4
68 #define G_RX_1024_TO_15XX_PKT_OFFSET 0x48
69 #define G_RX_1024_TO_15XX_PKT_WIDTH 4
70 #define G_RX_15XX_TO_JUMBO_PKT_OFFSET 0x4C
71 #define G_RX_15XX_TO_JUMBO_PKT_WIDTH 4
72 #define G_RX_GT_JUMBO_PKT_OFFSET 0x50
73 #define G_RX_GT_JUMBO_PKT_WIDTH 4
74 #define G_RX_FCS_ERR_64_TO_15XX_PKT_OFFSET 0x54
75 #define G_RX_FCS_ERR_64_TO_15XX_PKT_WIDTH 4
76 #define G_RX_FCS_ERR_15XX_TO_JUMBO_PKT_OFFSET 0x58
77 #define G_RX_FCS_ERR_15XX_TO_JUMBO_PKT_WIDTH 4
78 #define G_RX_FCS_ERR_GT_JUMBO_PKT_OFFSET 0x5C
79 #define G_RX_FCS_ERR_GT_JUMBO_PKT_WIDTH 4
80
81 #define G_TX_GOOD_BAD_OCT_OFFSET 0x80
82 #define G_TX_GOOD_BAD_OCT_WIDTH 6
83 #define G_TX_GOOD_OCT_OFFSET 0x88
84 #define G_TX_GOOD_OCT_WIDTH 6
85 #define G_TX_SGL_COL_PKT_OFFSET 0x90
86 #define G_TX_SGL_COL_PKT_WIDTH 4
87 #define G_TX_MULT_COL_PKT_OFFSET 0x94
88 #define G_TX_MULT_COL_PKT_WIDTH 4
89 #define G_TX_EX_COL_PKT_OFFSET 0x98
90 #define G_TX_EX_COL_PKT_WIDTH 4
91 #define G_TX_DEF_PKT_OFFSET 0x9C
92 #define G_TX_DEF_PKT_WIDTH 4
93 #define G_TX_LATE_COL_OFFSET 0xA0
94 #define G_TX_LATE_COL_WIDTH 4
95 #define G_TX_EX_DEF_PKT_OFFSET 0xA4
96 #define G_TX_EX_DEF_PKT_WIDTH 4
97 #define G_TX_PAUSE_PKT_OFFSET 0xA8
98 #define G_TX_PAUSE_PKT_WIDTH 4
99 #define G_TX_BAD_PKT_OFFSET 0xAC
100 #define G_TX_BAD_PKT_WIDTH 4
101 #define G_TX_UCAST_PKT_OFFSET 0xB0
102 #define G_TX_UCAST_PKT_WIDTH 4
103 #define G_TX_MCAST_PKT_OFFSET 0xB4
104 #define G_TX_MCAST_PKT_WIDTH 4
105 #define G_TX_BCAST_PKT_OFFSET 0xB8
106 #define G_TX_BCAST_PKT_WIDTH 4
107 #define G_TX_LT_64_PKT_OFFSET 0xBC
108 #define G_TX_LT_64_PKT_WIDTH 4
109 #define G_TX_64_PKT_OFFSET 0xC0
110 #define G_TX_64_PKT_WIDTH 4
111 #define G_TX_65_TO_127_PKT_OFFSET 0xC4
112 #define G_TX_65_TO_127_PKT_WIDTH 4
113 #define G_TX_128_TO_255_PKT_OFFSET 0xC8
114 #define G_TX_128_TO_255_PKT_WIDTH 4
115 #define G_TX_256_TO_511_PKT_OFFSET 0xCC
116 #define G_TX_256_TO_511_PKT_WIDTH 4
117 #define G_TX_512_TO_1023_PKT_OFFSET 0xD0
118 #define G_TX_512_TO_1023_PKT_WIDTH 4
119 #define G_TX_1024_TO_15XX_PKT_OFFSET 0xD4
120 #define G_TX_1024_TO_15XX_PKT_WIDTH 4
121 #define G_TX_15XX_TO_JUMBO_PKT_OFFSET 0xD8
122 #define G_TX_15XX_TO_JUMBO_PKT_WIDTH 4
123 #define G_TX_GT_JUMBO_PKT_OFFSET 0xDC
124 #define G_TX_GT_JUMBO_PKT_WIDTH 4
125 #define G_TX_NON_TCP_UDP_PKT_OFFSET 0xE0
126 #define G_TX_NON_TCP_UDP_PKT_WIDTH 2
127 #define G_TX_MAC_SRC_ERR_PKT_OFFSET 0xE4
128 #define G_TX_MAC_SRC_ERR_PKT_WIDTH 2
129 #define G_TX_IP_SRC_ERR_PKT_OFFSET 0xE8
130 #define G_TX_IP_SRC_ERR_PKT_WIDTH 2
131
132 #define G_DMA_DONE_OFFSET 0xEC
133 #define G_DMA_DONE_WIDTH 4
134
135 #define G_STAT_OFFSET(_id) G_ ## _id ## _OFFSET
136 #define G_STAT_WIDTH(_id) G_ ## _id ## _WIDTH
137
138 /*
139 * Falcon XMAC stats
140 */
141 #define XG_RX_OCTETS_OFFSET 0x0
142 #define XG_RX_OCTETS_WIDTH 6
143 #define XG_RX_OCTETS_OK_OFFSET 0x8
144 #define XG_RX_OCTETS_OK_WIDTH 6
145 #define XG_RX_PKTS_OFFSET 0x10
146 #define XG_RX_PKTS_WIDTH 4
147 #define XG_RX_PKTS_OK_OFFSET 0x14
148 #define XG_RX_PKTS_OK_WIDTH 4
149 #define XG_RX_BROADCAST_PKTS_OFFSET 0x18
150 #define XG_RX_BROADCAST_PKTS_WIDTH 4
151 #define XG_RX_MULTICAST_PKTS_OFFSET 0x1C
152 #define XG_RX_MULTICAST_PKTS_WIDTH 4
153 #define XG_RX_UNICAST_PKTS_OFFSET 0x20
154 #define XG_RX_UNICAST_PKTS_WIDTH 4
155 #define XG_RX_UNDERSIZE_PKTS_OFFSET 0x24
156 #define XG_RX_UNDERSIZE_PKTS_WIDTH 4
157 #define XG_RX_OVERSIZE_PKTS_OFFSET 0x28
158 #define XG_RX_OVERSIZE_PKTS_WIDTH 4
159 #define XG_RX_JABBER_PKTS_OFFSET 0x2C
160 #define XG_RX_JABBER_PKTS_WIDTH 4
161 #define XG_RX_UNDERSIZE_FCS_ERROR_PKTS_OFFSET 0x30
162 #define XG_RX_UNDERSIZE_FCS_ERROR_PKTS_WIDTH 4
163 #define XG_RX_DROP_EVENTS_OFFSET 0x34
164 #define XG_RX_DROP_EVENTS_WIDTH 4
165 #define XG_RX_FCS_ERROR_PKTS_OFFSET 0x38
166 #define XG_RX_FCS_ERROR_PKTS_WIDTH 4
167 #define XG_RX_ALIGN_ERROR_OFFSET 0x3C
168 #define XG_RX_ALIGN_ERROR_WIDTH 4
169 #define XG_RX_SYMBOL_ERROR_OFFSET 0x40
170 #define XG_RX_SYMBOL_ERROR_WIDTH 4
171 #define XG_RX_INTERNAL_MAC_ERROR_OFFSET 0x44
172 #define XG_RX_INTERNAL_MAC_ERROR_WIDTH 4
173 #define XG_RX_CONTROL_PKTS_OFFSET 0x48
174 #define XG_RX_CONTROL_PKTS_WIDTH 4
175 #define XG_RX_PAUSE_PKTS_OFFSET 0x4C
176 #define XG_RX_PAUSE_PKTS_WIDTH 4
177 #define XG_RX_PKTS_64_OCTETS_OFFSET 0x50
178 #define XG_RX_PKTS_64_OCTETS_WIDTH 4
179 #define XG_RX_PKTS_65_TO_127_OCTETS_OFFSET 0x54
180 #define XG_RX_PKTS_65_TO_127_OCTETS_WIDTH 4
181 #define XG_RX_PKTS_128_TO_255_OCTETS_OFFSET 0x58
182 #define XG_RX_PKTS_128_TO_255_OCTETS_WIDTH 4
183 #define XG_RX_PKTS_256_TO_511_OCTETS_OFFSET 0x5C
184 #define XG_RX_PKTS_256_TO_511_OCTETS_WIDTH 4
185 #define XG_RX_PKTS_512_TO_1023_OCTETS_OFFSET 0x60
186 #define XG_RX_PKTS_512_TO_1023_OCTETS_WIDTH 4
187 #define XG_RX_PKTS_1024_TO_15XX_OCTETS_OFFSET 0x64
188 #define XG_RX_PKTS_1024_TO_15XX_OCTETS_WIDTH 4
189 #define XG_RX_PKTS_15XX_TO_MAX_OCTETS_OFFSET 0x68
190 #define XG_RX_PKTS_15XX_TO_MAX_OCTETS_WIDTH 4
191 #define XG_RX_LENGTH_ERROR_OFFSET 0x6C
192 #define XG_RX_LENGTH_ERROR_WIDTH 4
193
194 #define XG_TX_PKTS_OFFSET 0x80
195 #define XG_TX_PKTS_WIDTH 4
196 #define XG_TX_OCTETS_OFFSET 0x88
197 #define XG_TX_OCTETS_WIDTH 6
198 #define XG_TX_MULTICAST_PKTS_OFFSET 0x90
199 #define XG_TX_MULTICAST_PKTS_WIDTH 4
200 #define XG_TX_BROADCAST_PKTS_OFFSET 0x94
201 #define XG_TX_BROADCAST_PKTS_WIDTH 4
202 #define XG_TX_UNICAST_PKTS_OFFSET 0x98
203 #define XG_TX_UNICAST_PKTS_WIDTH 4
204 #define XG_TX_CONTROL_PKTS_OFFSET 0x9C
205 #define XG_TX_CONTROL_PKTS_WIDTH 4
206 #define XG_TX_PAUSE_PKTS_OFFSET 0xA0
207 #define XG_TX_PAUSE_PKTS_WIDTH 4
208 #define XG_TX_PKTS_64_OCTETS_OFFSET 0xA4
209 #define XG_TX_PKTS_64_OCTETS_WIDTH 4
210 #define XG_TX_PKTS_65_TO_127_OCTETS_OFFSET 0xA8
211 #define XG_TX_PKTS_65_TO_127_OCTETS_WIDTH 4
212 #define XG_TX_PKTS_128_TO_255_OCTETS_OFFSET 0xAC
213 #define XG_TX_PKTS_128_TO_255_OCTETS_WIDTH 4
214 #define XG_TX_PKTS_256_TO_511_OCTETS_OFFSET 0xB0
215 #define XG_TX_PKTS_256_TO_511_OCTETS_WIDTH 4
216 #define XG_TX_PKTS_512_TO_1023_OCTETS_OFFSET 0xB4
217 #define XG_TX_PKTS_512_TO_1023_OCTETS_WIDTH 4
218 #define XG_TX_PKTS_1024_TO_15XX_OCTETS_OFFSET 0xB8
219 #define XG_TX_PKTS_1024_TO_15XX_OCTETS_WIDTH 4
220 #define XG_TX_PKTS_15XX_TO_MAX_OCTETS_OFFSET 0xBC
221 #define XG_TX_PKTS_15XX_TO_MAX_OCTETS_WIDTH 4
222 #define XG_TX_UNDERSIZE_PKTS_OFFSET 0xC0
223 #define XG_TX_UNDERSIZE_PKTS_WIDTH 4
224 #define XG_TX_OVERSIZE_PKTS_OFFSET 0xC4
225 #define XG_TX_OVERSIZE_PKTS_WIDTH 4
226 #define XG_TX_NON_TCP_UDP_PKTS_OFFSET 0xC8
227 #define XG_TX_NON_TCP_UDP_PKTS_WIDTH 2
228 #define XG_TX_MAC_SRC_ERR_PKTS_OFFSET 0xCC
229 #define XG_TX_MAC_SRC_ERR_PKTS_WIDTH 2
230 #define XG_TX_IP_SRC_ERR_PKTS_OFFSET 0xD0
231 #define XG_TX_IP_SRC_ERR_PKTS_WIDTH 2
232
233 #define XG_DMA_DONE_OFFSET 0xD4
234 #define XG_DMA_DONE_WIDTH 4
235
236 #define DMA_IS_DONE 0xffffffff
237
238 #define XG_STAT_OFFSET(_id) XG_ ## _id ## _OFFSET
239 #define XG_STAT_WIDTH(_id) XG_ ## _id ## _WIDTH
240
241 #ifdef __cplusplus
242 }
243 #endif
244
245 #endif /* _SYS_FALCON_STATS_H */