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--- old/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas_impl.c
+++ new/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas_impl.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
24 24 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
25 25 * Copyright 2014 OmniTI Computer Consulting, Inc. All rights reserved.
26 26 * Copyright (c) 2014, Tegile Systems Inc. All rights reserved.
27 27 */
28 28
29 29 /*
30 30 * Copyright (c) 2000 to 2010, LSI Corporation.
31 31 * All rights reserved.
32 32 *
33 33 * Redistribution and use in source and binary forms of all code within
34 34 * this file that is exclusively owned by LSI, with or without
35 35 * modification, is permitted provided that, in addition to the CDDL 1.0
36 36 * License requirements, the following conditions are met:
37 37 *
38 38 * Neither the name of the author nor the names of its contributors may be
39 39 * used to endorse or promote products derived from this software without
40 40 * specific prior written permission.
41 41 *
42 42 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43 43 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44 44 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
45 45 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
46 46 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
47 47 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
48 48 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
49 49 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
50 50 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
51 51 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
52 52 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
53 53 * DAMAGE.
54 54 */
55 55
56 56 /*
57 57 * mptsas_impl - This file contains all the basic functions for communicating
58 58 * to MPT based hardware.
59 59 */
60 60
61 61 #if defined(lint) || defined(DEBUG)
62 62 #define MPTSAS_DEBUG
63 63 #endif
64 64
65 65 /*
66 66 * standard header files
67 67 */
68 68 #include <sys/note.h>
69 69 #include <sys/scsi/scsi.h>
70 70 #include <sys/pci.h>
71 71
72 72 #pragma pack(1)
73 73 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_type.h>
74 74 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2.h>
75 75 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_cnfg.h>
76 76 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_init.h>
77 77 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_ioc.h>
78 78 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_sas.h>
79 79 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_tool.h>
80 80 #pragma pack()
81 81
82 82 /*
83 83 * private header files.
84 84 */
85 85 #include <sys/scsi/adapters/mpt_sas/mptsas_var.h>
86 86 #include <sys/scsi/adapters/mpt_sas/mptsas_smhba.h>
87 87
88 88 /*
89 89 * FMA header files.
90 90 */
91 91 #include <sys/fm/io/ddi.h>
92 92
93 93 /*
94 94 * prototypes
95 95 */
96 96 static void mptsas_ioc_event_cmdq_add(mptsas_t *mpt, m_event_struct_t *cmd);
97 97 static void mptsas_ioc_event_cmdq_delete(mptsas_t *mpt, m_event_struct_t *cmd);
98 98 static m_event_struct_t *mptsas_ioc_event_find_by_cmd(mptsas_t *mpt,
99 99 struct mptsas_cmd *cmd);
100 100
101 101 /*
102 102 * add ioc evnet cmd into the queue
103 103 */
104 104 static void
105 105 mptsas_ioc_event_cmdq_add(mptsas_t *mpt, m_event_struct_t *cmd)
106 106 {
107 107 if ((cmd->m_event_linkp = mpt->m_ioc_event_cmdq) == NULL) {
108 108 mpt->m_ioc_event_cmdtail = &cmd->m_event_linkp;
109 109 mpt->m_ioc_event_cmdq = cmd;
110 110 } else {
111 111 cmd->m_event_linkp = NULL;
112 112 *(mpt->m_ioc_event_cmdtail) = cmd;
113 113 mpt->m_ioc_event_cmdtail = &cmd->m_event_linkp;
114 114 }
115 115 }
116 116
117 117 /*
118 118 * remove specified cmd from the ioc event queue
119 119 */
120 120 static void
121 121 mptsas_ioc_event_cmdq_delete(mptsas_t *mpt, m_event_struct_t *cmd)
122 122 {
123 123 m_event_struct_t *prev = mpt->m_ioc_event_cmdq;
124 124 if (prev == cmd) {
125 125 if ((mpt->m_ioc_event_cmdq = cmd->m_event_linkp) == NULL) {
126 126 mpt->m_ioc_event_cmdtail = &mpt->m_ioc_event_cmdq;
127 127 }
128 128 cmd->m_event_linkp = NULL;
129 129 return;
130 130 }
131 131 while (prev != NULL) {
132 132 if (prev->m_event_linkp == cmd) {
133 133 prev->m_event_linkp = cmd->m_event_linkp;
134 134 if (cmd->m_event_linkp == NULL) {
135 135 mpt->m_ioc_event_cmdtail = &prev->m_event_linkp;
136 136 }
137 137
138 138 cmd->m_event_linkp = NULL;
139 139 return;
140 140 }
141 141 prev = prev->m_event_linkp;
142 142 }
143 143 }
144 144
145 145 static m_event_struct_t *
146 146 mptsas_ioc_event_find_by_cmd(mptsas_t *mpt, struct mptsas_cmd *cmd)
147 147 {
148 148 m_event_struct_t *ioc_cmd = NULL;
149 149
150 150 ioc_cmd = mpt->m_ioc_event_cmdq;
151 151 while (ioc_cmd != NULL) {
152 152 if (&(ioc_cmd->m_event_cmd) == cmd) {
153 153 return (ioc_cmd);
154 154 }
155 155 ioc_cmd = ioc_cmd->m_event_linkp;
156 156 }
157 157 ioc_cmd = NULL;
158 158 return (ioc_cmd);
159 159 }
160 160
161 161 void
162 162 mptsas_destroy_ioc_event_cmd(mptsas_t *mpt)
163 163 {
164 164 m_event_struct_t *ioc_cmd = NULL;
165 165 m_event_struct_t *ioc_cmd_tmp = NULL;
166 166 ioc_cmd = mpt->m_ioc_event_cmdq;
167 167
168 168 /*
169 169 * because the IOC event queue is resource of per instance for driver,
170 170 * it's not only ACK event commands used it, but also some others used
171 171 * it. We need destroy all ACK event commands when IOC reset, but can't
172 172 * disturb others.So we use filter to clear the ACK event cmd in ioc
173 173 * event queue, and other requests should be reserved, and they would
174 174 * be free by its owner.
175 175 */
176 176 while (ioc_cmd != NULL) {
177 177 if (ioc_cmd->m_event_cmd.cmd_flags & CFLAG_CMDACK) {
178 178 NDBG20(("destroy!! remove Ack Flag ioc_cmd\n"));
179 179 if ((mpt->m_ioc_event_cmdq =
180 180 ioc_cmd->m_event_linkp) == NULL)
181 181 mpt->m_ioc_event_cmdtail =
182 182 &mpt->m_ioc_event_cmdq;
183 183 ioc_cmd_tmp = ioc_cmd;
184 184 ioc_cmd = ioc_cmd->m_event_linkp;
185 185 kmem_free(ioc_cmd_tmp, M_EVENT_STRUCT_SIZE);
186 186 } else {
187 187 /*
188 188 * it's not ack cmd, so continue to check next one
189 189 */
190 190
191 191 NDBG20(("destroy!! it's not Ack Flag, continue\n"));
192 192 ioc_cmd = ioc_cmd->m_event_linkp;
193 193 }
194 194
195 195 }
196 196 }
197 197
198 198 void
199 199 mptsas_start_config_page_access(mptsas_t *mpt, mptsas_cmd_t *cmd)
200 200 {
201 201 pMpi2ConfigRequest_t request;
202 202 pMpi2SGESimple64_t sge;
203 203 struct scsi_pkt *pkt = cmd->cmd_pkt;
204 204 mptsas_config_request_t *config = pkt->pkt_ha_private;
205 205 uint8_t direction;
206 206 uint32_t length, flagslength;
207 207 uint64_t request_desc;
208 208
209 209 ASSERT(mutex_owned(&mpt->m_mutex));
210 210
211 211 /*
212 212 * Point to the correct message and clear it as well as the global
213 213 * config page memory.
214 214 */
215 215 request = (pMpi2ConfigRequest_t)(mpt->m_req_frame +
216 216 (mpt->m_req_frame_size * cmd->cmd_slot));
217 217 bzero(request, mpt->m_req_frame_size);
218 218
219 219 /*
220 220 * Form the request message.
221 221 */
222 222 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Function,
223 223 MPI2_FUNCTION_CONFIG);
224 224 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Action, config->action);
225 225 direction = MPI2_SGE_FLAGS_IOC_TO_HOST;
226 226 length = 0;
227 227 sge = (pMpi2SGESimple64_t)&request->PageBufferSGE;
228 228 if (config->action == MPI2_CONFIG_ACTION_PAGE_HEADER) {
229 229 if (config->page_type > MPI2_CONFIG_PAGETYPE_MASK) {
230 230 ddi_put8(mpt->m_acc_req_frame_hdl,
231 231 &request->Header.PageType,
232 232 MPI2_CONFIG_PAGETYPE_EXTENDED);
233 233 ddi_put8(mpt->m_acc_req_frame_hdl,
234 234 &request->ExtPageType, config->page_type);
235 235 } else {
236 236 ddi_put8(mpt->m_acc_req_frame_hdl,
237 237 &request->Header.PageType, config->page_type);
238 238 }
239 239 } else {
240 240 ddi_put8(mpt->m_acc_req_frame_hdl, &request->ExtPageType,
241 241 config->ext_page_type);
242 242 ddi_put16(mpt->m_acc_req_frame_hdl, &request->ExtPageLength,
243 243 config->ext_page_length);
244 244 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageType,
245 245 config->page_type);
246 246 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageLength,
247 247 config->page_length);
248 248 ddi_put8(mpt->m_acc_req_frame_hdl,
249 249 &request->Header.PageVersion, config->page_version);
250 250 if ((config->page_type & MPI2_CONFIG_PAGETYPE_MASK) ==
251 251 MPI2_CONFIG_PAGETYPE_EXTENDED) {
252 252 length = config->ext_page_length * 4;
253 253 } else {
254 254 length = config->page_length * 4;
255 255 }
256 256
257 257 if (config->action == MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) {
258 258 direction = MPI2_SGE_FLAGS_HOST_TO_IOC;
259 259 }
260 260 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.Low,
261 261 (uint32_t)cmd->cmd_dma_addr);
262 262 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.High,
263 263 (uint32_t)(cmd->cmd_dma_addr >> 32));
264 264 }
265 265 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageNumber,
266 266 config->page_number);
267 267 ddi_put32(mpt->m_acc_req_frame_hdl, &request->PageAddress,
268 268 config->page_address);
269 269 flagslength = ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
270 270 MPI2_SGE_FLAGS_END_OF_BUFFER |
271 271 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
272 272 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
273 273 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
274 274 direction |
275 275 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
276 276 flagslength |= length;
277 277 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->FlagsLength, flagslength);
278 278
279 279 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
280 280 DDI_DMA_SYNC_FORDEV);
281 281 request_desc = (cmd->cmd_slot << 16) +
282 282 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
283 283 cmd->cmd_rfm = NULL;
284 284 MPTSAS_START_CMD(mpt, request_desc);
285 285 if ((mptsas_check_dma_handle(mpt->m_dma_req_frame_hdl) !=
286 286 DDI_SUCCESS) ||
287 287 (mptsas_check_acc_handle(mpt->m_acc_req_frame_hdl) !=
288 288 DDI_SUCCESS)) {
289 289 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
290 290 }
291 291 }
292 292
293 293 int
294 294 mptsas_access_config_page(mptsas_t *mpt, uint8_t action, uint8_t page_type,
295 295 uint8_t page_number, uint32_t page_address, int (*callback) (mptsas_t *,
296 296 caddr_t, ddi_acc_handle_t, uint16_t, uint32_t, va_list), ...)
297 297 {
298 298 va_list ap;
299 299 ddi_dma_attr_t attrs;
300 300 ddi_dma_cookie_t cookie;
301 301 ddi_acc_handle_t accessp;
302 302 size_t len = 0;
303 303 mptsas_config_request_t config;
304 304 int rval = DDI_SUCCESS, config_flags = 0;
305 305 mptsas_cmd_t *cmd;
306 306 struct scsi_pkt *pkt;
307 307 pMpi2ConfigReply_t reply;
308 308 uint16_t iocstatus = 0;
309 309 uint32_t iocloginfo;
310 310 caddr_t page_memp;
311 311 boolean_t free_dma = B_FALSE;
312 312
313 313 va_start(ap, callback);
314 314 ASSERT(mutex_owned(&mpt->m_mutex));
315 315
316 316 /*
317 317 * Get a command from the pool.
318 318 */
319 319 if ((rval = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) {
320 320 mptsas_log(mpt, CE_NOTE, "command pool is full for config "
321 321 "page request");
322 322 rval = DDI_FAILURE;
323 323 goto page_done;
324 324 }
325 325 config_flags |= MPTSAS_REQUEST_POOL_CMD;
326 326
327 327 bzero((caddr_t)cmd, sizeof (*cmd));
328 328 bzero((caddr_t)pkt, scsi_pkt_size());
329 329 bzero((caddr_t)&config, sizeof (config));
330 330
331 331 /*
332 332 * Save the data for this request to be used in the call to start the
333 333 * config header request.
334 334 */
335 335 config.action = MPI2_CONFIG_ACTION_PAGE_HEADER;
336 336 config.page_type = page_type;
337 337 config.page_number = page_number;
338 338 config.page_address = page_address;
339 339
340 340 /*
341 341 * Form a blank cmd/pkt to store the acknowledgement message
342 342 */
343 343 pkt->pkt_ha_private = (opaque_t)&config;
344 344 pkt->pkt_flags = FLAG_HEAD;
345 345 pkt->pkt_time = 60;
346 346 cmd->cmd_pkt = pkt;
347 347 cmd->cmd_flags = CFLAG_CMDIOC | CFLAG_CONFIG;
348 348
349 349 /*
350 350 * Save the config header request message in a slot.
351 351 */
352 352 if (mptsas_save_cmd(mpt, cmd) == TRUE) {
353 353 cmd->cmd_flags |= CFLAG_PREPARED;
354 354 mptsas_start_config_page_access(mpt, cmd);
355 355 } else {
356 356 mptsas_waitq_add(mpt, cmd);
357 357 }
358 358
359 359 /*
360 360 * If this is a request for a RAID info page, or any page called during
361 361 * the RAID info page request, poll because these config page requests
362 362 * are nested. Poll to avoid data corruption due to one page's data
363 363 * overwriting the outer page request's data. This can happen when
364 364 * the mutex is released in cv_wait.
365 365 */
366 366 if ((page_type == MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG) ||
367 367 (page_type == MPI2_CONFIG_PAGETYPE_RAID_VOLUME) ||
368 368 (page_type == MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK)) {
369 369 (void) mptsas_poll(mpt, cmd, pkt->pkt_time * 1000);
370 370 } else {
371 371 while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) {
372 372 cv_wait(&mpt->m_config_cv, &mpt->m_mutex);
373 373 }
374 374 }
375 375
376 376 /*
377 377 * Check if the header request completed without timing out
378 378 */
379 379 if (cmd->cmd_flags & CFLAG_TIMEOUT) {
380 380 mptsas_log(mpt, CE_WARN, "config header request timeout");
381 381 rval = DDI_FAILURE;
382 382 goto page_done;
383 383 }
384 384
385 385 /*
386 386 * cmd_rfm points to the reply message if a reply was given. Check the
387 387 * IOCStatus to make sure everything went OK with the header request.
388 388 */
389 389 if (cmd->cmd_rfm) {
390 390 config_flags |= MPTSAS_ADDRESS_REPLY;
391 391 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
392 392 DDI_DMA_SYNC_FORCPU);
393 393 reply = (pMpi2ConfigReply_t)(mpt->m_reply_frame + (cmd->cmd_rfm
394 394 - (mpt->m_reply_frame_dma_addr & 0xffffffffu)));
395 395 config.page_type = ddi_get8(mpt->m_acc_reply_frame_hdl,
396 396 &reply->Header.PageType);
397 397 config.page_number = ddi_get8(mpt->m_acc_reply_frame_hdl,
398 398 &reply->Header.PageNumber);
399 399 config.page_length = ddi_get8(mpt->m_acc_reply_frame_hdl,
400 400 &reply->Header.PageLength);
401 401 config.page_version = ddi_get8(mpt->m_acc_reply_frame_hdl,
402 402 &reply->Header.PageVersion);
403 403 config.ext_page_type = ddi_get8(mpt->m_acc_reply_frame_hdl,
404 404 &reply->ExtPageType);
405 405 config.ext_page_length = ddi_get16(mpt->m_acc_reply_frame_hdl,
406 406 &reply->ExtPageLength);
407 407
408 408 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
409 409 &reply->IOCStatus);
410 410 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
411 411 &reply->IOCLogInfo);
412 412
413 413 if (iocstatus) {
414 414 NDBG13(("mptsas_access_config_page header: "
415 415 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
416 416 iocloginfo));
417 417 rval = DDI_FAILURE;
418 418 goto page_done;
419 419 }
420 420
421 421 if ((config.page_type & MPI2_CONFIG_PAGETYPE_MASK) ==
422 422 MPI2_CONFIG_PAGETYPE_EXTENDED)
423 423 len = (config.ext_page_length * 4);
424 424 else
425 425 len = (config.page_length * 4);
426 426
427 427 }
428 428
429 429 if (pkt->pkt_reason == CMD_RESET) {
430 430 mptsas_log(mpt, CE_WARN, "ioc reset abort config header "
431 431 "request");
432 432 rval = DDI_FAILURE;
433 433 goto page_done;
434 434 }
435 435
436 436 /*
437 437 * Put the reply frame back on the free queue, increment the free
438 438 * index, and write the new index to the free index register. But only
439 439 * if this reply is an ADDRESS reply.
440 440 */
441 441 if (config_flags & MPTSAS_ADDRESS_REPLY) {
442 442 ddi_put32(mpt->m_acc_free_queue_hdl,
443 443 &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
444 444 cmd->cmd_rfm);
445 445 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
446 446 DDI_DMA_SYNC_FORDEV);
447 447 if (++mpt->m_free_index == mpt->m_free_queue_depth) {
448 448 mpt->m_free_index = 0;
449 449 }
450 450 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
451 451 mpt->m_free_index);
452 452 config_flags &= (~MPTSAS_ADDRESS_REPLY);
453 453 }
454 454
455 455 /*
456 456 * Allocate DMA buffer here. Store the info regarding this buffer in
457 457 * the cmd struct so that it can be used for this specific command and
458 458 * de-allocated after the command completes. The size of the reply
459 459 * will not be larger than the reply frame size.
460 460 */
461 461 attrs = mpt->m_msg_dma_attr;
462 462 attrs.dma_attr_sgllen = 1;
463 463 attrs.dma_attr_granular = (uint32_t)len;
464 464
465 465 if (mptsas_dma_addr_create(mpt, attrs,
466 466 &cmd->cmd_dmahandle, &accessp, &page_memp,
467 467 len, &cookie) == FALSE) {
468 468 rval = DDI_FAILURE;
469 469 mptsas_log(mpt, CE_WARN,
470 470 "mptsas_dma_addr_create(len=0x%x) failed", (int)len);
471 471 goto page_done;
472 472 }
473 473 /* NOW we can safely call mptsas_dma_addr_destroy(). */
474 474 free_dma = B_TRUE;
475 475
476 476 cmd->cmd_dma_addr = cookie.dmac_laddress;
477 477 bzero(page_memp, len);
478 478
479 479 /*
480 480 * Save the data for this request to be used in the call to start the
481 481 * config page read
482 482 */
483 483 config.action = action;
484 484 config.page_address = page_address;
485 485
486 486 /*
487 487 * Re-use the cmd that was used to get the header. Reset some of the
488 488 * values.
489 489 */
490 490 bzero((caddr_t)pkt, scsi_pkt_size());
491 491 pkt->pkt_ha_private = (opaque_t)&config;
492 492 pkt->pkt_flags = FLAG_HEAD;
493 493 pkt->pkt_time = 60;
494 494 cmd->cmd_flags = CFLAG_PREPARED | CFLAG_CMDIOC | CFLAG_CONFIG;
495 495
496 496 /*
497 497 * Send the config page request. cmd is re-used from header request.
498 498 */
499 499 mptsas_start_config_page_access(mpt, cmd);
500 500
501 501 /*
502 502 * If this is a request for a RAID info page, or any page called during
503 503 * the RAID info page request, poll because these config page requests
504 504 * are nested. Poll to avoid data corruption due to one page's data
505 505 * overwriting the outer page request's data. This can happen when
506 506 * the mutex is released in cv_wait.
507 507 */
508 508 if ((page_type == MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG) ||
509 509 (page_type == MPI2_CONFIG_PAGETYPE_RAID_VOLUME) ||
510 510 (page_type == MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK)) {
511 511 (void) mptsas_poll(mpt, cmd, pkt->pkt_time * 1000);
512 512 } else {
513 513 while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) {
514 514 cv_wait(&mpt->m_config_cv, &mpt->m_mutex);
515 515 }
516 516 }
517 517
518 518 /*
519 519 * Check if the request completed without timing out
520 520 */
521 521 if (cmd->cmd_flags & CFLAG_TIMEOUT) {
522 522 mptsas_log(mpt, CE_WARN, "config page request timeout");
523 523 rval = DDI_FAILURE;
524 524 goto page_done;
525 525 }
526 526
527 527 /*
528 528 * cmd_rfm points to the reply message if a reply was given. The reply
529 529 * frame and the config page are returned from this function in the
530 530 * param list.
531 531 */
532 532 if (cmd->cmd_rfm) {
533 533 config_flags |= MPTSAS_ADDRESS_REPLY;
534 534 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
535 535 DDI_DMA_SYNC_FORCPU);
536 536 (void) ddi_dma_sync(cmd->cmd_dmahandle, 0, 0,
537 537 DDI_DMA_SYNC_FORCPU);
538 538 reply = (pMpi2ConfigReply_t)(mpt->m_reply_frame + (cmd->cmd_rfm
539 539 - (mpt->m_reply_frame_dma_addr & 0xffffffffu)));
540 540 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
541 541 &reply->IOCStatus);
542 542 iocstatus = MPTSAS_IOCSTATUS(iocstatus);
543 543 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
544 544 &reply->IOCLogInfo);
545 545 }
546 546
547 547 if (callback(mpt, page_memp, accessp, iocstatus, iocloginfo, ap)) {
548 548 rval = DDI_FAILURE;
549 549 goto page_done;
550 550 }
551 551
552 552 mptsas_fma_check(mpt, cmd);
553 553 /*
554 554 * Check the DMA/ACC handles and then free the DMA buffer.
555 555 */
556 556 if ((mptsas_check_dma_handle(cmd->cmd_dmahandle) != DDI_SUCCESS) ||
557 557 (mptsas_check_acc_handle(accessp) != DDI_SUCCESS)) {
558 558 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
559 559 rval = DDI_FAILURE;
560 560 }
561 561
562 562 if (pkt->pkt_reason == CMD_TRAN_ERR) {
563 563 mptsas_log(mpt, CE_WARN, "config fma error");
564 564 rval = DDI_FAILURE;
565 565 goto page_done;
566 566 }
567 567 if (pkt->pkt_reason == CMD_RESET) {
568 568 mptsas_log(mpt, CE_WARN, "ioc reset abort config request");
569 569 rval = DDI_FAILURE;
570 570 goto page_done;
571 571 }
572 572
573 573 page_done:
574 574 va_end(ap);
575 575 /*
576 576 * Put the reply frame back on the free queue, increment the free
577 577 * index, and write the new index to the free index register. But only
578 578 * if this reply is an ADDRESS reply.
579 579 */
580 580 if (config_flags & MPTSAS_ADDRESS_REPLY) {
581 581 ddi_put32(mpt->m_acc_free_queue_hdl,
582 582 &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
583 583 cmd->cmd_rfm);
584 584 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
585 585 DDI_DMA_SYNC_FORDEV);
586 586 if (++mpt->m_free_index == mpt->m_free_queue_depth) {
587 587 mpt->m_free_index = 0;
588 588 }
589 589 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
590 590 mpt->m_free_index);
591 591 }
592 592
593 593 if (free_dma)
594 594 mptsas_dma_addr_destroy(&cmd->cmd_dmahandle, &accessp);
595 595
596 596 if (cmd && (cmd->cmd_flags & CFLAG_PREPARED)) {
597 597 mptsas_remove_cmd(mpt, cmd);
598 598 config_flags &= (~MPTSAS_REQUEST_POOL_CMD);
599 599 }
600 600 if (config_flags & MPTSAS_REQUEST_POOL_CMD)
601 601 mptsas_return_to_pool(mpt, cmd);
602 602
603 603 if (config_flags & MPTSAS_CMD_TIMEOUT) {
604 604 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
605 605 if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) {
606 606 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
607 607 }
608 608 }
609 609
610 610 return (rval);
611 611 }
612 612
613 613 int
614 614 mptsas_send_config_request_msg(mptsas_t *mpt, uint8_t action, uint8_t pagetype,
615 615 uint32_t pageaddress, uint8_t pagenumber, uint8_t pageversion,
616 616 uint8_t pagelength, uint32_t SGEflagslength, uint64_t SGEaddress)
617 617 {
618 618 pMpi2ConfigRequest_t config;
619 619 int send_numbytes;
620 620
621 621 bzero(mpt->m_hshk_memp, sizeof (MPI2_CONFIG_REQUEST));
622 622 config = (pMpi2ConfigRequest_t)mpt->m_hshk_memp;
623 623 ddi_put8(mpt->m_hshk_acc_hdl, &config->Function, MPI2_FUNCTION_CONFIG);
624 624 ddi_put8(mpt->m_hshk_acc_hdl, &config->Action, action);
625 625 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageNumber, pagenumber);
626 626 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageType, pagetype);
627 627 ddi_put32(mpt->m_hshk_acc_hdl, &config->PageAddress, pageaddress);
628 628 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageVersion, pageversion);
629 629 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageLength, pagelength);
630 630 ddi_put32(mpt->m_hshk_acc_hdl,
631 631 &config->PageBufferSGE.MpiSimple.FlagsLength, SGEflagslength);
632 632 ddi_put32(mpt->m_hshk_acc_hdl,
633 633 &config->PageBufferSGE.MpiSimple.u.Address64.Low, SGEaddress);
634 634 ddi_put32(mpt->m_hshk_acc_hdl,
635 635 &config->PageBufferSGE.MpiSimple.u.Address64.High,
636 636 SGEaddress >> 32);
637 637 send_numbytes = sizeof (MPI2_CONFIG_REQUEST);
638 638
639 639 /*
640 640 * Post message via handshake
641 641 */
642 642 if (mptsas_send_handshake_msg(mpt, (caddr_t)config, send_numbytes,
643 643 mpt->m_hshk_acc_hdl)) {
644 644 return (-1);
645 645 }
646 646 return (0);
647 647 }
648 648
649 649 int
650 650 mptsas_send_extended_config_request_msg(mptsas_t *mpt, uint8_t action,
651 651 uint8_t extpagetype, uint32_t pageaddress, uint8_t pagenumber,
652 652 uint8_t pageversion, uint16_t extpagelength,
653 653 uint32_t SGEflagslength, uint64_t SGEaddress)
654 654 {
655 655 pMpi2ConfigRequest_t config;
656 656 int send_numbytes;
657 657
658 658 bzero(mpt->m_hshk_memp, sizeof (MPI2_CONFIG_REQUEST));
659 659 config = (pMpi2ConfigRequest_t)mpt->m_hshk_memp;
660 660 ddi_put8(mpt->m_hshk_acc_hdl, &config->Function, MPI2_FUNCTION_CONFIG);
661 661 ddi_put8(mpt->m_hshk_acc_hdl, &config->Action, action);
662 662 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageNumber, pagenumber);
663 663 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageType,
664 664 MPI2_CONFIG_PAGETYPE_EXTENDED);
665 665 ddi_put8(mpt->m_hshk_acc_hdl, &config->ExtPageType, extpagetype);
666 666 ddi_put32(mpt->m_hshk_acc_hdl, &config->PageAddress, pageaddress);
667 667 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageVersion, pageversion);
668 668 ddi_put16(mpt->m_hshk_acc_hdl, &config->ExtPageLength, extpagelength);
669 669 ddi_put32(mpt->m_hshk_acc_hdl,
670 670 &config->PageBufferSGE.MpiSimple.FlagsLength, SGEflagslength);
671 671 ddi_put32(mpt->m_hshk_acc_hdl,
672 672 &config->PageBufferSGE.MpiSimple.u.Address64.Low, SGEaddress);
673 673 ddi_put32(mpt->m_hshk_acc_hdl,
674 674 &config->PageBufferSGE.MpiSimple.u.Address64.High,
675 675 SGEaddress >> 32);
676 676 send_numbytes = sizeof (MPI2_CONFIG_REQUEST);
677 677
678 678 /*
679 679 * Post message via handshake
680 680 */
681 681 if (mptsas_send_handshake_msg(mpt, (caddr_t)config, send_numbytes,
682 682 mpt->m_hshk_acc_hdl)) {
683 683 return (-1);
684 684 }
685 685 return (0);
686 686 }
687 687
688 688 int
689 689 mptsas_ioc_wait_for_response(mptsas_t *mpt)
690 690 {
691 691 int polls = 0;
692 692
693 693 while ((ddi_get32(mpt->m_datap,
694 694 &mpt->m_reg->HostInterruptStatus) & MPI2_HIS_IOP_DOORBELL_STATUS)) {
695 695 drv_usecwait(1000);
696 696 if (polls++ > 60000) {
697 697 return (-1);
698 698 }
699 699 }
700 700 return (0);
701 701 }
702 702
703 703 int
704 704 mptsas_ioc_wait_for_doorbell(mptsas_t *mpt)
705 705 {
706 706 int polls = 0;
707 707
708 708 while ((ddi_get32(mpt->m_datap,
709 709 &mpt->m_reg->HostInterruptStatus) & MPI2_HIM_DIM) == 0) {
710 710 drv_usecwait(1000);
711 711 if (polls++ > 300000) {
712 712 return (-1);
713 713 }
714 714 }
715 715 return (0);
716 716 }
717 717
718 718 int
719 719 mptsas_send_handshake_msg(mptsas_t *mpt, caddr_t memp, int numbytes,
720 720 ddi_acc_handle_t accessp)
721 721 {
722 722 int i;
723 723
724 724 /*
725 725 * clean pending doorbells
726 726 */
727 727 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
728 728 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell,
729 729 ((MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
730 730 ((numbytes / 4) << MPI2_DOORBELL_ADD_DWORDS_SHIFT)));
731 731
732 732 if (mptsas_ioc_wait_for_doorbell(mpt)) {
733 733 NDBG19(("mptsas_send_handshake failed. Doorbell not ready\n"));
734 734 return (-1);
735 735 }
736 736
737 737 /*
738 738 * clean pending doorbells again
739 739 */
740 740 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
741 741
742 742 if (mptsas_ioc_wait_for_response(mpt)) {
743 743 NDBG19(("mptsas_send_handshake failed. Doorbell not "
744 744 "cleared\n"));
745 745 return (-1);
746 746 }
747 747
748 748 /*
749 749 * post handshake message
750 750 */
751 751 for (i = 0; (i < numbytes / 4); i++, memp += 4) {
752 752 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell,
753 753 ddi_get32(accessp, (uint32_t *)((void *)(memp))));
754 754 if (mptsas_ioc_wait_for_response(mpt)) {
755 755 NDBG19(("mptsas_send_handshake failed posting "
756 756 "message\n"));
757 757 return (-1);
758 758 }
759 759 }
760 760
761 761 if (mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) {
762 762 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
763 763 ddi_fm_acc_err_clear(mpt->m_datap, DDI_FME_VER0);
764 764 return (-1);
765 765 }
766 766
767 767 return (0);
768 768 }
769 769
770 770 int
771 771 mptsas_get_handshake_msg(mptsas_t *mpt, caddr_t memp, int numbytes,
772 772 ddi_acc_handle_t accessp)
773 773 {
774 774 int i, totalbytes, bytesleft;
775 775 uint16_t val;
776 776
777 777 /*
778 778 * wait for doorbell
779 779 */
780 780 if (mptsas_ioc_wait_for_doorbell(mpt)) {
781 781 NDBG19(("mptsas_get_handshake failed. Doorbell not ready\n"));
782 782 return (-1);
783 783 }
784 784
785 785 /*
786 786 * get first 2 bytes of handshake message to determine how much
787 787 * data we will be getting
788 788 */
789 789 for (i = 0; i < 2; i++, memp += 2) {
790 790 val = (ddi_get32(mpt->m_datap,
791 791 &mpt->m_reg->Doorbell) & MPI2_DOORBELL_DATA_MASK);
792 792 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
793 793 if (mptsas_ioc_wait_for_doorbell(mpt)) {
794 794 NDBG19(("mptsas_get_handshake failure getting initial"
795 795 " data\n"));
796 796 return (-1);
797 797 }
798 798 ddi_put16(accessp, (uint16_t *)((void *)(memp)), val);
799 799 if (i == 1) {
800 800 totalbytes = (val & 0xFF) * 2;
801 801 }
802 802 }
803 803
804 804 /*
805 805 * If we are expecting less bytes than the message wants to send
806 806 * we simply save as much as we expected and then throw out the rest
807 807 * later
808 808 */
809 809 if (totalbytes > (numbytes / 2)) {
810 810 bytesleft = ((numbytes / 2) - 2);
811 811 } else {
812 812 bytesleft = (totalbytes - 2);
813 813 }
814 814
815 815 /*
816 816 * Get the rest of the data
817 817 */
818 818 for (i = 0; i < bytesleft; i++, memp += 2) {
819 819 val = (ddi_get32(mpt->m_datap,
820 820 &mpt->m_reg->Doorbell) & MPI2_DOORBELL_DATA_MASK);
821 821 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
822 822 if (mptsas_ioc_wait_for_doorbell(mpt)) {
823 823 NDBG19(("mptsas_get_handshake failure getting"
824 824 " main data\n"));
825 825 return (-1);
826 826 }
827 827 ddi_put16(accessp, (uint16_t *)((void *)(memp)), val);
828 828 }
829 829
830 830 /*
831 831 * Sometimes the device will send more data than is expected
832 832 * This data is not used by us but needs to be cleared from
833 833 * ioc doorbell. So we just read the values and throw
834 834 * them out.
835 835 */
836 836 if (totalbytes > (numbytes / 2)) {
837 837 for (i = (numbytes / 2); i < totalbytes; i++) {
838 838 val = (ddi_get32(mpt->m_datap,
839 839 &mpt->m_reg->Doorbell) &
840 840 MPI2_DOORBELL_DATA_MASK);
841 841 ddi_put32(mpt->m_datap,
842 842 &mpt->m_reg->HostInterruptStatus, 0);
843 843 if (mptsas_ioc_wait_for_doorbell(mpt)) {
844 844 NDBG19(("mptsas_get_handshake failure getting "
845 845 "extra garbage data\n"));
846 846 return (-1);
847 847 }
848 848 }
849 849 }
850 850
851 851 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
852 852
853 853 if (mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) {
854 854 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
855 855 ddi_fm_acc_err_clear(mpt->m_datap, DDI_FME_VER0);
856 856 return (-1);
857 857 }
858 858
859 859 return (0);
860 860 }
861 861
862 862 int
863 863 mptsas_kick_start(mptsas_t *mpt)
864 864 {
865 865 int polls = 0;
866 866 uint32_t diag_reg, ioc_state, saved_HCB_size;
867 867
868 868 /*
869 869 * Start a hard reset. Write magic number and wait 500 mSeconds.
870 870 */
871 871 MPTSAS_ENABLE_DRWE(mpt);
872 872 drv_usecwait(500000);
873 873
874 874 /*
875 875 * Read the current Diag Reg and save the Host Controlled Boot size.
876 876 */
877 877 diag_reg = ddi_get32(mpt->m_datap, &mpt->m_reg->HostDiagnostic);
878 878 saved_HCB_size = ddi_get32(mpt->m_datap, &mpt->m_reg->HCBSize);
879 879
880 880 /*
881 881 * Set Reset Adapter bit and wait 50 mSeconds.
882 882 */
883 883 diag_reg |= MPI2_DIAG_RESET_ADAPTER;
884 884 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg);
885 885 drv_usecwait(50000);
886 886
887 887 /*
888 888 * Poll, waiting for Reset Adapter bit to clear. 300 Seconds max
889 889 * (600000 * 500 = 300,000,000 uSeconds, 300 seconds).
890 890 * If no more adapter (all FF's), just return failure.
891 891 */
892 892 for (polls = 0; polls < 600000; polls++) {
893 893 diag_reg = ddi_get32(mpt->m_datap,
894 894 &mpt->m_reg->HostDiagnostic);
895 895 if (diag_reg == 0xFFFFFFFF) {
896 896 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
897 897 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
898 898 return (DDI_FAILURE);
899 899 }
900 900 if (!(diag_reg & MPI2_DIAG_RESET_ADAPTER)) {
901 901 break;
902 902 }
903 903 drv_usecwait(500);
904 904 }
905 905 if (polls == 600000) {
906 906 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
907 907 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
908 908 return (DDI_FAILURE);
909 909 }
910 910
911 911 /*
912 912 * Check if adapter is in Host Boot Mode. If so, restart adapter
913 913 * assuming the HCB points to good FW.
914 914 * Set BootDeviceSel to HCDW (Host Code and Data Window).
915 915 */
916 916 if (diag_reg & MPI2_DIAG_HCB_MODE) {
917 917 diag_reg &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
918 918 diag_reg |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
919 919 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg);
920 920
921 921 /*
922 922 * Re-enable the HCDW.
923 923 */
924 924 ddi_put32(mpt->m_datap, &mpt->m_reg->HCBSize,
925 925 (saved_HCB_size | MPI2_HCB_SIZE_HCB_ENABLE));
926 926 }
927 927
928 928 /*
929 929 * Restart the adapter.
930 930 */
931 931 diag_reg &= ~MPI2_DIAG_HOLD_IOC_RESET;
932 932 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg);
933 933
934 934 /*
935 935 * Disable writes to the Host Diag register.
936 936 */
937 937 ddi_put32(mpt->m_datap, &mpt->m_reg->WriteSequence,
938 938 MPI2_WRSEQ_FLUSH_KEY_VALUE);
939 939
940 940 /*
941 941 * Wait 60 seconds max for FW to come to ready state.
942 942 */
943 943 for (polls = 0; polls < 60000; polls++) {
944 944 ioc_state = ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell);
945 945 if (ioc_state == 0xFFFFFFFF) {
946 946 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
947 947 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
948 948 return (DDI_FAILURE);
949 949 }
950 950 if ((ioc_state & MPI2_IOC_STATE_MASK) ==
951 951 MPI2_IOC_STATE_READY) {
952 952 break;
953 953 }
954 954 drv_usecwait(1000);
955 955 }
956 956 if (polls == 60000) {
957 957 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
958 958 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
959 959 return (DDI_FAILURE);
960 960 }
961 961
962 962 /*
963 963 * Clear the ioc ack events queue.
964 964 */
965 965 mptsas_destroy_ioc_event_cmd(mpt);
966 966
967 967 return (DDI_SUCCESS);
968 968 }
969 969
970 970 int
971 971 mptsas_ioc_reset(mptsas_t *mpt, int first_time)
972 972 {
973 973 int polls = 0;
974 974 uint32_t reset_msg;
975 975 uint32_t ioc_state;
976 976
977 977 ioc_state = ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell);
978 978 /*
979 979 * If chip is already in ready state then there is nothing to do.
980 980 */
981 981 if (ioc_state == MPI2_IOC_STATE_READY) {
982 982 return (MPTSAS_NO_RESET);
983 983 }
984 984 /*
985 985 * If the chip is already operational, we just need to send
986 986 * it a message unit reset to put it back in the ready state
987 987 */
988 988 if (ioc_state & MPI2_IOC_STATE_OPERATIONAL) {
989 989 /*
990 990 * If the first time, try MUR anyway, because we haven't even
991 991 * queried the card for m_event_replay and other capabilities.
992 992 * Other platforms do it this way, we can still do a hard
993 993 * reset if we need to, MUR takes less time than a full
994 994 * adapter reset, and there are reports that some HW
995 995 * combinations will lock up when receiving a hard reset.
996 996 */
997 997 if ((first_time || mpt->m_event_replay) &&
998 998 (mpt->m_softstate & MPTSAS_SS_MSG_UNIT_RESET)) {
999 999 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
1000 1000 reset_msg = MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET;
1001 1001 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell,
1002 1002 (reset_msg << MPI2_DOORBELL_FUNCTION_SHIFT));
1003 1003 if (mptsas_ioc_wait_for_response(mpt)) {
1004 1004 NDBG19(("mptsas_ioc_reset failure sending "
1005 1005 "message_unit_reset\n"));
1006 1006 goto hard_reset;
1007 1007 }
1008 1008
1009 1009 /*
1010 1010 * Wait no more than 60 seconds for chip to become
1011 1011 * ready.
1012 1012 */
1013 1013 while ((ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell) &
1014 1014 MPI2_IOC_STATE_READY) == 0x0) {
1015 1015 drv_usecwait(1000);
1016 1016 if (polls++ > 60000) {
1017 1017 goto hard_reset;
1018 1018 }
1019 1019 }
1020 1020
1021 1021 /*
1022 1022 * Save the last reset mode done on IOC which will be
1023 1023 * helpful while resuming from suspension.
1024 1024 */
1025 1025 mpt->m_softstate |= MPTSAS_DID_MSG_UNIT_RESET;
1026 1026
1027 1027 /*
1028 1028 * the message unit reset would do reset operations
1029 1029 * clear reply and request queue, so we should clear
1030 1030 * ACK event cmd.
1031 1031 */
1032 1032 mptsas_destroy_ioc_event_cmd(mpt);
1033 1033 return (MPTSAS_SUCCESS_MUR);
1034 1034 }
1035 1035 }
1036 1036 hard_reset:
1037 1037 mpt->m_softstate &= ~MPTSAS_DID_MSG_UNIT_RESET;
1038 1038 if (mptsas_kick_start(mpt) == DDI_FAILURE) {
1039 1039 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
1040 1040 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
1041 1041 return (MPTSAS_RESET_FAIL);
1042 1042 }
1043 1043 return (MPTSAS_SUCCESS_HARDRESET);
1044 1044 }
1045 1045
1046 1046
1047 1047 int
1048 1048 mptsas_request_from_pool(mptsas_t *mpt, mptsas_cmd_t **cmd,
1049 1049 struct scsi_pkt **pkt)
1050 1050 {
1051 1051 m_event_struct_t *ioc_cmd = NULL;
1052 1052
1053 1053 ioc_cmd = kmem_zalloc(M_EVENT_STRUCT_SIZE, KM_SLEEP);
1054 1054 if (ioc_cmd == NULL) {
1055 1055 return (DDI_FAILURE);
1056 1056 }
1057 1057 ioc_cmd->m_event_linkp = NULL;
1058 1058 mptsas_ioc_event_cmdq_add(mpt, ioc_cmd);
1059 1059 *cmd = &(ioc_cmd->m_event_cmd);
1060 1060 *pkt = &(ioc_cmd->m_event_pkt);
1061 1061
1062 1062 return (DDI_SUCCESS);
1063 1063 }
1064 1064
1065 1065 void
1066 1066 mptsas_return_to_pool(mptsas_t *mpt, mptsas_cmd_t *cmd)
1067 1067 {
1068 1068 m_event_struct_t *ioc_cmd = NULL;
1069 1069
1070 1070 ioc_cmd = mptsas_ioc_event_find_by_cmd(mpt, cmd);
1071 1071 if (ioc_cmd == NULL) {
1072 1072 return;
1073 1073 }
1074 1074
1075 1075 mptsas_ioc_event_cmdq_delete(mpt, ioc_cmd);
1076 1076 kmem_free(ioc_cmd, M_EVENT_STRUCT_SIZE);
1077 1077 ioc_cmd = NULL;
1078 1078 }
1079 1079
1080 1080 /*
1081 1081 * NOTE: We should be able to queue TM requests in the controller to make this
1082 1082 * a lot faster. If resetting all targets, for example, we can load the hi
1083 1083 * priority queue with its limit and the controller will reply as they are
1084 1084 * completed. This way, we don't have to poll for one reply at a time.
1085 1085 * Think about enhancing this later.
1086 1086 */
1087 1087 int
1088 1088 mptsas_ioc_task_management(mptsas_t *mpt, int task_type, uint16_t dev_handle,
1089 1089 int lun, uint8_t *reply, uint32_t reply_size, int mode)
1090 1090 {
1091 1091 /*
1092 1092 * In order to avoid allocating variables on the stack,
1093 1093 * we make use of the pre-existing mptsas_cmd_t and
1094 1094 * scsi_pkt which are included in the mptsas_t which
1095 1095 * is passed to this routine.
1096 1096 */
1097 1097
1098 1098 pMpi2SCSITaskManagementRequest_t task;
1099 1099 int rval = FALSE;
1100 1100 mptsas_cmd_t *cmd;
1101 1101 struct scsi_pkt *pkt;
1102 1102 mptsas_slots_t *slots = mpt->m_active;
1103 1103 uint64_t request_desc, i;
1104 1104 pMPI2DefaultReply_t reply_msg;
1105 1105
1106 1106 /*
1107 1107 * Can't start another task management routine.
1108 1108 */
1109 1109 if (slots->m_slot[MPTSAS_TM_SLOT(mpt)] != NULL) {
1110 1110 mptsas_log(mpt, CE_WARN, "Can only start 1 task management"
1111 1111 " command at a time\n");
1112 1112 return (FALSE);
1113 1113 }
1114 1114
1115 1115 cmd = &(mpt->m_event_task_mgmt.m_event_cmd);
1116 1116 pkt = &(mpt->m_event_task_mgmt.m_event_pkt);
1117 1117
1118 1118 bzero((caddr_t)cmd, sizeof (*cmd));
1119 1119 bzero((caddr_t)pkt, scsi_pkt_size());
1120 1120
1121 1121 pkt->pkt_cdbp = (opaque_t)&cmd->cmd_cdb[0];
1122 1122 pkt->pkt_scbp = (opaque_t)&cmd->cmd_scb;
1123 1123 pkt->pkt_ha_private = (opaque_t)cmd;
1124 1124 pkt->pkt_flags = (FLAG_NOINTR | FLAG_HEAD);
1125 1125 pkt->pkt_time = 60;
1126 1126 pkt->pkt_address.a_target = dev_handle;
1127 1127 pkt->pkt_address.a_lun = (uchar_t)lun;
1128 1128 cmd->cmd_pkt = pkt;
1129 1129 cmd->cmd_scblen = 1;
1130 1130 cmd->cmd_flags = CFLAG_TM_CMD;
1131 1131 cmd->cmd_slot = MPTSAS_TM_SLOT(mpt);
1132 1132
1133 1133 slots->m_slot[MPTSAS_TM_SLOT(mpt)] = cmd;
1134 1134
1135 1135 /*
1136 1136 * Store the TM message in memory location corresponding to the TM slot
1137 1137 * number.
1138 1138 */
1139 1139 task = (pMpi2SCSITaskManagementRequest_t)(mpt->m_req_frame +
1140 1140 (mpt->m_req_frame_size * cmd->cmd_slot));
1141 1141 bzero(task, mpt->m_req_frame_size);
1142 1142
1143 1143 /*
1144 1144 * form message for requested task
1145 1145 */
1146 1146 mptsas_init_std_hdr(mpt->m_acc_req_frame_hdl, task, dev_handle, lun, 0,
1147 1147 MPI2_FUNCTION_SCSI_TASK_MGMT);
1148 1148
1149 1149 /*
1150 1150 * Set the task type
1151 1151 */
1152 1152 ddi_put8(mpt->m_acc_req_frame_hdl, &task->TaskType, task_type);
1153 1153
1154 1154 /*
1155 1155 * Send TM request using High Priority Queue.
1156 1156 */
1157 1157 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
1158 1158 DDI_DMA_SYNC_FORDEV);
1159 1159 request_desc = (cmd->cmd_slot << 16) +
1160 1160 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1161 1161 MPTSAS_START_CMD(mpt, request_desc);
1162 1162 rval = mptsas_poll(mpt, cmd, MPTSAS_POLL_TIME);
1163 1163
1164 1164 if (pkt->pkt_reason == CMD_INCOMPLETE)
1165 1165 rval = FALSE;
1166 1166
1167 1167 /*
1168 1168 * If a reply frame was used and there is a reply buffer to copy the
1169 1169 * reply data into, copy it. If this fails, log a message, but don't
1170 1170 * fail the TM request.
1171 1171 */
1172 1172 if (cmd->cmd_rfm && reply) {
1173 1173 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
1174 1174 DDI_DMA_SYNC_FORCPU);
1175 1175 reply_msg = (pMPI2DefaultReply_t)
1176 1176 (mpt->m_reply_frame + (cmd->cmd_rfm -
1177 1177 (mpt->m_reply_frame_dma_addr & 0xffffffffu)));
1178 1178 if (reply_size > sizeof (MPI2_SCSI_TASK_MANAGE_REPLY)) {
1179 1179 reply_size = sizeof (MPI2_SCSI_TASK_MANAGE_REPLY);
1180 1180 }
1181 1181 mutex_exit(&mpt->m_mutex);
1182 1182 for (i = 0; i < reply_size; i++) {
1183 1183 if (ddi_copyout((uint8_t *)reply_msg + i, reply + i, 1,
1184 1184 mode)) {
1185 1185 mptsas_log(mpt, CE_WARN, "failed to copy out "
1186 1186 "reply data for TM request");
1187 1187 break;
1188 1188 }
1189 1189 }
1190 1190 mutex_enter(&mpt->m_mutex);
1191 1191 }
1192 1192
1193 1193 /*
1194 1194 * clear the TM slot before returning
1195 1195 */
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1195 lines elided |
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1196 1196 slots->m_slot[MPTSAS_TM_SLOT(mpt)] = NULL;
1197 1197
1198 1198 /*
1199 1199 * If we lost our task management command
1200 1200 * we need to reset the ioc
1201 1201 */
1202 1202 if (rval == FALSE) {
1203 1203 mptsas_log(mpt, CE_WARN, "mptsas_ioc_task_management failed "
1204 1204 "try to reset ioc to recovery!");
1205 1205 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
1206 - if (mptsas_restart_ioc(mpt)) {
1206 + /* Let's try this instead of the old codepath commented below... */
1207 + ddi_taskq_dispatch(mpt->m_reset_taskq, mptsas_handle_restart_ioc, (void *)mpt, DDI_SLEEP);
1208 + mptsas_log(mpt,CE_WARN,"mptsas_restart_ioc dispatch attempted");
1209 + rval = FAILED;
1210 +/* if (mptsas_restart_ioc(mpt)) {
1207 1211 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
1208 1212 rval = FAILED;
1209 1213 }
1214 +*/
1210 1215 }
1211 1216
1212 1217 return (rval);
1213 1218 }
1214 1219
1215 1220 /*
1216 1221 * Complete firmware download frame for v2.0 cards.
1217 1222 */
1218 1223 static void
1219 1224 mptsas_uflash2(pMpi2FWDownloadRequest fwdownload,
1220 1225 ddi_acc_handle_t acc_hdl, uint32_t size, uint8_t type,
1221 1226 ddi_dma_cookie_t flsh_cookie)
1222 1227 {
1223 1228 pMpi2FWDownloadTCSGE_t tcsge;
1224 1229 pMpi2SGESimple64_t sge;
1225 1230 uint32_t flagslength;
1226 1231
1227 1232 ddi_put8(acc_hdl, &fwdownload->Function,
1228 1233 MPI2_FUNCTION_FW_DOWNLOAD);
1229 1234 ddi_put8(acc_hdl, &fwdownload->ImageType, type);
1230 1235 ddi_put8(acc_hdl, &fwdownload->MsgFlags,
1231 1236 MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT);
1232 1237 ddi_put32(acc_hdl, &fwdownload->TotalImageSize, size);
1233 1238
1234 1239 tcsge = (pMpi2FWDownloadTCSGE_t)&fwdownload->SGL;
1235 1240 ddi_put8(acc_hdl, &tcsge->ContextSize, 0);
1236 1241 ddi_put8(acc_hdl, &tcsge->DetailsLength, 12);
1237 1242 ddi_put8(acc_hdl, &tcsge->Flags, 0);
1238 1243 ddi_put32(acc_hdl, &tcsge->ImageOffset, 0);
1239 1244 ddi_put32(acc_hdl, &tcsge->ImageSize, size);
1240 1245
1241 1246 sge = (pMpi2SGESimple64_t)(tcsge + 1);
1242 1247 flagslength = size;
1243 1248 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
1244 1249 MPI2_SGE_FLAGS_END_OF_BUFFER |
1245 1250 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1246 1251 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
1247 1252 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1248 1253 MPI2_SGE_FLAGS_HOST_TO_IOC |
1249 1254 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
1250 1255 ddi_put32(acc_hdl, &sge->FlagsLength, flagslength);
1251 1256 ddi_put32(acc_hdl, &sge->Address.Low,
1252 1257 flsh_cookie.dmac_address);
1253 1258 ddi_put32(acc_hdl, &sge->Address.High,
1254 1259 (uint32_t)(flsh_cookie.dmac_laddress >> 32));
1255 1260 }
1256 1261
1257 1262 /*
1258 1263 * Complete firmware download frame for v2.5 cards.
1259 1264 */
1260 1265 static void
1261 1266 mptsas_uflash25(pMpi25FWDownloadRequest fwdownload,
1262 1267 ddi_acc_handle_t acc_hdl, uint32_t size, uint8_t type,
1263 1268 ddi_dma_cookie_t flsh_cookie)
1264 1269 {
1265 1270 pMpi2IeeeSgeSimple64_t sge;
1266 1271 uint8_t flags;
1267 1272
1268 1273 ddi_put8(acc_hdl, &fwdownload->Function,
1269 1274 MPI2_FUNCTION_FW_DOWNLOAD);
1270 1275 ddi_put8(acc_hdl, &fwdownload->ImageType, type);
1271 1276 ddi_put8(acc_hdl, &fwdownload->MsgFlags,
1272 1277 MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT);
1273 1278 ddi_put32(acc_hdl, &fwdownload->TotalImageSize, size);
1274 1279
1275 1280 ddi_put32(acc_hdl, &fwdownload->ImageOffset, 0);
1276 1281 ddi_put32(acc_hdl, &fwdownload->ImageSize, size);
1277 1282
1278 1283 sge = (pMpi2IeeeSgeSimple64_t)&fwdownload->SGL;
1279 1284 flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1280 1285 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
1281 1286 MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1282 1287 ddi_put8(acc_hdl, &sge->Flags, flags);
1283 1288 ddi_put32(acc_hdl, &sge->Length, size);
1284 1289 ddi_put32(acc_hdl, &sge->Address.Low,
1285 1290 flsh_cookie.dmac_address);
1286 1291 ddi_put32(acc_hdl, &sge->Address.High,
1287 1292 (uint32_t)(flsh_cookie.dmac_laddress >> 32));
1288 1293 }
1289 1294
1290 1295 static int mptsas_enable_mpi25_flashupdate = 0;
1291 1296
1292 1297 int
1293 1298 mptsas_update_flash(mptsas_t *mpt, caddr_t ptrbuffer, uint32_t size,
1294 1299 uint8_t type, int mode)
1295 1300 {
1296 1301
1297 1302 /*
1298 1303 * In order to avoid allocating variables on the stack,
1299 1304 * we make use of the pre-existing mptsas_cmd_t and
1300 1305 * scsi_pkt which are included in the mptsas_t which
1301 1306 * is passed to this routine.
1302 1307 */
1303 1308
1304 1309 ddi_dma_attr_t flsh_dma_attrs;
1305 1310 ddi_dma_cookie_t flsh_cookie;
1306 1311 ddi_dma_handle_t flsh_dma_handle;
1307 1312 ddi_acc_handle_t flsh_accessp;
1308 1313 caddr_t memp, flsh_memp;
1309 1314 mptsas_cmd_t *cmd;
1310 1315 struct scsi_pkt *pkt;
1311 1316 int i;
1312 1317 int rvalue = 0;
1313 1318 uint64_t request_desc;
1314 1319
1315 1320 if (mpt->m_MPI25 && !mptsas_enable_mpi25_flashupdate) {
1316 1321 /*
1317 1322 * The code is there but not tested yet.
1318 1323 * User has to know there are risks here.
1319 1324 */
1320 1325 mptsas_log(mpt, CE_WARN, "mptsas_update_flash(): "
1321 1326 "Updating firmware through MPI 2.5 has not been "
1322 1327 "tested yet!\n"
1323 1328 "To enable set mptsas_enable_mpi25_flashupdate to 1\n");
1324 1329 return (-1);
1325 1330 } /* Otherwise, you pay your money and you take your chances. */
1326 1331
1327 1332 if ((rvalue = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) {
1328 1333 mptsas_log(mpt, CE_WARN, "mptsas_update_flash(): allocation "
1329 1334 "failed. event ack command pool is full\n");
1330 1335 return (rvalue);
1331 1336 }
1332 1337
1333 1338 bzero((caddr_t)cmd, sizeof (*cmd));
1334 1339 bzero((caddr_t)pkt, scsi_pkt_size());
1335 1340 cmd->ioc_cmd_slot = (uint32_t)rvalue;
1336 1341
1337 1342 /*
1338 1343 * dynamically create a customized dma attribute structure
1339 1344 * that describes the flash file.
1340 1345 */
1341 1346 flsh_dma_attrs = mpt->m_msg_dma_attr;
1342 1347 flsh_dma_attrs.dma_attr_sgllen = 1;
1343 1348
1344 1349 if (mptsas_dma_addr_create(mpt, flsh_dma_attrs, &flsh_dma_handle,
1345 1350 &flsh_accessp, &flsh_memp, size, &flsh_cookie) == FALSE) {
1346 1351 mptsas_log(mpt, CE_WARN,
1347 1352 "(unable to allocate dma resource.");
1348 1353 mptsas_return_to_pool(mpt, cmd);
1349 1354 return (-1);
1350 1355 }
1351 1356
1352 1357 bzero(flsh_memp, size);
1353 1358
1354 1359 for (i = 0; i < size; i++) {
1355 1360 (void) ddi_copyin(ptrbuffer + i, flsh_memp + i, 1, mode);
1356 1361 }
1357 1362 (void) ddi_dma_sync(flsh_dma_handle, 0, 0, DDI_DMA_SYNC_FORDEV);
1358 1363
1359 1364 /*
1360 1365 * form a cmd/pkt to store the fw download message
1361 1366 */
1362 1367 pkt->pkt_cdbp = (opaque_t)&cmd->cmd_cdb[0];
1363 1368 pkt->pkt_scbp = (opaque_t)&cmd->cmd_scb;
1364 1369 pkt->pkt_ha_private = (opaque_t)cmd;
1365 1370 pkt->pkt_flags = FLAG_HEAD;
1366 1371 pkt->pkt_time = 60;
1367 1372 cmd->cmd_pkt = pkt;
1368 1373 cmd->cmd_scblen = 1;
1369 1374 cmd->cmd_flags = CFLAG_CMDIOC | CFLAG_FW_CMD;
1370 1375
1371 1376 /*
1372 1377 * Save the command in a slot
1373 1378 */
1374 1379 if (mptsas_save_cmd(mpt, cmd) == FALSE) {
1375 1380 mptsas_dma_addr_destroy(&flsh_dma_handle, &flsh_accessp);
1376 1381 mptsas_return_to_pool(mpt, cmd);
1377 1382 return (-1);
1378 1383 }
1379 1384
1380 1385 /*
1381 1386 * Fill in fw download message
1382 1387 */
1383 1388 ASSERT(cmd->cmd_slot != 0);
1384 1389 memp = mpt->m_req_frame + (mpt->m_req_frame_size * cmd->cmd_slot);
1385 1390 bzero(memp, mpt->m_req_frame_size);
1386 1391
1387 1392 if (mpt->m_MPI25)
1388 1393 mptsas_uflash25((pMpi25FWDownloadRequest)memp,
1389 1394 mpt->m_acc_req_frame_hdl, size, type, flsh_cookie);
1390 1395 else
1391 1396 mptsas_uflash2((pMpi2FWDownloadRequest)memp,
1392 1397 mpt->m_acc_req_frame_hdl, size, type, flsh_cookie);
1393 1398
1394 1399 /*
1395 1400 * Start command
1396 1401 */
1397 1402 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
1398 1403 DDI_DMA_SYNC_FORDEV);
1399 1404 request_desc = (cmd->cmd_slot << 16) +
1400 1405 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1401 1406 cmd->cmd_rfm = NULL;
1402 1407 MPTSAS_START_CMD(mpt, request_desc);
1403 1408
1404 1409 rvalue = 0;
1405 1410 (void) cv_reltimedwait(&mpt->m_fw_cv, &mpt->m_mutex,
1406 1411 drv_usectohz(60 * MICROSEC), TR_CLOCK_TICK);
1407 1412 if (!(cmd->cmd_flags & CFLAG_FINISHED)) {
1408 1413 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
1409 1414 if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) {
1410 1415 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
1411 1416 }
1412 1417 rvalue = -1;
1413 1418 }
1414 1419 mptsas_remove_cmd(mpt, cmd);
1415 1420 mptsas_dma_addr_destroy(&flsh_dma_handle, &flsh_accessp);
1416 1421
1417 1422 return (rvalue);
1418 1423 }
1419 1424
1420 1425 static int
1421 1426 mptsas_sasdevpage_0_cb(mptsas_t *mpt, caddr_t page_memp,
1422 1427 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1423 1428 va_list ap)
1424 1429 {
1425 1430 #ifndef __lock_lint
1426 1431 _NOTE(ARGUNUSED(ap))
1427 1432 #endif
1428 1433 pMpi2SasDevicePage0_t sasdevpage;
1429 1434 int rval = DDI_SUCCESS, i;
1430 1435 uint8_t *sas_addr = NULL;
1431 1436 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE];
1432 1437 uint16_t *devhdl, *bay_num, *enclosure;
1433 1438 uint64_t *sas_wwn;
1434 1439 uint32_t *dev_info;
1435 1440 uint8_t *physport, *phynum;
1436 1441 uint16_t *pdevhdl, *io_flags;
1437 1442 uint32_t page_address;
1438 1443
1439 1444 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
1440 1445 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
1441 1446 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_device_page0 "
1442 1447 "header: IOCStatus=0x%x, IOCLogInfo=0x%x",
1443 1448 iocstatus, iocloginfo);
1444 1449 rval = DDI_FAILURE;
1445 1450 return (rval);
1446 1451 }
1447 1452 page_address = va_arg(ap, uint32_t);
1448 1453 /*
1449 1454 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
1450 1455 * are no more pages. If everything is OK up to this point but the
1451 1456 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
1452 1457 * signal that device traversal is complete.
1453 1458 */
1454 1459 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
1455 1460 if ((page_address & MPI2_SAS_DEVICE_PGAD_FORM_MASK) ==
1456 1461 MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE) {
1457 1462 mpt->m_done_traverse_dev = 1;
1458 1463 }
1459 1464 rval = DDI_FAILURE;
1460 1465 return (rval);
1461 1466 }
1462 1467 devhdl = va_arg(ap, uint16_t *);
1463 1468 sas_wwn = va_arg(ap, uint64_t *);
1464 1469 dev_info = va_arg(ap, uint32_t *);
1465 1470 physport = va_arg(ap, uint8_t *);
1466 1471 phynum = va_arg(ap, uint8_t *);
1467 1472 pdevhdl = va_arg(ap, uint16_t *);
1468 1473 bay_num = va_arg(ap, uint16_t *);
1469 1474 enclosure = va_arg(ap, uint16_t *);
1470 1475 io_flags = va_arg(ap, uint16_t *);
1471 1476
1472 1477 sasdevpage = (pMpi2SasDevicePage0_t)page_memp;
1473 1478
1474 1479 *dev_info = ddi_get32(accessp, &sasdevpage->DeviceInfo);
1475 1480 *devhdl = ddi_get16(accessp, &sasdevpage->DevHandle);
1476 1481 sas_addr = (uint8_t *)(&sasdevpage->SASAddress);
1477 1482 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) {
1478 1483 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i);
1479 1484 }
1480 1485 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE);
1481 1486 *sas_wwn = LE_64(*sas_wwn);
1482 1487 *physport = ddi_get8(accessp, &sasdevpage->PhysicalPort);
1483 1488 *phynum = ddi_get8(accessp, &sasdevpage->PhyNum);
1484 1489 *pdevhdl = ddi_get16(accessp, &sasdevpage->ParentDevHandle);
1485 1490 *bay_num = ddi_get16(accessp, &sasdevpage->Slot);
1486 1491 *enclosure = ddi_get16(accessp, &sasdevpage->EnclosureHandle);
1487 1492 *io_flags = ddi_get16(accessp, &sasdevpage->Flags);
1488 1493
1489 1494 if (*io_flags & MPI25_SAS_DEVICE0_FLAGS_FAST_PATH_CAPABLE) {
1490 1495 /*
1491 1496 * Leave a messages about FP cabability in the log.
1492 1497 */
1493 1498 mptsas_log(mpt, CE_CONT,
1494 1499 "!w%016"PRIx64" FastPath Capable%s", *sas_wwn,
1495 1500 (*io_flags &
1496 1501 MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH)?
1497 1502 " and Enabled":" but Disabled");
1498 1503 }
1499 1504
1500 1505 return (rval);
1501 1506 }
1502 1507
1503 1508 /*
1504 1509 * Request MPI configuration page SAS device page 0 to get DevHandle, device
1505 1510 * info and SAS address.
1506 1511 */
1507 1512 int
1508 1513 mptsas_get_sas_device_page0(mptsas_t *mpt, uint32_t page_address,
1509 1514 uint16_t *dev_handle, uint64_t *sas_wwn, uint32_t *dev_info,
1510 1515 uint8_t *physport, uint8_t *phynum, uint16_t *pdev_handle,
1511 1516 uint16_t *bay_num, uint16_t *enclosure, uint16_t *io_flags)
1512 1517 {
1513 1518 int rval = DDI_SUCCESS;
1514 1519
1515 1520 ASSERT(mutex_owned(&mpt->m_mutex));
1516 1521
1517 1522 /*
1518 1523 * Get the header and config page. reply contains the reply frame,
1519 1524 * which holds status info for the request.
1520 1525 */
1521 1526 rval = mptsas_access_config_page(mpt,
1522 1527 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1523 1528 MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE, 0, page_address,
1524 1529 mptsas_sasdevpage_0_cb, page_address, dev_handle, sas_wwn,
1525 1530 dev_info, physport, phynum, pdev_handle,
1526 1531 bay_num, enclosure, io_flags);
1527 1532
1528 1533 return (rval);
1529 1534 }
1530 1535
1531 1536 static int
1532 1537 mptsas_sasexpdpage_0_cb(mptsas_t *mpt, caddr_t page_memp,
1533 1538 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1534 1539 va_list ap)
1535 1540 {
1536 1541 #ifndef __lock_lint
1537 1542 _NOTE(ARGUNUSED(ap))
1538 1543 #endif
1539 1544 pMpi2ExpanderPage0_t expddevpage;
1540 1545 int rval = DDI_SUCCESS, i;
1541 1546 uint8_t *sas_addr = NULL;
1542 1547 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE];
1543 1548 uint16_t *devhdl;
1544 1549 uint64_t *sas_wwn;
1545 1550 uint8_t physport;
1546 1551 mptsas_phymask_t *phymask;
1547 1552 uint16_t *pdevhdl;
1548 1553 uint32_t page_address;
1549 1554
1550 1555 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
1551 1556 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
1552 1557 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page0 "
1553 1558 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1554 1559 iocstatus, iocloginfo);
1555 1560 rval = DDI_FAILURE;
1556 1561 return (rval);
1557 1562 }
1558 1563 page_address = va_arg(ap, uint32_t);
1559 1564 /*
1560 1565 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
1561 1566 * are no more pages. If everything is OK up to this point but the
1562 1567 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
1563 1568 * signal that device traversal is complete.
1564 1569 */
1565 1570 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
1566 1571 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) ==
1567 1572 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) {
1568 1573 mpt->m_done_traverse_smp = 1;
1569 1574 }
1570 1575 rval = DDI_FAILURE;
1571 1576 return (rval);
1572 1577 }
1573 1578 devhdl = va_arg(ap, uint16_t *);
1574 1579 sas_wwn = va_arg(ap, uint64_t *);
1575 1580 phymask = va_arg(ap, mptsas_phymask_t *);
1576 1581 pdevhdl = va_arg(ap, uint16_t *);
1577 1582
1578 1583 expddevpage = (pMpi2ExpanderPage0_t)page_memp;
1579 1584
1580 1585 *devhdl = ddi_get16(accessp, &expddevpage->DevHandle);
1581 1586 physport = ddi_get8(accessp, &expddevpage->PhysicalPort);
1582 1587 *phymask = mptsas_physport_to_phymask(mpt, physport);
1583 1588 *pdevhdl = ddi_get16(accessp, &expddevpage->ParentDevHandle);
1584 1589 sas_addr = (uint8_t *)(&expddevpage->SASAddress);
1585 1590 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) {
1586 1591 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i);
1587 1592 }
1588 1593 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE);
1589 1594 *sas_wwn = LE_64(*sas_wwn);
1590 1595
1591 1596 return (rval);
1592 1597 }
1593 1598
1594 1599 /*
1595 1600 * Request MPI configuration page SAS device page 0 to get DevHandle, phymask
1596 1601 * and SAS address.
1597 1602 */
1598 1603 int
1599 1604 mptsas_get_sas_expander_page0(mptsas_t *mpt, uint32_t page_address,
1600 1605 mptsas_smp_t *info)
1601 1606 {
1602 1607 int rval = DDI_SUCCESS;
1603 1608
1604 1609 ASSERT(mutex_owned(&mpt->m_mutex));
1605 1610
1606 1611 /*
1607 1612 * Get the header and config page. reply contains the reply frame,
1608 1613 * which holds status info for the request.
1609 1614 */
1610 1615 rval = mptsas_access_config_page(mpt,
1611 1616 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1612 1617 MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER, 0, page_address,
1613 1618 mptsas_sasexpdpage_0_cb, page_address, &info->m_devhdl,
1614 1619 &info->m_addr.mta_wwn, &info->m_addr.mta_phymask, &info->m_pdevhdl);
1615 1620
1616 1621 return (rval);
1617 1622 }
1618 1623
1619 1624 static int
1620 1625 mptsas_sasportpage_0_cb(mptsas_t *mpt, caddr_t page_memp,
1621 1626 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1622 1627 va_list ap)
1623 1628 {
1624 1629 #ifndef __lock_lint
1625 1630 _NOTE(ARGUNUSED(ap))
1626 1631 #endif
1627 1632 int rval = DDI_SUCCESS, i;
1628 1633 uint8_t *sas_addr = NULL;
1629 1634 uint64_t *sas_wwn;
1630 1635 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE];
1631 1636 uint8_t *portwidth;
1632 1637 pMpi2SasPortPage0_t sasportpage;
1633 1638
1634 1639 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1635 1640 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_port_page0 "
1636 1641 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1637 1642 iocstatus, iocloginfo);
1638 1643 rval = DDI_FAILURE;
1639 1644 return (rval);
1640 1645 }
1641 1646 sas_wwn = va_arg(ap, uint64_t *);
1642 1647 portwidth = va_arg(ap, uint8_t *);
1643 1648
1644 1649 sasportpage = (pMpi2SasPortPage0_t)page_memp;
1645 1650 sas_addr = (uint8_t *)(&sasportpage->SASAddress);
1646 1651 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) {
1647 1652 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i);
1648 1653 }
1649 1654 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE);
1650 1655 *sas_wwn = LE_64(*sas_wwn);
1651 1656 *portwidth = ddi_get8(accessp, &sasportpage->PortWidth);
1652 1657 return (rval);
1653 1658 }
1654 1659
1655 1660 /*
1656 1661 * Request MPI configuration page SAS port page 0 to get initiator SAS address
1657 1662 * and port width.
1658 1663 */
1659 1664 int
1660 1665 mptsas_get_sas_port_page0(mptsas_t *mpt, uint32_t page_address,
1661 1666 uint64_t *sas_wwn, uint8_t *portwidth)
1662 1667 {
1663 1668 int rval = DDI_SUCCESS;
1664 1669
1665 1670 ASSERT(mutex_owned(&mpt->m_mutex));
1666 1671
1667 1672 /*
1668 1673 * Get the header and config page. reply contains the reply frame,
1669 1674 * which holds status info for the request.
1670 1675 */
1671 1676 rval = mptsas_access_config_page(mpt,
1672 1677 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1673 1678 MPI2_CONFIG_EXTPAGETYPE_SAS_PORT, 0, page_address,
1674 1679 mptsas_sasportpage_0_cb, sas_wwn, portwidth);
1675 1680
1676 1681 return (rval);
1677 1682 }
1678 1683
1679 1684 static int
1680 1685 mptsas_sasiou_page_0_cb(mptsas_t *mpt, caddr_t page_memp,
1681 1686 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1682 1687 va_list ap)
1683 1688 {
1684 1689 #ifndef __lock_lint
1685 1690 _NOTE(ARGUNUSED(ap))
1686 1691 #endif
1687 1692 int rval = DDI_SUCCESS;
1688 1693 pMpi2SasIOUnitPage0_t sasioupage0;
1689 1694 int i, num_phys;
1690 1695 uint32_t cpdi[MPTSAS_MAX_PHYS], *retrypage0, *readpage1;
1691 1696 uint8_t port_flags;
1692 1697
1693 1698 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1694 1699 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_io_unit_page0 "
1695 1700 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1696 1701 iocstatus, iocloginfo);
1697 1702 rval = DDI_FAILURE;
1698 1703 return (rval);
1699 1704 }
1700 1705 readpage1 = va_arg(ap, uint32_t *);
1701 1706 retrypage0 = va_arg(ap, uint32_t *);
1702 1707
1703 1708 sasioupage0 = (pMpi2SasIOUnitPage0_t)page_memp;
1704 1709
1705 1710 num_phys = ddi_get8(accessp, &sasioupage0->NumPhys);
1706 1711 /*
1707 1712 * ASSERT that the num_phys value in SAS IO Unit Page 0 is the same as
1708 1713 * was initially set. This should never change throughout the life of
1709 1714 * the driver.
1710 1715 */
1711 1716 ASSERT(num_phys == mpt->m_num_phys);
1712 1717 for (i = 0; i < num_phys; i++) {
1713 1718 cpdi[i] = ddi_get32(accessp,
1714 1719 &sasioupage0->PhyData[i].
1715 1720 ControllerPhyDeviceInfo);
1716 1721 port_flags = ddi_get8(accessp,
1717 1722 &sasioupage0->PhyData[i].PortFlags);
1718 1723 mpt->m_phy_info[i].port_num =
1719 1724 ddi_get8(accessp,
1720 1725 &sasioupage0->PhyData[i].Port);
1721 1726 mpt->m_phy_info[i].ctrl_devhdl =
1722 1727 ddi_get16(accessp, &sasioupage0->
1723 1728 PhyData[i].ControllerDevHandle);
1724 1729 mpt->m_phy_info[i].attached_devhdl =
1725 1730 ddi_get16(accessp, &sasioupage0->
1726 1731 PhyData[i].AttachedDevHandle);
1727 1732 mpt->m_phy_info[i].phy_device_type = cpdi[i];
1728 1733 mpt->m_phy_info[i].port_flags = port_flags;
1729 1734
1730 1735 if (port_flags & DISCOVERY_IN_PROGRESS) {
1731 1736 *retrypage0 = *retrypage0 + 1;
1732 1737 break;
1733 1738 } else {
1734 1739 *retrypage0 = 0;
1735 1740 }
1736 1741 if (!(port_flags & AUTO_PORT_CONFIGURATION)) {
1737 1742 /*
1738 1743 * some PHY configuration described in
1739 1744 * SAS IO Unit Page1
1740 1745 */
1741 1746 *readpage1 = 1;
1742 1747 }
1743 1748 }
1744 1749
1745 1750 return (rval);
1746 1751 }
1747 1752
1748 1753 static int
1749 1754 mptsas_sasiou_page_1_cb(mptsas_t *mpt, caddr_t page_memp,
1750 1755 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1751 1756 va_list ap)
1752 1757 {
1753 1758 #ifndef __lock_lint
1754 1759 _NOTE(ARGUNUSED(ap))
1755 1760 #endif
1756 1761 int rval = DDI_SUCCESS;
1757 1762 pMpi2SasIOUnitPage1_t sasioupage1;
1758 1763 int i, num_phys;
1759 1764 uint32_t cpdi[MPTSAS_MAX_PHYS];
1760 1765 uint8_t port_flags;
1761 1766
1762 1767 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1763 1768 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_io_unit_page1 "
1764 1769 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1765 1770 iocstatus, iocloginfo);
1766 1771 rval = DDI_FAILURE;
1767 1772 return (rval);
1768 1773 }
1769 1774
1770 1775 sasioupage1 = (pMpi2SasIOUnitPage1_t)page_memp;
1771 1776 num_phys = ddi_get8(accessp, &sasioupage1->NumPhys);
1772 1777 /*
1773 1778 * ASSERT that the num_phys value in SAS IO Unit Page 1 is the same as
1774 1779 * was initially set. This should never change throughout the life of
1775 1780 * the driver.
1776 1781 */
1777 1782 ASSERT(num_phys == mpt->m_num_phys);
1778 1783 for (i = 0; i < num_phys; i++) {
1779 1784 cpdi[i] = ddi_get32(accessp, &sasioupage1->PhyData[i].
1780 1785 ControllerPhyDeviceInfo);
1781 1786 port_flags = ddi_get8(accessp,
1782 1787 &sasioupage1->PhyData[i].PortFlags);
1783 1788 mpt->m_phy_info[i].port_num =
1784 1789 ddi_get8(accessp,
1785 1790 &sasioupage1->PhyData[i].Port);
1786 1791 mpt->m_phy_info[i].port_flags = port_flags;
1787 1792 mpt->m_phy_info[i].phy_device_type = cpdi[i];
1788 1793 }
1789 1794 return (rval);
1790 1795 }
1791 1796
1792 1797 /*
1793 1798 * Read IO unit page 0 to get information for each PHY. If needed, Read IO Unit
1794 1799 * page1 to update the PHY information. This is the message passing method of
1795 1800 * this function which should be called except during initialization.
1796 1801 */
1797 1802 int
1798 1803 mptsas_get_sas_io_unit_page(mptsas_t *mpt)
1799 1804 {
1800 1805 int rval = DDI_SUCCESS, state;
1801 1806 uint32_t readpage1 = 0, retrypage0 = 0;
1802 1807
1803 1808 ASSERT(mutex_owned(&mpt->m_mutex));
1804 1809
1805 1810 /*
1806 1811 * Now we cycle through the state machine. Here's what happens:
1807 1812 * 1. Read IO unit page 0 and set phy information
1808 1813 * 2. See if Read IO unit page1 is needed because of port configuration
1809 1814 * 3. Read IO unit page 1 and update phy information.
1810 1815 */
1811 1816 state = IOUC_READ_PAGE0;
1812 1817 while (state != IOUC_DONE) {
1813 1818 if (state == IOUC_READ_PAGE0) {
1814 1819 rval = mptsas_access_config_page(mpt,
1815 1820 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1816 1821 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 0, 0,
1817 1822 mptsas_sasiou_page_0_cb, &readpage1,
1818 1823 &retrypage0);
1819 1824 } else if (state == IOUC_READ_PAGE1) {
1820 1825 rval = mptsas_access_config_page(mpt,
1821 1826 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1822 1827 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 1, 0,
1823 1828 mptsas_sasiou_page_1_cb);
1824 1829 }
1825 1830
1826 1831 if (rval == DDI_SUCCESS) {
1827 1832 switch (state) {
1828 1833 case IOUC_READ_PAGE0:
1829 1834 /*
1830 1835 * retry 30 times if discovery is in process
1831 1836 */
1832 1837 if (retrypage0 && (retrypage0 < 30)) {
1833 1838 drv_usecwait(1000 * 100);
1834 1839 state = IOUC_READ_PAGE0;
1835 1840 break;
1836 1841 } else if (retrypage0 == 30) {
1837 1842 mptsas_log(mpt, CE_WARN,
1838 1843 "!Discovery in progress, can't "
1839 1844 "verify IO unit config, then "
1840 1845 "after 30 times retry, give "
1841 1846 "up!");
1842 1847 state = IOUC_DONE;
1843 1848 rval = DDI_FAILURE;
1844 1849 break;
1845 1850 }
1846 1851
1847 1852 if (readpage1 == 0) {
1848 1853 state = IOUC_DONE;
1849 1854 rval = DDI_SUCCESS;
1850 1855 break;
1851 1856 }
1852 1857
1853 1858 state = IOUC_READ_PAGE1;
1854 1859 break;
1855 1860
1856 1861 case IOUC_READ_PAGE1:
1857 1862 state = IOUC_DONE;
1858 1863 rval = DDI_SUCCESS;
1859 1864 break;
1860 1865 }
1861 1866 } else {
1862 1867 return (rval);
1863 1868 }
1864 1869 }
1865 1870
1866 1871 return (rval);
1867 1872 }
1868 1873
1869 1874 static int
1870 1875 mptsas_biospage_3_cb(mptsas_t *mpt, caddr_t page_memp,
1871 1876 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1872 1877 va_list ap)
1873 1878 {
1874 1879 #ifndef __lock_lint
1875 1880 _NOTE(ARGUNUSED(ap))
1876 1881 #endif
1877 1882 pMpi2BiosPage3_t sasbiospage;
1878 1883 int rval = DDI_SUCCESS;
1879 1884 uint32_t *bios_version;
1880 1885
1881 1886 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
1882 1887 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
1883 1888 mptsas_log(mpt, CE_WARN, "mptsas_get_bios_page3 header: "
1884 1889 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus, iocloginfo);
1885 1890 rval = DDI_FAILURE;
1886 1891 return (rval);
1887 1892 }
1888 1893 bios_version = va_arg(ap, uint32_t *);
1889 1894 sasbiospage = (pMpi2BiosPage3_t)page_memp;
1890 1895 *bios_version = ddi_get32(accessp, &sasbiospage->BiosVersion);
1891 1896
1892 1897 return (rval);
1893 1898 }
1894 1899
1895 1900 /*
1896 1901 * Request MPI configuration page BIOS page 3 to get BIOS version. Since all
1897 1902 * other information in this page is not needed, just ignore it.
1898 1903 */
1899 1904 int
1900 1905 mptsas_get_bios_page3(mptsas_t *mpt, uint32_t *bios_version)
1901 1906 {
1902 1907 int rval = DDI_SUCCESS;
1903 1908
1904 1909 ASSERT(mutex_owned(&mpt->m_mutex));
1905 1910
1906 1911 /*
1907 1912 * Get the header and config page. reply contains the reply frame,
1908 1913 * which holds status info for the request.
1909 1914 */
1910 1915 rval = mptsas_access_config_page(mpt,
1911 1916 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, MPI2_CONFIG_PAGETYPE_BIOS, 3,
1912 1917 0, mptsas_biospage_3_cb, bios_version);
1913 1918
1914 1919 return (rval);
1915 1920 }
1916 1921
1917 1922 /*
1918 1923 * Read IO unit page 0 to get information for each PHY. If needed, Read IO Unit
1919 1924 * page1 to update the PHY information. This is the handshaking version of
1920 1925 * this function, which should be called during initialization only.
1921 1926 */
1922 1927 int
1923 1928 mptsas_get_sas_io_unit_page_hndshk(mptsas_t *mpt)
1924 1929 {
1925 1930 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs;
1926 1931 ddi_dma_cookie_t page_cookie;
1927 1932 ddi_dma_handle_t recv_dma_handle, page_dma_handle;
1928 1933 ddi_acc_handle_t recv_accessp, page_accessp;
1929 1934 pMpi2ConfigReply_t configreply;
1930 1935 pMpi2SasIOUnitPage0_t sasioupage0;
1931 1936 pMpi2SasIOUnitPage1_t sasioupage1;
1932 1937 int recv_numbytes;
1933 1938 caddr_t recv_memp, page_memp;
1934 1939 int i, num_phys, start_phy = 0;
1935 1940 int page0_size =
1936 1941 sizeof (MPI2_CONFIG_PAGE_SASIOUNIT_0) +
1937 1942 (sizeof (MPI2_SAS_IO_UNIT0_PHY_DATA) * (MPTSAS_MAX_PHYS - 1));
1938 1943 int page1_size =
1939 1944 sizeof (MPI2_CONFIG_PAGE_SASIOUNIT_1) +
1940 1945 (sizeof (MPI2_SAS_IO_UNIT1_PHY_DATA) * (MPTSAS_MAX_PHYS - 1));
1941 1946 uint32_t flags_length;
1942 1947 uint32_t cpdi[MPTSAS_MAX_PHYS];
1943 1948 uint32_t readpage1 = 0, retrypage0 = 0;
1944 1949 uint16_t iocstatus;
1945 1950 uint8_t port_flags, page_number, action;
1946 1951 uint32_t reply_size = 256; /* Big enough for any page */
1947 1952 uint_t state;
1948 1953 int rval = DDI_FAILURE;
1949 1954 boolean_t free_recv = B_FALSE, free_page = B_FALSE;
1950 1955
1951 1956 /*
1952 1957 * Initialize our "state machine". This is a bit convoluted,
1953 1958 * but it keeps us from having to do the ddi allocations numerous
1954 1959 * times.
1955 1960 */
1956 1961
1957 1962 NDBG20(("mptsas_get_sas_io_unit_page_hndshk enter"));
1958 1963 ASSERT(mutex_owned(&mpt->m_mutex));
1959 1964 state = IOUC_READ_PAGE0;
1960 1965
1961 1966 /*
1962 1967 * dynamically create a customized dma attribute structure
1963 1968 * that describes mpt's config reply page request structure.
1964 1969 */
1965 1970 recv_dma_attrs = mpt->m_msg_dma_attr;
1966 1971 recv_dma_attrs.dma_attr_sgllen = 1;
1967 1972 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY));
1968 1973
1969 1974 if (mptsas_dma_addr_create(mpt, recv_dma_attrs,
1970 1975 &recv_dma_handle, &recv_accessp, &recv_memp,
1971 1976 (sizeof (MPI2_CONFIG_REPLY)), NULL) == FALSE) {
1972 1977 mptsas_log(mpt, CE_WARN,
1973 1978 "mptsas_get_sas_io_unit_page_hndshk: recv dma failed");
1974 1979 goto cleanup;
1975 1980 }
1976 1981 /* Now safe to call mptsas_dma_addr_destroy(recv_dma_handle). */
1977 1982 free_recv = B_TRUE;
1978 1983
1979 1984 page_dma_attrs = mpt->m_msg_dma_attr;
1980 1985 page_dma_attrs.dma_attr_sgllen = 1;
1981 1986 page_dma_attrs.dma_attr_granular = reply_size;
1982 1987
1983 1988 if (mptsas_dma_addr_create(mpt, page_dma_attrs,
1984 1989 &page_dma_handle, &page_accessp, &page_memp,
1985 1990 reply_size, &page_cookie) == FALSE) {
1986 1991 mptsas_log(mpt, CE_WARN,
1987 1992 "mptsas_get_sas_io_unit_page_hndshk: page dma failed");
1988 1993 goto cleanup;
1989 1994 }
1990 1995 /* Now safe to call mptsas_dma_addr_destroy(page_dma_handle). */
1991 1996 free_page = B_TRUE;
1992 1997
1993 1998 /*
1994 1999 * Now we cycle through the state machine. Here's what happens:
1995 2000 * 1. Read IO unit page 0 and set phy information
1996 2001 * 2. See if Read IO unit page1 is needed because of port configuration
1997 2002 * 3. Read IO unit page 1 and update phy information.
1998 2003 */
1999 2004
2000 2005 sasioupage0 = (pMpi2SasIOUnitPage0_t)page_memp;
2001 2006 sasioupage1 = (pMpi2SasIOUnitPage1_t)page_memp;
2002 2007
2003 2008 while (state != IOUC_DONE) {
2004 2009 switch (state) {
2005 2010 case IOUC_READ_PAGE0:
2006 2011 page_number = 0;
2007 2012 action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
2008 2013 flags_length = (uint32_t)page0_size;
2009 2014 flags_length |= ((uint32_t)(
2010 2015 MPI2_SGE_FLAGS_LAST_ELEMENT |
2011 2016 MPI2_SGE_FLAGS_END_OF_BUFFER |
2012 2017 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2013 2018 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
2014 2019 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2015 2020 MPI2_SGE_FLAGS_IOC_TO_HOST |
2016 2021 MPI2_SGE_FLAGS_END_OF_LIST) <<
2017 2022 MPI2_SGE_FLAGS_SHIFT);
2018 2023
2019 2024 break;
2020 2025
2021 2026 case IOUC_READ_PAGE1:
2022 2027 page_number = 1;
2023 2028 action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
2024 2029 flags_length = (uint32_t)page1_size;
2025 2030 flags_length |= ((uint32_t)(
2026 2031 MPI2_SGE_FLAGS_LAST_ELEMENT |
2027 2032 MPI2_SGE_FLAGS_END_OF_BUFFER |
2028 2033 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2029 2034 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
2030 2035 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2031 2036 MPI2_SGE_FLAGS_IOC_TO_HOST |
2032 2037 MPI2_SGE_FLAGS_END_OF_LIST) <<
2033 2038 MPI2_SGE_FLAGS_SHIFT);
2034 2039
2035 2040 break;
2036 2041 default:
2037 2042 break;
2038 2043 }
2039 2044
2040 2045 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY));
2041 2046 configreply = (pMpi2ConfigReply_t)recv_memp;
2042 2047 recv_numbytes = sizeof (MPI2_CONFIG_REPLY);
2043 2048
2044 2049 if (mptsas_send_extended_config_request_msg(mpt,
2045 2050 MPI2_CONFIG_ACTION_PAGE_HEADER,
2046 2051 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT,
2047 2052 0, page_number, 0, 0, 0, 0)) {
2048 2053 goto cleanup;
2049 2054 }
2050 2055
2051 2056 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2052 2057 recv_accessp)) {
2053 2058 goto cleanup;
2054 2059 }
2055 2060
2056 2061 iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus);
2057 2062 iocstatus = MPTSAS_IOCSTATUS(iocstatus);
2058 2063
2059 2064 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
2060 2065 mptsas_log(mpt, CE_WARN,
2061 2066 "mptsas_get_sas_io_unit_page_hndshk: read page "
2062 2067 "header iocstatus = 0x%x", iocstatus);
2063 2068 goto cleanup;
2064 2069 }
2065 2070
2066 2071 if (action != MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) {
2067 2072 bzero(page_memp, reply_size);
2068 2073 }
2069 2074
2070 2075 if (mptsas_send_extended_config_request_msg(mpt, action,
2071 2076 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 0, page_number,
2072 2077 ddi_get8(recv_accessp, &configreply->Header.PageVersion),
2073 2078 ddi_get16(recv_accessp, &configreply->ExtPageLength),
2074 2079 flags_length, page_cookie.dmac_laddress)) {
2075 2080 goto cleanup;
2076 2081 }
2077 2082
2078 2083 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2079 2084 recv_accessp)) {
2080 2085 goto cleanup;
2081 2086 }
2082 2087
2083 2088 iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus);
2084 2089 iocstatus = MPTSAS_IOCSTATUS(iocstatus);
2085 2090
2086 2091 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
2087 2092 mptsas_log(mpt, CE_WARN,
2088 2093 "mptsas_get_sas_io_unit_page_hndshk: IO unit "
2089 2094 "config failed for action %d, iocstatus = 0x%x",
2090 2095 action, iocstatus);
2091 2096 goto cleanup;
2092 2097 }
2093 2098
2094 2099 switch (state) {
2095 2100 case IOUC_READ_PAGE0:
2096 2101 if ((ddi_dma_sync(page_dma_handle, 0, 0,
2097 2102 DDI_DMA_SYNC_FORCPU)) != DDI_SUCCESS) {
2098 2103 goto cleanup;
2099 2104 }
2100 2105
2101 2106 num_phys = ddi_get8(page_accessp,
2102 2107 &sasioupage0->NumPhys);
2103 2108 ASSERT(num_phys == mpt->m_num_phys);
2104 2109 if (num_phys > MPTSAS_MAX_PHYS) {
2105 2110 mptsas_log(mpt, CE_WARN, "Number of phys "
2106 2111 "supported by HBA (%d) is more than max "
2107 2112 "supported by driver (%d). Driver will "
2108 2113 "not attach.", num_phys,
2109 2114 MPTSAS_MAX_PHYS);
2110 2115 rval = DDI_FAILURE;
2111 2116 goto cleanup;
2112 2117 }
2113 2118 for (i = start_phy; i < num_phys; i++, start_phy = i) {
2114 2119 cpdi[i] = ddi_get32(page_accessp,
2115 2120 &sasioupage0->PhyData[i].
2116 2121 ControllerPhyDeviceInfo);
2117 2122 port_flags = ddi_get8(page_accessp,
2118 2123 &sasioupage0->PhyData[i].PortFlags);
2119 2124
2120 2125 mpt->m_phy_info[i].port_num =
2121 2126 ddi_get8(page_accessp,
2122 2127 &sasioupage0->PhyData[i].Port);
2123 2128 mpt->m_phy_info[i].ctrl_devhdl =
2124 2129 ddi_get16(page_accessp, &sasioupage0->
2125 2130 PhyData[i].ControllerDevHandle);
2126 2131 mpt->m_phy_info[i].attached_devhdl =
2127 2132 ddi_get16(page_accessp, &sasioupage0->
2128 2133 PhyData[i].AttachedDevHandle);
2129 2134 mpt->m_phy_info[i].phy_device_type = cpdi[i];
2130 2135 mpt->m_phy_info[i].port_flags = port_flags;
2131 2136
2132 2137 if (port_flags & DISCOVERY_IN_PROGRESS) {
2133 2138 retrypage0++;
2134 2139 NDBG20(("Discovery in progress, can't "
2135 2140 "verify IO unit config, then NO.%d"
2136 2141 " times retry", retrypage0));
2137 2142 break;
2138 2143 } else {
2139 2144 retrypage0 = 0;
2140 2145 }
2141 2146 if (!(port_flags & AUTO_PORT_CONFIGURATION)) {
2142 2147 /*
2143 2148 * some PHY configuration described in
2144 2149 * SAS IO Unit Page1
2145 2150 */
2146 2151 readpage1 = 1;
2147 2152 }
2148 2153 }
2149 2154
2150 2155 /*
2151 2156 * retry 30 times if discovery is in process
2152 2157 */
2153 2158 if (retrypage0 && (retrypage0 < 30)) {
2154 2159 drv_usecwait(1000 * 100);
2155 2160 state = IOUC_READ_PAGE0;
2156 2161 break;
2157 2162 } else if (retrypage0 == 30) {
2158 2163 mptsas_log(mpt, CE_WARN,
2159 2164 "!Discovery in progress, can't "
2160 2165 "verify IO unit config, then after"
2161 2166 " 30 times retry, give up!");
2162 2167 state = IOUC_DONE;
2163 2168 rval = DDI_FAILURE;
2164 2169 break;
2165 2170 }
2166 2171
2167 2172 if (readpage1 == 0) {
2168 2173 state = IOUC_DONE;
2169 2174 rval = DDI_SUCCESS;
2170 2175 break;
2171 2176 }
2172 2177
2173 2178 state = IOUC_READ_PAGE1;
2174 2179 break;
2175 2180
2176 2181 case IOUC_READ_PAGE1:
2177 2182 if ((ddi_dma_sync(page_dma_handle, 0, 0,
2178 2183 DDI_DMA_SYNC_FORCPU)) != DDI_SUCCESS) {
2179 2184 goto cleanup;
2180 2185 }
2181 2186
2182 2187 num_phys = ddi_get8(page_accessp,
2183 2188 &sasioupage1->NumPhys);
2184 2189 ASSERT(num_phys == mpt->m_num_phys);
2185 2190 if (num_phys > MPTSAS_MAX_PHYS) {
2186 2191 mptsas_log(mpt, CE_WARN, "Number of phys "
2187 2192 "supported by HBA (%d) is more than max "
2188 2193 "supported by driver (%d). Driver will "
2189 2194 "not attach.", num_phys,
2190 2195 MPTSAS_MAX_PHYS);
2191 2196 rval = DDI_FAILURE;
2192 2197 goto cleanup;
2193 2198 }
2194 2199 for (i = 0; i < num_phys; i++) {
2195 2200 cpdi[i] = ddi_get32(page_accessp,
2196 2201 &sasioupage1->PhyData[i].
2197 2202 ControllerPhyDeviceInfo);
2198 2203 port_flags = ddi_get8(page_accessp,
2199 2204 &sasioupage1->PhyData[i].PortFlags);
2200 2205 mpt->m_phy_info[i].port_num =
2201 2206 ddi_get8(page_accessp,
2202 2207 &sasioupage1->PhyData[i].Port);
2203 2208 mpt->m_phy_info[i].port_flags = port_flags;
2204 2209 mpt->m_phy_info[i].phy_device_type = cpdi[i];
2205 2210
2206 2211 }
2207 2212
2208 2213 state = IOUC_DONE;
2209 2214 rval = DDI_SUCCESS;
2210 2215 break;
2211 2216 }
2212 2217 }
2213 2218 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) ||
2214 2219 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) {
2215 2220 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2216 2221 rval = DDI_FAILURE;
2217 2222 goto cleanup;
2218 2223 }
2219 2224 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) ||
2220 2225 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) {
2221 2226 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2222 2227 rval = DDI_FAILURE;
2223 2228 goto cleanup;
2224 2229 }
2225 2230
2226 2231 cleanup:
2227 2232 if (free_recv)
2228 2233 mptsas_dma_addr_destroy(&recv_dma_handle, &recv_accessp);
2229 2234 if (free_page)
2230 2235 mptsas_dma_addr_destroy(&page_dma_handle, &page_accessp);
2231 2236 if (rval != DDI_SUCCESS) {
2232 2237 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
2233 2238 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
2234 2239 }
2235 2240 return (rval);
2236 2241 }
2237 2242
2238 2243 /*
2239 2244 * mptsas_get_manufacture_page5
2240 2245 *
2241 2246 * This function will retrieve the base WWID from the adapter. Since this
2242 2247 * function is only called during the initialization process, use handshaking.
2243 2248 */
2244 2249 int
2245 2250 mptsas_get_manufacture_page5(mptsas_t *mpt)
2246 2251 {
2247 2252 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs;
2248 2253 ddi_dma_cookie_t page_cookie;
2249 2254 ddi_dma_handle_t recv_dma_handle, page_dma_handle;
2250 2255 ddi_acc_handle_t recv_accessp, page_accessp;
2251 2256 pMpi2ConfigReply_t configreply;
2252 2257 caddr_t recv_memp, page_memp;
2253 2258 int recv_numbytes;
2254 2259 pMpi2ManufacturingPage5_t m5;
2255 2260 uint32_t flagslength;
2256 2261 int rval = DDI_SUCCESS;
2257 2262 uint_t iocstatus;
2258 2263 boolean_t free_recv = B_FALSE, free_page = B_FALSE;
2259 2264
2260 2265 MPTSAS_DISABLE_INTR(mpt);
2261 2266
2262 2267 if (mptsas_send_config_request_msg(mpt, MPI2_CONFIG_ACTION_PAGE_HEADER,
2263 2268 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 5, 0, 0, 0, 0)) {
2264 2269 rval = DDI_FAILURE;
2265 2270 goto done;
2266 2271 }
2267 2272
2268 2273 /*
2269 2274 * dynamically create a customized dma attribute structure
2270 2275 * that describes the MPT's config reply page request structure.
2271 2276 */
2272 2277 recv_dma_attrs = mpt->m_msg_dma_attr;
2273 2278 recv_dma_attrs.dma_attr_sgllen = 1;
2274 2279 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY));
2275 2280
2276 2281 if (mptsas_dma_addr_create(mpt, recv_dma_attrs,
2277 2282 &recv_dma_handle, &recv_accessp, &recv_memp,
2278 2283 (sizeof (MPI2_CONFIG_REPLY)), NULL) == FALSE) {
2279 2284 rval = DDI_FAILURE;
2280 2285 goto done;
2281 2286 }
2282 2287 /* Now safe to call mptsas_dma_addr_destroy(recv_dma_handle). */
2283 2288 free_recv = B_TRUE;
2284 2289
2285 2290 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY));
2286 2291 configreply = (pMpi2ConfigReply_t)recv_memp;
2287 2292 recv_numbytes = sizeof (MPI2_CONFIG_REPLY);
2288 2293
2289 2294 /*
2290 2295 * get config reply message
2291 2296 */
2292 2297 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2293 2298 recv_accessp)) {
2294 2299 rval = DDI_FAILURE;
2295 2300 goto done;
2296 2301 }
2297 2302
2298 2303 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2299 2304 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 update: "
2300 2305 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2301 2306 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2302 2307 goto done;
2303 2308 }
2304 2309
2305 2310 /*
2306 2311 * dynamically create a customized dma attribute structure
2307 2312 * that describes the MPT's config page structure.
2308 2313 */
2309 2314 page_dma_attrs = mpt->m_msg_dma_attr;
2310 2315 page_dma_attrs.dma_attr_sgllen = 1;
2311 2316 page_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_PAGE_MAN_5));
2312 2317
2313 2318 if (mptsas_dma_addr_create(mpt, page_dma_attrs, &page_dma_handle,
2314 2319 &page_accessp, &page_memp, (sizeof (MPI2_CONFIG_PAGE_MAN_5)),
2315 2320 &page_cookie) == FALSE) {
2316 2321 rval = DDI_FAILURE;
2317 2322 goto done;
2318 2323 }
2319 2324 /* Now safe to call mptsas_dma_addr_destroy(page_dma_handle). */
2320 2325 free_page = B_TRUE;
2321 2326
2322 2327 bzero(page_memp, sizeof (MPI2_CONFIG_PAGE_MAN_5));
2323 2328 m5 = (pMpi2ManufacturingPage5_t)page_memp;
2324 2329 NDBG20(("mptsas_get_manufacture_page5: paddr 0x%p",
2325 2330 (void *)(uintptr_t)page_cookie.dmac_laddress));
2326 2331
2327 2332 /*
2328 2333 * Give reply address to IOC to store config page in and send
2329 2334 * config request out.
2330 2335 */
2331 2336
2332 2337 flagslength = sizeof (MPI2_CONFIG_PAGE_MAN_5);
2333 2338 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
2334 2339 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2335 2340 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2336 2341 MPI2_SGE_FLAGS_IOC_TO_HOST |
2337 2342 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
2338 2343
2339 2344 if (mptsas_send_config_request_msg(mpt,
2340 2345 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2341 2346 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 5,
2342 2347 ddi_get8(recv_accessp, &configreply->Header.PageVersion),
2343 2348 ddi_get8(recv_accessp, &configreply->Header.PageLength),
2344 2349 flagslength, page_cookie.dmac_laddress)) {
2345 2350 rval = DDI_FAILURE;
2346 2351 goto done;
2347 2352 }
2348 2353
2349 2354 /*
2350 2355 * get reply view handshake
2351 2356 */
2352 2357 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2353 2358 recv_accessp)) {
2354 2359 rval = DDI_FAILURE;
2355 2360 goto done;
2356 2361 }
2357 2362
2358 2363 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2359 2364 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 config: "
2360 2365 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2361 2366 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2362 2367 goto done;
2363 2368 }
2364 2369
2365 2370 (void) ddi_dma_sync(page_dma_handle, 0, 0, DDI_DMA_SYNC_FORCPU);
2366 2371
2367 2372 /*
2368 2373 * Fusion-MPT stores fields in little-endian format. This is
2369 2374 * why the low-order 32 bits are stored first.
2370 2375 */
2371 2376 mpt->un.sasaddr.m_base_wwid_lo =
2372 2377 ddi_get32(page_accessp, (uint32_t *)(void *)&m5->Phy[0].WWID);
2373 2378 mpt->un.sasaddr.m_base_wwid_hi =
2374 2379 ddi_get32(page_accessp, (uint32_t *)(void *)&m5->Phy[0].WWID + 1);
2375 2380
2376 2381 if (ddi_prop_update_int64(DDI_DEV_T_NONE, mpt->m_dip,
2377 2382 "base-wwid", mpt->un.m_base_wwid) != DDI_PROP_SUCCESS) {
2378 2383 NDBG2(("%s%d: failed to create base-wwid property",
2379 2384 ddi_driver_name(mpt->m_dip), ddi_get_instance(mpt->m_dip)));
2380 2385 }
2381 2386
2382 2387 /*
2383 2388 * Set the number of PHYs present.
2384 2389 */
2385 2390 mpt->m_num_phys = ddi_get8(page_accessp, (uint8_t *)&m5->NumPhys);
2386 2391
2387 2392 if (ddi_prop_update_int(DDI_DEV_T_NONE, mpt->m_dip,
2388 2393 "num-phys", mpt->m_num_phys) != DDI_PROP_SUCCESS) {
2389 2394 NDBG2(("%s%d: failed to create num-phys property",
2390 2395 ddi_driver_name(mpt->m_dip), ddi_get_instance(mpt->m_dip)));
2391 2396 }
2392 2397
2393 2398 mptsas_log(mpt, CE_NOTE, "!mpt%d: Initiator WWNs: 0x%016llx-0x%016llx",
2394 2399 mpt->m_instance, (unsigned long long)mpt->un.m_base_wwid,
2395 2400 (unsigned long long)mpt->un.m_base_wwid + mpt->m_num_phys - 1);
2396 2401
2397 2402 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) ||
2398 2403 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) {
2399 2404 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2400 2405 rval = DDI_FAILURE;
2401 2406 goto done;
2402 2407 }
2403 2408 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) ||
2404 2409 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) {
2405 2410 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2406 2411 rval = DDI_FAILURE;
2407 2412 }
2408 2413 done:
2409 2414 /*
2410 2415 * free up memory
2411 2416 */
2412 2417 if (free_recv)
2413 2418 mptsas_dma_addr_destroy(&recv_dma_handle, &recv_accessp);
2414 2419 if (free_page)
2415 2420 mptsas_dma_addr_destroy(&page_dma_handle, &page_accessp);
2416 2421 MPTSAS_ENABLE_INTR(mpt);
2417 2422
2418 2423 return (rval);
2419 2424 }
2420 2425
2421 2426 static int
2422 2427 mptsas_sasphypage_0_cb(mptsas_t *mpt, caddr_t page_memp,
2423 2428 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
2424 2429 va_list ap)
2425 2430 {
2426 2431 #ifndef __lock_lint
2427 2432 _NOTE(ARGUNUSED(ap))
2428 2433 #endif
2429 2434 pMpi2SasPhyPage0_t sasphypage;
2430 2435 int rval = DDI_SUCCESS;
2431 2436 uint16_t *owner_devhdl, *attached_devhdl;
2432 2437 uint8_t *attached_phy_identify;
2433 2438 uint32_t *attached_phy_info;
2434 2439 uint8_t *programmed_link_rate;
2435 2440 uint8_t *hw_link_rate;
2436 2441 uint8_t *change_count;
2437 2442 uint32_t *phy_info;
2438 2443 uint8_t *negotiated_link_rate;
2439 2444 uint32_t page_address;
2440 2445
2441 2446 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
2442 2447 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
2443 2448 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page0 "
2444 2449 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
2445 2450 iocstatus, iocloginfo);
2446 2451 rval = DDI_FAILURE;
2447 2452 return (rval);
2448 2453 }
2449 2454 page_address = va_arg(ap, uint32_t);
2450 2455 /*
2451 2456 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
2452 2457 * are no more pages. If everything is OK up to this point but the
2453 2458 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
2454 2459 * signal that device traversal is complete.
2455 2460 */
2456 2461 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
2457 2462 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) ==
2458 2463 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) {
2459 2464 mpt->m_done_traverse_smp = 1;
2460 2465 }
2461 2466 rval = DDI_FAILURE;
2462 2467 return (rval);
2463 2468 }
2464 2469 owner_devhdl = va_arg(ap, uint16_t *);
2465 2470 attached_devhdl = va_arg(ap, uint16_t *);
2466 2471 attached_phy_identify = va_arg(ap, uint8_t *);
2467 2472 attached_phy_info = va_arg(ap, uint32_t *);
2468 2473 programmed_link_rate = va_arg(ap, uint8_t *);
2469 2474 hw_link_rate = va_arg(ap, uint8_t *);
2470 2475 change_count = va_arg(ap, uint8_t *);
2471 2476 phy_info = va_arg(ap, uint32_t *);
2472 2477 negotiated_link_rate = va_arg(ap, uint8_t *);
2473 2478
2474 2479 sasphypage = (pMpi2SasPhyPage0_t)page_memp;
2475 2480
2476 2481 *owner_devhdl =
2477 2482 ddi_get16(accessp, &sasphypage->OwnerDevHandle);
2478 2483 *attached_devhdl =
2479 2484 ddi_get16(accessp, &sasphypage->AttachedDevHandle);
2480 2485 *attached_phy_identify =
2481 2486 ddi_get8(accessp, &sasphypage->AttachedPhyIdentifier);
2482 2487 *attached_phy_info =
2483 2488 ddi_get32(accessp, &sasphypage->AttachedPhyInfo);
2484 2489 *programmed_link_rate =
2485 2490 ddi_get8(accessp, &sasphypage->ProgrammedLinkRate);
2486 2491 *hw_link_rate =
2487 2492 ddi_get8(accessp, &sasphypage->HwLinkRate);
2488 2493 *change_count =
2489 2494 ddi_get8(accessp, &sasphypage->ChangeCount);
2490 2495 *phy_info =
2491 2496 ddi_get32(accessp, &sasphypage->PhyInfo);
2492 2497 *negotiated_link_rate =
2493 2498 ddi_get8(accessp, &sasphypage->NegotiatedLinkRate);
2494 2499
2495 2500 return (rval);
2496 2501 }
2497 2502
2498 2503 /*
2499 2504 * Request MPI configuration page SAS phy page 0 to get DevHandle, phymask
2500 2505 * and SAS address.
2501 2506 */
2502 2507 int
2503 2508 mptsas_get_sas_phy_page0(mptsas_t *mpt, uint32_t page_address,
2504 2509 smhba_info_t *info)
2505 2510 {
2506 2511 int rval = DDI_SUCCESS;
2507 2512
2508 2513 ASSERT(mutex_owned(&mpt->m_mutex));
2509 2514
2510 2515 /*
2511 2516 * Get the header and config page. reply contains the reply frame,
2512 2517 * which holds status info for the request.
2513 2518 */
2514 2519 rval = mptsas_access_config_page(mpt,
2515 2520 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2516 2521 MPI2_CONFIG_EXTPAGETYPE_SAS_PHY, 0, page_address,
2517 2522 mptsas_sasphypage_0_cb, page_address, &info->owner_devhdl,
2518 2523 &info->attached_devhdl, &info->attached_phy_identify,
2519 2524 &info->attached_phy_info, &info->programmed_link_rate,
2520 2525 &info->hw_link_rate, &info->change_count,
2521 2526 &info->phy_info, &info->negotiated_link_rate);
2522 2527
2523 2528 return (rval);
2524 2529 }
2525 2530
2526 2531 static int
2527 2532 mptsas_sasphypage_1_cb(mptsas_t *mpt, caddr_t page_memp,
2528 2533 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
2529 2534 va_list ap)
2530 2535 {
2531 2536 #ifndef __lock_lint
2532 2537 _NOTE(ARGUNUSED(ap))
2533 2538 #endif
2534 2539 pMpi2SasPhyPage1_t sasphypage;
2535 2540 int rval = DDI_SUCCESS;
2536 2541
2537 2542 uint32_t *invalid_dword_count;
2538 2543 uint32_t *running_disparity_error_count;
2539 2544 uint32_t *loss_of_dword_sync_count;
2540 2545 uint32_t *phy_reset_problem_count;
2541 2546 uint32_t page_address;
2542 2547
2543 2548 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
2544 2549 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
2545 2550 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page1 "
2546 2551 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
2547 2552 iocstatus, iocloginfo);
2548 2553 rval = DDI_FAILURE;
2549 2554 return (rval);
2550 2555 }
2551 2556 page_address = va_arg(ap, uint32_t);
2552 2557 /*
2553 2558 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
2554 2559 * are no more pages. If everything is OK up to this point but the
2555 2560 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
2556 2561 * signal that device traversal is complete.
2557 2562 */
2558 2563 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
2559 2564 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) ==
2560 2565 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) {
2561 2566 mpt->m_done_traverse_smp = 1;
2562 2567 }
2563 2568 rval = DDI_FAILURE;
2564 2569 return (rval);
2565 2570 }
2566 2571
2567 2572 invalid_dword_count = va_arg(ap, uint32_t *);
2568 2573 running_disparity_error_count = va_arg(ap, uint32_t *);
2569 2574 loss_of_dword_sync_count = va_arg(ap, uint32_t *);
2570 2575 phy_reset_problem_count = va_arg(ap, uint32_t *);
2571 2576
2572 2577 sasphypage = (pMpi2SasPhyPage1_t)page_memp;
2573 2578
2574 2579 *invalid_dword_count =
2575 2580 ddi_get32(accessp, &sasphypage->InvalidDwordCount);
2576 2581 *running_disparity_error_count =
2577 2582 ddi_get32(accessp, &sasphypage->RunningDisparityErrorCount);
2578 2583 *loss_of_dword_sync_count =
2579 2584 ddi_get32(accessp, &sasphypage->LossDwordSynchCount);
2580 2585 *phy_reset_problem_count =
2581 2586 ddi_get32(accessp, &sasphypage->PhyResetProblemCount);
2582 2587
2583 2588 return (rval);
2584 2589 }
2585 2590
2586 2591 /*
2587 2592 * Request MPI configuration page SAS phy page 0 to get DevHandle, phymask
2588 2593 * and SAS address.
2589 2594 */
2590 2595 int
2591 2596 mptsas_get_sas_phy_page1(mptsas_t *mpt, uint32_t page_address,
2592 2597 smhba_info_t *info)
2593 2598 {
2594 2599 int rval = DDI_SUCCESS;
2595 2600
2596 2601 ASSERT(mutex_owned(&mpt->m_mutex));
2597 2602
2598 2603 /*
2599 2604 * Get the header and config page. reply contains the reply frame,
2600 2605 * which holds status info for the request.
2601 2606 */
2602 2607 rval = mptsas_access_config_page(mpt,
2603 2608 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2604 2609 MPI2_CONFIG_EXTPAGETYPE_SAS_PHY, 1, page_address,
2605 2610 mptsas_sasphypage_1_cb, page_address,
2606 2611 &info->invalid_dword_count,
2607 2612 &info->running_disparity_error_count,
2608 2613 &info->loss_of_dword_sync_count,
2609 2614 &info->phy_reset_problem_count);
2610 2615
2611 2616 return (rval);
2612 2617 }
2613 2618 /*
2614 2619 * mptsas_get_manufacture_page0
2615 2620 *
2616 2621 * This function will retrieve the base
2617 2622 * Chip name, Board Name,Board Trace number from the adapter.
2618 2623 * Since this function is only called during the
2619 2624 * initialization process, use handshaking.
2620 2625 */
2621 2626 int
2622 2627 mptsas_get_manufacture_page0(mptsas_t *mpt)
2623 2628 {
2624 2629 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs;
2625 2630 ddi_dma_cookie_t page_cookie;
2626 2631 ddi_dma_handle_t recv_dma_handle, page_dma_handle;
2627 2632 ddi_acc_handle_t recv_accessp, page_accessp;
2628 2633 pMpi2ConfigReply_t configreply;
2629 2634 caddr_t recv_memp, page_memp;
2630 2635 int recv_numbytes;
2631 2636 pMpi2ManufacturingPage0_t m0;
2632 2637 uint32_t flagslength;
2633 2638 int rval = DDI_SUCCESS;
2634 2639 uint_t iocstatus;
2635 2640 uint8_t i = 0;
2636 2641 boolean_t free_recv = B_FALSE, free_page = B_FALSE;
2637 2642
2638 2643 MPTSAS_DISABLE_INTR(mpt);
2639 2644
2640 2645 if (mptsas_send_config_request_msg(mpt, MPI2_CONFIG_ACTION_PAGE_HEADER,
2641 2646 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 0, 0, 0, 0, 0)) {
2642 2647 rval = DDI_FAILURE;
2643 2648 goto done;
2644 2649 }
2645 2650
2646 2651 /*
2647 2652 * dynamically create a customized dma attribute structure
2648 2653 * that describes the MPT's config reply page request structure.
2649 2654 */
2650 2655 recv_dma_attrs = mpt->m_msg_dma_attr;
2651 2656 recv_dma_attrs.dma_attr_sgllen = 1;
2652 2657 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY));
2653 2658
2654 2659 if (mptsas_dma_addr_create(mpt, recv_dma_attrs, &recv_dma_handle,
2655 2660 &recv_accessp, &recv_memp, (sizeof (MPI2_CONFIG_REPLY)),
2656 2661 NULL) == FALSE) {
2657 2662 rval = DDI_FAILURE;
2658 2663 goto done;
2659 2664 }
2660 2665 /* Now safe to call mptsas_dma_addr_destroy(recv_dma_handle). */
2661 2666 free_recv = B_TRUE;
2662 2667
2663 2668 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY));
2664 2669 configreply = (pMpi2ConfigReply_t)recv_memp;
2665 2670 recv_numbytes = sizeof (MPI2_CONFIG_REPLY);
2666 2671
2667 2672 /*
2668 2673 * get config reply message
2669 2674 */
2670 2675 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2671 2676 recv_accessp)) {
2672 2677 rval = DDI_FAILURE;
2673 2678 goto done;
2674 2679 }
2675 2680
2676 2681 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2677 2682 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 update: "
2678 2683 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2679 2684 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2680 2685 goto done;
2681 2686 }
2682 2687
2683 2688 /*
2684 2689 * dynamically create a customized dma attribute structure
2685 2690 * that describes the MPT's config page structure.
2686 2691 */
2687 2692 page_dma_attrs = mpt->m_msg_dma_attr;
2688 2693 page_dma_attrs.dma_attr_sgllen = 1;
2689 2694 page_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_PAGE_MAN_0));
2690 2695
2691 2696 if (mptsas_dma_addr_create(mpt, page_dma_attrs, &page_dma_handle,
2692 2697 &page_accessp, &page_memp, (sizeof (MPI2_CONFIG_PAGE_MAN_0)),
2693 2698 &page_cookie) == FALSE) {
2694 2699 rval = DDI_FAILURE;
2695 2700 goto done;
2696 2701 }
2697 2702 /* Now safe to call mptsas_dma_addr_destroy(page_dma_handle). */
2698 2703 free_page = B_TRUE;
2699 2704
2700 2705 bzero(page_memp, sizeof (MPI2_CONFIG_PAGE_MAN_0));
2701 2706 m0 = (pMpi2ManufacturingPage0_t)page_memp;
2702 2707
2703 2708 /*
2704 2709 * Give reply address to IOC to store config page in and send
2705 2710 * config request out.
2706 2711 */
2707 2712
2708 2713 flagslength = sizeof (MPI2_CONFIG_PAGE_MAN_0);
2709 2714 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
2710 2715 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2711 2716 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2712 2717 MPI2_SGE_FLAGS_IOC_TO_HOST |
2713 2718 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
2714 2719
2715 2720 if (mptsas_send_config_request_msg(mpt,
2716 2721 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2717 2722 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 0,
2718 2723 ddi_get8(recv_accessp, &configreply->Header.PageVersion),
2719 2724 ddi_get8(recv_accessp, &configreply->Header.PageLength),
2720 2725 flagslength, page_cookie.dmac_laddress)) {
2721 2726 rval = DDI_FAILURE;
2722 2727 goto done;
2723 2728 }
2724 2729
2725 2730 /*
2726 2731 * get reply view handshake
2727 2732 */
2728 2733 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2729 2734 recv_accessp)) {
2730 2735 rval = DDI_FAILURE;
2731 2736 goto done;
2732 2737 }
2733 2738
2734 2739 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2735 2740 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page0 config: "
2736 2741 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2737 2742 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2738 2743 goto done;
2739 2744 }
2740 2745
2741 2746 (void) ddi_dma_sync(page_dma_handle, 0, 0, DDI_DMA_SYNC_FORCPU);
2742 2747
2743 2748 /*
2744 2749 * Fusion-MPT stores fields in little-endian format. This is
2745 2750 * why the low-order 32 bits are stored first.
2746 2751 */
2747 2752
2748 2753 for (i = 0; i < 16; i++) {
2749 2754 mpt->m_MANU_page0.ChipName[i] =
2750 2755 ddi_get8(page_accessp,
2751 2756 (uint8_t *)(void *)&m0->ChipName[i]);
2752 2757 }
2753 2758
2754 2759 for (i = 0; i < 8; i++) {
2755 2760 mpt->m_MANU_page0.ChipRevision[i] =
2756 2761 ddi_get8(page_accessp,
2757 2762 (uint8_t *)(void *)&m0->ChipRevision[i]);
2758 2763 }
2759 2764
2760 2765 for (i = 0; i < 16; i++) {
2761 2766 mpt->m_MANU_page0.BoardName[i] =
2762 2767 ddi_get8(page_accessp,
2763 2768 (uint8_t *)(void *)&m0->BoardName[i]);
2764 2769 }
2765 2770
2766 2771 for (i = 0; i < 16; i++) {
2767 2772 mpt->m_MANU_page0.BoardAssembly[i] =
2768 2773 ddi_get8(page_accessp,
2769 2774 (uint8_t *)(void *)&m0->BoardAssembly[i]);
2770 2775 }
2771 2776
2772 2777 for (i = 0; i < 16; i++) {
2773 2778 mpt->m_MANU_page0.BoardTracerNumber[i] =
2774 2779 ddi_get8(page_accessp,
2775 2780 (uint8_t *)(void *)&m0->BoardTracerNumber[i]);
2776 2781 }
2777 2782
2778 2783 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) ||
2779 2784 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) {
2780 2785 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2781 2786 rval = DDI_FAILURE;
2782 2787 goto done;
2783 2788 }
2784 2789 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) ||
2785 2790 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) {
2786 2791 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2787 2792 rval = DDI_FAILURE;
2788 2793 }
2789 2794 done:
2790 2795 /*
2791 2796 * free up memory
2792 2797 */
2793 2798 if (free_recv)
2794 2799 mptsas_dma_addr_destroy(&recv_dma_handle, &recv_accessp);
2795 2800 if (free_page)
2796 2801 mptsas_dma_addr_destroy(&page_dma_handle, &page_accessp);
2797 2802 MPTSAS_ENABLE_INTR(mpt);
2798 2803
2799 2804 return (rval);
2800 2805 }
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