Print this page
First attempt at pulling 4310 fix from Andy Giles tree
| Split |
Close |
| Expand all |
| Collapse all |
--- old/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas_impl.c
+++ new/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas_impl.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
24 24 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
25 25 * Copyright 2014 OmniTI Computer Consulting, Inc. All rights reserved.
26 26 * Copyright (c) 2014, Tegile Systems Inc. All rights reserved.
27 27 */
28 28
29 29 /*
30 30 * Copyright (c) 2000 to 2010, LSI Corporation.
31 31 * All rights reserved.
32 32 *
33 33 * Redistribution and use in source and binary forms of all code within
34 34 * this file that is exclusively owned by LSI, with or without
35 35 * modification, is permitted provided that, in addition to the CDDL 1.0
36 36 * License requirements, the following conditions are met:
37 37 *
38 38 * Neither the name of the author nor the names of its contributors may be
39 39 * used to endorse or promote products derived from this software without
40 40 * specific prior written permission.
41 41 *
42 42 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43 43 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44 44 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
45 45 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
46 46 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
47 47 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
48 48 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
49 49 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
50 50 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
51 51 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
52 52 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
53 53 * DAMAGE.
54 54 */
55 55
56 56 /*
57 57 * mptsas_impl - This file contains all the basic functions for communicating
58 58 * to MPT based hardware.
59 59 */
60 60
61 61 #if defined(lint) || defined(DEBUG)
62 62 #define MPTSAS_DEBUG
63 63 #endif
64 64
65 65 /*
66 66 * standard header files
67 67 */
68 68 #include <sys/note.h>
69 69 #include <sys/scsi/scsi.h>
70 70 #include <sys/pci.h>
71 71
72 72 #pragma pack(1)
73 73 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_type.h>
74 74 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2.h>
75 75 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_cnfg.h>
76 76 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_init.h>
77 77 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_ioc.h>
78 78 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_sas.h>
79 79 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_tool.h>
80 80 #pragma pack()
81 81
82 82 /*
83 83 * private header files.
84 84 */
85 85 #include <sys/scsi/adapters/mpt_sas/mptsas_var.h>
86 86 #include <sys/scsi/adapters/mpt_sas/mptsas_smhba.h>
87 87
88 88 /*
89 89 * FMA header files.
90 90 */
91 91 #include <sys/fm/io/ddi.h>
92 92
93 93 /*
94 94 * prototypes
95 95 */
96 96 static void mptsas_ioc_event_cmdq_add(mptsas_t *mpt, m_event_struct_t *cmd);
97 97 static void mptsas_ioc_event_cmdq_delete(mptsas_t *mpt, m_event_struct_t *cmd);
98 98 static m_event_struct_t *mptsas_ioc_event_find_by_cmd(mptsas_t *mpt,
99 99 struct mptsas_cmd *cmd);
100 100
101 101 /*
102 102 * add ioc evnet cmd into the queue
103 103 */
104 104 static void
105 105 mptsas_ioc_event_cmdq_add(mptsas_t *mpt, m_event_struct_t *cmd)
106 106 {
107 107 if ((cmd->m_event_linkp = mpt->m_ioc_event_cmdq) == NULL) {
108 108 mpt->m_ioc_event_cmdtail = &cmd->m_event_linkp;
109 109 mpt->m_ioc_event_cmdq = cmd;
110 110 } else {
111 111 cmd->m_event_linkp = NULL;
112 112 *(mpt->m_ioc_event_cmdtail) = cmd;
113 113 mpt->m_ioc_event_cmdtail = &cmd->m_event_linkp;
114 114 }
115 115 }
116 116
117 117 /*
118 118 * remove specified cmd from the ioc event queue
119 119 */
120 120 static void
121 121 mptsas_ioc_event_cmdq_delete(mptsas_t *mpt, m_event_struct_t *cmd)
122 122 {
123 123 m_event_struct_t *prev = mpt->m_ioc_event_cmdq;
124 124 if (prev == cmd) {
125 125 if ((mpt->m_ioc_event_cmdq = cmd->m_event_linkp) == NULL) {
126 126 mpt->m_ioc_event_cmdtail = &mpt->m_ioc_event_cmdq;
127 127 }
128 128 cmd->m_event_linkp = NULL;
129 129 return;
130 130 }
131 131 while (prev != NULL) {
132 132 if (prev->m_event_linkp == cmd) {
133 133 prev->m_event_linkp = cmd->m_event_linkp;
134 134 if (cmd->m_event_linkp == NULL) {
135 135 mpt->m_ioc_event_cmdtail = &prev->m_event_linkp;
136 136 }
137 137
138 138 cmd->m_event_linkp = NULL;
139 139 return;
140 140 }
141 141 prev = prev->m_event_linkp;
142 142 }
143 143 }
144 144
145 145 static m_event_struct_t *
146 146 mptsas_ioc_event_find_by_cmd(mptsas_t *mpt, struct mptsas_cmd *cmd)
147 147 {
148 148 m_event_struct_t *ioc_cmd = NULL;
149 149
150 150 ioc_cmd = mpt->m_ioc_event_cmdq;
151 151 while (ioc_cmd != NULL) {
152 152 if (&(ioc_cmd->m_event_cmd) == cmd) {
153 153 return (ioc_cmd);
154 154 }
155 155 ioc_cmd = ioc_cmd->m_event_linkp;
156 156 }
157 157 ioc_cmd = NULL;
158 158 return (ioc_cmd);
159 159 }
160 160
161 161 void
162 162 mptsas_destroy_ioc_event_cmd(mptsas_t *mpt)
163 163 {
164 164 m_event_struct_t *ioc_cmd = NULL;
165 165 m_event_struct_t *ioc_cmd_tmp = NULL;
166 166 ioc_cmd = mpt->m_ioc_event_cmdq;
167 167
168 168 /*
169 169 * because the IOC event queue is resource of per instance for driver,
170 170 * it's not only ACK event commands used it, but also some others used
171 171 * it. We need destroy all ACK event commands when IOC reset, but can't
172 172 * disturb others.So we use filter to clear the ACK event cmd in ioc
173 173 * event queue, and other requests should be reserved, and they would
174 174 * be free by its owner.
175 175 */
176 176 while (ioc_cmd != NULL) {
177 177 if (ioc_cmd->m_event_cmd.cmd_flags & CFLAG_CMDACK) {
178 178 NDBG20(("destroy!! remove Ack Flag ioc_cmd\n"));
179 179 if ((mpt->m_ioc_event_cmdq =
180 180 ioc_cmd->m_event_linkp) == NULL)
181 181 mpt->m_ioc_event_cmdtail =
182 182 &mpt->m_ioc_event_cmdq;
183 183 ioc_cmd_tmp = ioc_cmd;
184 184 ioc_cmd = ioc_cmd->m_event_linkp;
185 185 kmem_free(ioc_cmd_tmp, M_EVENT_STRUCT_SIZE);
186 186 } else {
187 187 /*
188 188 * it's not ack cmd, so continue to check next one
189 189 */
190 190
191 191 NDBG20(("destroy!! it's not Ack Flag, continue\n"));
192 192 ioc_cmd = ioc_cmd->m_event_linkp;
193 193 }
194 194
195 195 }
196 196 }
197 197
198 198 void
199 199 mptsas_start_config_page_access(mptsas_t *mpt, mptsas_cmd_t *cmd)
200 200 {
201 201 pMpi2ConfigRequest_t request;
202 202 pMpi2SGESimple64_t sge;
203 203 struct scsi_pkt *pkt = cmd->cmd_pkt;
204 204 mptsas_config_request_t *config = pkt->pkt_ha_private;
205 205 uint8_t direction;
206 206 uint32_t length, flagslength;
207 207 uint64_t request_desc;
208 208
209 209 ASSERT(mutex_owned(&mpt->m_mutex));
210 210
211 211 /*
212 212 * Point to the correct message and clear it as well as the global
213 213 * config page memory.
214 214 */
215 215 request = (pMpi2ConfigRequest_t)(mpt->m_req_frame +
216 216 (mpt->m_req_frame_size * cmd->cmd_slot));
217 217 bzero(request, mpt->m_req_frame_size);
218 218
219 219 /*
220 220 * Form the request message.
221 221 */
222 222 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Function,
223 223 MPI2_FUNCTION_CONFIG);
224 224 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Action, config->action);
225 225 direction = MPI2_SGE_FLAGS_IOC_TO_HOST;
226 226 length = 0;
227 227 sge = (pMpi2SGESimple64_t)&request->PageBufferSGE;
228 228 if (config->action == MPI2_CONFIG_ACTION_PAGE_HEADER) {
229 229 if (config->page_type > MPI2_CONFIG_PAGETYPE_MASK) {
230 230 ddi_put8(mpt->m_acc_req_frame_hdl,
231 231 &request->Header.PageType,
232 232 MPI2_CONFIG_PAGETYPE_EXTENDED);
233 233 ddi_put8(mpt->m_acc_req_frame_hdl,
234 234 &request->ExtPageType, config->page_type);
235 235 } else {
236 236 ddi_put8(mpt->m_acc_req_frame_hdl,
237 237 &request->Header.PageType, config->page_type);
238 238 }
239 239 } else {
240 240 ddi_put8(mpt->m_acc_req_frame_hdl, &request->ExtPageType,
241 241 config->ext_page_type);
242 242 ddi_put16(mpt->m_acc_req_frame_hdl, &request->ExtPageLength,
243 243 config->ext_page_length);
244 244 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageType,
245 245 config->page_type);
246 246 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageLength,
247 247 config->page_length);
248 248 ddi_put8(mpt->m_acc_req_frame_hdl,
249 249 &request->Header.PageVersion, config->page_version);
250 250 if ((config->page_type & MPI2_CONFIG_PAGETYPE_MASK) ==
251 251 MPI2_CONFIG_PAGETYPE_EXTENDED) {
252 252 length = config->ext_page_length * 4;
253 253 } else {
254 254 length = config->page_length * 4;
255 255 }
256 256
257 257 if (config->action == MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) {
258 258 direction = MPI2_SGE_FLAGS_HOST_TO_IOC;
259 259 }
260 260 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.Low,
261 261 (uint32_t)cmd->cmd_dma_addr);
262 262 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.High,
263 263 (uint32_t)(cmd->cmd_dma_addr >> 32));
264 264 }
265 265 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageNumber,
266 266 config->page_number);
267 267 ddi_put32(mpt->m_acc_req_frame_hdl, &request->PageAddress,
268 268 config->page_address);
269 269 flagslength = ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
270 270 MPI2_SGE_FLAGS_END_OF_BUFFER |
271 271 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
272 272 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
273 273 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
274 274 direction |
275 275 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
276 276 flagslength |= length;
277 277 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->FlagsLength, flagslength);
278 278
279 279 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
280 280 DDI_DMA_SYNC_FORDEV);
281 281 request_desc = (cmd->cmd_slot << 16) +
282 282 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
283 283 cmd->cmd_rfm = NULL;
284 284 MPTSAS_START_CMD(mpt, request_desc);
285 285 if ((mptsas_check_dma_handle(mpt->m_dma_req_frame_hdl) !=
286 286 DDI_SUCCESS) ||
287 287 (mptsas_check_acc_handle(mpt->m_acc_req_frame_hdl) !=
288 288 DDI_SUCCESS)) {
289 289 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
290 290 }
291 291 }
292 292
293 293 int
294 294 mptsas_access_config_page(mptsas_t *mpt, uint8_t action, uint8_t page_type,
295 295 uint8_t page_number, uint32_t page_address, int (*callback) (mptsas_t *,
296 296 caddr_t, ddi_acc_handle_t, uint16_t, uint32_t, va_list), ...)
297 297 {
298 298 va_list ap;
299 299 ddi_dma_attr_t attrs;
300 300 ddi_dma_cookie_t cookie;
301 301 ddi_acc_handle_t accessp;
302 302 size_t len = 0;
303 303 mptsas_config_request_t config;
304 304 int rval = DDI_SUCCESS, config_flags = 0;
305 305 mptsas_cmd_t *cmd;
306 306 struct scsi_pkt *pkt;
307 307 pMpi2ConfigReply_t reply;
308 308 uint16_t iocstatus = 0;
309 309 uint32_t iocloginfo;
310 310 caddr_t page_memp;
311 311 boolean_t free_dma = B_FALSE;
312 312
313 313 va_start(ap, callback);
314 314 ASSERT(mutex_owned(&mpt->m_mutex));
315 315
316 316 /*
317 317 * Get a command from the pool.
318 318 */
319 319 if ((rval = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) {
320 320 mptsas_log(mpt, CE_NOTE, "command pool is full for config "
321 321 "page request");
322 322 rval = DDI_FAILURE;
323 323 goto page_done;
324 324 }
325 325 config_flags |= MPTSAS_REQUEST_POOL_CMD;
326 326
327 327 bzero((caddr_t)cmd, sizeof (*cmd));
328 328 bzero((caddr_t)pkt, scsi_pkt_size());
329 329 bzero((caddr_t)&config, sizeof (config));
330 330
331 331 /*
332 332 * Save the data for this request to be used in the call to start the
333 333 * config header request.
334 334 */
335 335 config.action = MPI2_CONFIG_ACTION_PAGE_HEADER;
336 336 config.page_type = page_type;
337 337 config.page_number = page_number;
338 338 config.page_address = page_address;
339 339
340 340 /*
341 341 * Form a blank cmd/pkt to store the acknowledgement message
342 342 */
343 343 pkt->pkt_ha_private = (opaque_t)&config;
344 344 pkt->pkt_flags = FLAG_HEAD;
345 345 pkt->pkt_time = 60;
346 346 cmd->cmd_pkt = pkt;
347 347 cmd->cmd_flags = CFLAG_CMDIOC | CFLAG_CONFIG;
348 348
349 349 /*
350 350 * Save the config header request message in a slot.
351 351 */
352 352 if (mptsas_save_cmd(mpt, cmd) == TRUE) {
353 353 cmd->cmd_flags |= CFLAG_PREPARED;
354 354 mptsas_start_config_page_access(mpt, cmd);
355 355 } else {
356 356 mptsas_waitq_add(mpt, cmd);
357 357 }
358 358
359 359 /*
360 360 * If this is a request for a RAID info page, or any page called during
361 361 * the RAID info page request, poll because these config page requests
362 362 * are nested. Poll to avoid data corruption due to one page's data
363 363 * overwriting the outer page request's data. This can happen when
364 364 * the mutex is released in cv_wait.
365 365 */
366 366 if ((page_type == MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG) ||
367 367 (page_type == MPI2_CONFIG_PAGETYPE_RAID_VOLUME) ||
368 368 (page_type == MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK)) {
369 369 (void) mptsas_poll(mpt, cmd, pkt->pkt_time * 1000);
370 370 } else {
371 371 while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) {
372 372 cv_wait(&mpt->m_config_cv, &mpt->m_mutex);
373 373 }
374 374 }
375 375
376 376 /*
377 377 * Check if the header request completed without timing out
378 378 */
379 379 if (cmd->cmd_flags & CFLAG_TIMEOUT) {
380 380 mptsas_log(mpt, CE_WARN, "config header request timeout");
381 381 rval = DDI_FAILURE;
382 382 goto page_done;
383 383 }
384 384
385 385 /*
386 386 * cmd_rfm points to the reply message if a reply was given. Check the
387 387 * IOCStatus to make sure everything went OK with the header request.
388 388 */
389 389 if (cmd->cmd_rfm) {
390 390 config_flags |= MPTSAS_ADDRESS_REPLY;
391 391 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
392 392 DDI_DMA_SYNC_FORCPU);
393 393 reply = (pMpi2ConfigReply_t)(mpt->m_reply_frame + (cmd->cmd_rfm
394 394 - (mpt->m_reply_frame_dma_addr & 0xffffffffu)));
395 395 config.page_type = ddi_get8(mpt->m_acc_reply_frame_hdl,
396 396 &reply->Header.PageType);
397 397 config.page_number = ddi_get8(mpt->m_acc_reply_frame_hdl,
398 398 &reply->Header.PageNumber);
399 399 config.page_length = ddi_get8(mpt->m_acc_reply_frame_hdl,
400 400 &reply->Header.PageLength);
401 401 config.page_version = ddi_get8(mpt->m_acc_reply_frame_hdl,
402 402 &reply->Header.PageVersion);
403 403 config.ext_page_type = ddi_get8(mpt->m_acc_reply_frame_hdl,
404 404 &reply->ExtPageType);
405 405 config.ext_page_length = ddi_get16(mpt->m_acc_reply_frame_hdl,
406 406 &reply->ExtPageLength);
407 407
408 408 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
409 409 &reply->IOCStatus);
410 410 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
411 411 &reply->IOCLogInfo);
412 412
413 413 if (iocstatus) {
414 414 NDBG13(("mptsas_access_config_page header: "
415 415 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
416 416 iocloginfo));
417 417 rval = DDI_FAILURE;
418 418 goto page_done;
419 419 }
420 420
421 421 if ((config.page_type & MPI2_CONFIG_PAGETYPE_MASK) ==
422 422 MPI2_CONFIG_PAGETYPE_EXTENDED)
423 423 len = (config.ext_page_length * 4);
424 424 else
425 425 len = (config.page_length * 4);
426 426
427 427 }
428 428
429 429 if (pkt->pkt_reason == CMD_RESET) {
430 430 mptsas_log(mpt, CE_WARN, "ioc reset abort config header "
431 431 "request");
432 432 rval = DDI_FAILURE;
433 433 goto page_done;
434 434 }
435 435
436 436 /*
437 437 * Put the reply frame back on the free queue, increment the free
438 438 * index, and write the new index to the free index register. But only
439 439 * if this reply is an ADDRESS reply.
440 440 */
441 441 if (config_flags & MPTSAS_ADDRESS_REPLY) {
442 442 ddi_put32(mpt->m_acc_free_queue_hdl,
443 443 &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
444 444 cmd->cmd_rfm);
445 445 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
446 446 DDI_DMA_SYNC_FORDEV);
447 447 if (++mpt->m_free_index == mpt->m_free_queue_depth) {
448 448 mpt->m_free_index = 0;
449 449 }
450 450 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
451 451 mpt->m_free_index);
452 452 config_flags &= (~MPTSAS_ADDRESS_REPLY);
453 453 }
454 454
455 455 /*
456 456 * Allocate DMA buffer here. Store the info regarding this buffer in
457 457 * the cmd struct so that it can be used for this specific command and
458 458 * de-allocated after the command completes. The size of the reply
459 459 * will not be larger than the reply frame size.
460 460 */
461 461 attrs = mpt->m_msg_dma_attr;
462 462 attrs.dma_attr_sgllen = 1;
463 463 attrs.dma_attr_granular = (uint32_t)len;
464 464
465 465 if (mptsas_dma_addr_create(mpt, attrs,
466 466 &cmd->cmd_dmahandle, &accessp, &page_memp,
467 467 len, &cookie) == FALSE) {
468 468 rval = DDI_FAILURE;
469 469 mptsas_log(mpt, CE_WARN,
470 470 "mptsas_dma_addr_create(len=0x%x) failed", (int)len);
471 471 goto page_done;
472 472 }
473 473 /* NOW we can safely call mptsas_dma_addr_destroy(). */
474 474 free_dma = B_TRUE;
475 475
476 476 cmd->cmd_dma_addr = cookie.dmac_laddress;
477 477 bzero(page_memp, len);
478 478
479 479 /*
480 480 * Save the data for this request to be used in the call to start the
481 481 * config page read
482 482 */
483 483 config.action = action;
484 484 config.page_address = page_address;
485 485
486 486 /*
487 487 * Re-use the cmd that was used to get the header. Reset some of the
488 488 * values.
489 489 */
490 490 bzero((caddr_t)pkt, scsi_pkt_size());
491 491 pkt->pkt_ha_private = (opaque_t)&config;
492 492 pkt->pkt_flags = FLAG_HEAD;
493 493 pkt->pkt_time = 60;
494 494 cmd->cmd_flags = CFLAG_PREPARED | CFLAG_CMDIOC | CFLAG_CONFIG;
495 495
496 496 /*
497 497 * Send the config page request. cmd is re-used from header request.
498 498 */
499 499 mptsas_start_config_page_access(mpt, cmd);
500 500
501 501 /*
502 502 * If this is a request for a RAID info page, or any page called during
503 503 * the RAID info page request, poll because these config page requests
504 504 * are nested. Poll to avoid data corruption due to one page's data
505 505 * overwriting the outer page request's data. This can happen when
506 506 * the mutex is released in cv_wait.
507 507 */
508 508 if ((page_type == MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG) ||
509 509 (page_type == MPI2_CONFIG_PAGETYPE_RAID_VOLUME) ||
510 510 (page_type == MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK)) {
511 511 (void) mptsas_poll(mpt, cmd, pkt->pkt_time * 1000);
512 512 } else {
513 513 while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) {
514 514 cv_wait(&mpt->m_config_cv, &mpt->m_mutex);
515 515 }
516 516 }
517 517
518 518 /*
519 519 * Check if the request completed without timing out
520 520 */
521 521 if (cmd->cmd_flags & CFLAG_TIMEOUT) {
522 522 mptsas_log(mpt, CE_WARN, "config page request timeout");
523 523 rval = DDI_FAILURE;
524 524 goto page_done;
525 525 }
526 526
527 527 /*
528 528 * cmd_rfm points to the reply message if a reply was given. The reply
529 529 * frame and the config page are returned from this function in the
530 530 * param list.
531 531 */
532 532 if (cmd->cmd_rfm) {
533 533 config_flags |= MPTSAS_ADDRESS_REPLY;
534 534 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
535 535 DDI_DMA_SYNC_FORCPU);
536 536 (void) ddi_dma_sync(cmd->cmd_dmahandle, 0, 0,
537 537 DDI_DMA_SYNC_FORCPU);
538 538 reply = (pMpi2ConfigReply_t)(mpt->m_reply_frame + (cmd->cmd_rfm
539 539 - (mpt->m_reply_frame_dma_addr & 0xffffffffu)));
540 540 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl,
541 541 &reply->IOCStatus);
542 542 iocstatus = MPTSAS_IOCSTATUS(iocstatus);
543 543 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl,
544 544 &reply->IOCLogInfo);
545 545 }
546 546
547 547 if (callback(mpt, page_memp, accessp, iocstatus, iocloginfo, ap)) {
548 548 rval = DDI_FAILURE;
549 549 goto page_done;
550 550 }
551 551
552 552 mptsas_fma_check(mpt, cmd);
553 553 /*
554 554 * Check the DMA/ACC handles and then free the DMA buffer.
555 555 */
556 556 if ((mptsas_check_dma_handle(cmd->cmd_dmahandle) != DDI_SUCCESS) ||
557 557 (mptsas_check_acc_handle(accessp) != DDI_SUCCESS)) {
558 558 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
559 559 rval = DDI_FAILURE;
560 560 }
561 561
562 562 if (pkt->pkt_reason == CMD_TRAN_ERR) {
563 563 mptsas_log(mpt, CE_WARN, "config fma error");
564 564 rval = DDI_FAILURE;
565 565 goto page_done;
566 566 }
567 567 if (pkt->pkt_reason == CMD_RESET) {
568 568 mptsas_log(mpt, CE_WARN, "ioc reset abort config request");
569 569 rval = DDI_FAILURE;
570 570 goto page_done;
571 571 }
572 572
573 573 page_done:
574 574 va_end(ap);
575 575 /*
576 576 * Put the reply frame back on the free queue, increment the free
577 577 * index, and write the new index to the free index register. But only
578 578 * if this reply is an ADDRESS reply.
579 579 */
580 580 if (config_flags & MPTSAS_ADDRESS_REPLY) {
581 581 ddi_put32(mpt->m_acc_free_queue_hdl,
582 582 &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index],
583 583 cmd->cmd_rfm);
584 584 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0,
585 585 DDI_DMA_SYNC_FORDEV);
586 586 if (++mpt->m_free_index == mpt->m_free_queue_depth) {
587 587 mpt->m_free_index = 0;
588 588 }
589 589 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex,
590 590 mpt->m_free_index);
591 591 }
592 592
593 593 if (free_dma)
594 594 mptsas_dma_addr_destroy(&cmd->cmd_dmahandle, &accessp);
595 595
596 596 if (cmd && (cmd->cmd_flags & CFLAG_PREPARED)) {
597 597 mptsas_remove_cmd(mpt, cmd);
598 598 config_flags &= (~MPTSAS_REQUEST_POOL_CMD);
599 599 }
600 600 if (config_flags & MPTSAS_REQUEST_POOL_CMD)
601 601 mptsas_return_to_pool(mpt, cmd);
602 602
603 603 if (config_flags & MPTSAS_CMD_TIMEOUT) {
604 604 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
605 605 if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) {
606 606 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
607 607 }
608 608 }
609 609
610 610 return (rval);
611 611 }
612 612
613 613 int
614 614 mptsas_send_config_request_msg(mptsas_t *mpt, uint8_t action, uint8_t pagetype,
615 615 uint32_t pageaddress, uint8_t pagenumber, uint8_t pageversion,
616 616 uint8_t pagelength, uint32_t SGEflagslength, uint64_t SGEaddress)
617 617 {
618 618 pMpi2ConfigRequest_t config;
619 619 int send_numbytes;
620 620
621 621 bzero(mpt->m_hshk_memp, sizeof (MPI2_CONFIG_REQUEST));
622 622 config = (pMpi2ConfigRequest_t)mpt->m_hshk_memp;
623 623 ddi_put8(mpt->m_hshk_acc_hdl, &config->Function, MPI2_FUNCTION_CONFIG);
624 624 ddi_put8(mpt->m_hshk_acc_hdl, &config->Action, action);
625 625 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageNumber, pagenumber);
626 626 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageType, pagetype);
627 627 ddi_put32(mpt->m_hshk_acc_hdl, &config->PageAddress, pageaddress);
628 628 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageVersion, pageversion);
629 629 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageLength, pagelength);
630 630 ddi_put32(mpt->m_hshk_acc_hdl,
631 631 &config->PageBufferSGE.MpiSimple.FlagsLength, SGEflagslength);
632 632 ddi_put32(mpt->m_hshk_acc_hdl,
633 633 &config->PageBufferSGE.MpiSimple.u.Address64.Low, SGEaddress);
634 634 ddi_put32(mpt->m_hshk_acc_hdl,
635 635 &config->PageBufferSGE.MpiSimple.u.Address64.High,
636 636 SGEaddress >> 32);
637 637 send_numbytes = sizeof (MPI2_CONFIG_REQUEST);
638 638
639 639 /*
640 640 * Post message via handshake
641 641 */
642 642 if (mptsas_send_handshake_msg(mpt, (caddr_t)config, send_numbytes,
643 643 mpt->m_hshk_acc_hdl)) {
644 644 return (-1);
645 645 }
646 646 return (0);
647 647 }
648 648
649 649 int
650 650 mptsas_send_extended_config_request_msg(mptsas_t *mpt, uint8_t action,
651 651 uint8_t extpagetype, uint32_t pageaddress, uint8_t pagenumber,
652 652 uint8_t pageversion, uint16_t extpagelength,
653 653 uint32_t SGEflagslength, uint64_t SGEaddress)
654 654 {
655 655 pMpi2ConfigRequest_t config;
656 656 int send_numbytes;
657 657
658 658 bzero(mpt->m_hshk_memp, sizeof (MPI2_CONFIG_REQUEST));
659 659 config = (pMpi2ConfigRequest_t)mpt->m_hshk_memp;
660 660 ddi_put8(mpt->m_hshk_acc_hdl, &config->Function, MPI2_FUNCTION_CONFIG);
661 661 ddi_put8(mpt->m_hshk_acc_hdl, &config->Action, action);
662 662 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageNumber, pagenumber);
663 663 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageType,
664 664 MPI2_CONFIG_PAGETYPE_EXTENDED);
665 665 ddi_put8(mpt->m_hshk_acc_hdl, &config->ExtPageType, extpagetype);
666 666 ddi_put32(mpt->m_hshk_acc_hdl, &config->PageAddress, pageaddress);
667 667 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageVersion, pageversion);
668 668 ddi_put16(mpt->m_hshk_acc_hdl, &config->ExtPageLength, extpagelength);
669 669 ddi_put32(mpt->m_hshk_acc_hdl,
670 670 &config->PageBufferSGE.MpiSimple.FlagsLength, SGEflagslength);
671 671 ddi_put32(mpt->m_hshk_acc_hdl,
672 672 &config->PageBufferSGE.MpiSimple.u.Address64.Low, SGEaddress);
673 673 ddi_put32(mpt->m_hshk_acc_hdl,
674 674 &config->PageBufferSGE.MpiSimple.u.Address64.High,
675 675 SGEaddress >> 32);
676 676 send_numbytes = sizeof (MPI2_CONFIG_REQUEST);
677 677
678 678 /*
679 679 * Post message via handshake
680 680 */
681 681 if (mptsas_send_handshake_msg(mpt, (caddr_t)config, send_numbytes,
682 682 mpt->m_hshk_acc_hdl)) {
683 683 return (-1);
684 684 }
685 685 return (0);
686 686 }
687 687
688 688 int
689 689 mptsas_ioc_wait_for_response(mptsas_t *mpt)
690 690 {
691 691 int polls = 0;
692 692
693 693 while ((ddi_get32(mpt->m_datap,
694 694 &mpt->m_reg->HostInterruptStatus) & MPI2_HIS_IOP_DOORBELL_STATUS)) {
695 695 drv_usecwait(1000);
696 696 if (polls++ > 60000) {
697 697 return (-1);
698 698 }
699 699 }
700 700 return (0);
701 701 }
702 702
703 703 int
704 704 mptsas_ioc_wait_for_doorbell(mptsas_t *mpt)
705 705 {
706 706 int polls = 0;
707 707
708 708 while ((ddi_get32(mpt->m_datap,
709 709 &mpt->m_reg->HostInterruptStatus) & MPI2_HIM_DIM) == 0) {
710 710 drv_usecwait(1000);
711 711 if (polls++ > 300000) {
712 712 return (-1);
713 713 }
714 714 }
715 715 return (0);
716 716 }
717 717
718 718 int
719 719 mptsas_send_handshake_msg(mptsas_t *mpt, caddr_t memp, int numbytes,
720 720 ddi_acc_handle_t accessp)
721 721 {
722 722 int i;
723 723
724 724 /*
725 725 * clean pending doorbells
726 726 */
727 727 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
728 728 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell,
729 729 ((MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
730 730 ((numbytes / 4) << MPI2_DOORBELL_ADD_DWORDS_SHIFT)));
731 731
732 732 if (mptsas_ioc_wait_for_doorbell(mpt)) {
733 733 NDBG19(("mptsas_send_handshake failed. Doorbell not ready\n"));
734 734 return (-1);
735 735 }
736 736
737 737 /*
738 738 * clean pending doorbells again
739 739 */
740 740 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
741 741
742 742 if (mptsas_ioc_wait_for_response(mpt)) {
743 743 NDBG19(("mptsas_send_handshake failed. Doorbell not "
744 744 "cleared\n"));
745 745 return (-1);
746 746 }
747 747
748 748 /*
749 749 * post handshake message
750 750 */
751 751 for (i = 0; (i < numbytes / 4); i++, memp += 4) {
752 752 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell,
753 753 ddi_get32(accessp, (uint32_t *)((void *)(memp))));
754 754 if (mptsas_ioc_wait_for_response(mpt)) {
755 755 NDBG19(("mptsas_send_handshake failed posting "
756 756 "message\n"));
757 757 return (-1);
758 758 }
759 759 }
760 760
761 761 if (mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) {
762 762 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
763 763 ddi_fm_acc_err_clear(mpt->m_datap, DDI_FME_VER0);
764 764 return (-1);
765 765 }
766 766
767 767 return (0);
768 768 }
769 769
770 770 int
771 771 mptsas_get_handshake_msg(mptsas_t *mpt, caddr_t memp, int numbytes,
772 772 ddi_acc_handle_t accessp)
773 773 {
774 774 int i, totalbytes, bytesleft;
775 775 uint16_t val;
776 776
777 777 /*
778 778 * wait for doorbell
779 779 */
780 780 if (mptsas_ioc_wait_for_doorbell(mpt)) {
781 781 NDBG19(("mptsas_get_handshake failed. Doorbell not ready\n"));
782 782 return (-1);
783 783 }
784 784
785 785 /*
786 786 * get first 2 bytes of handshake message to determine how much
787 787 * data we will be getting
788 788 */
789 789 for (i = 0; i < 2; i++, memp += 2) {
790 790 val = (ddi_get32(mpt->m_datap,
791 791 &mpt->m_reg->Doorbell) & MPI2_DOORBELL_DATA_MASK);
792 792 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
793 793 if (mptsas_ioc_wait_for_doorbell(mpt)) {
794 794 NDBG19(("mptsas_get_handshake failure getting initial"
795 795 " data\n"));
796 796 return (-1);
797 797 }
798 798 ddi_put16(accessp, (uint16_t *)((void *)(memp)), val);
799 799 if (i == 1) {
800 800 totalbytes = (val & 0xFF) * 2;
801 801 }
802 802 }
803 803
804 804 /*
805 805 * If we are expecting less bytes than the message wants to send
806 806 * we simply save as much as we expected and then throw out the rest
807 807 * later
808 808 */
809 809 if (totalbytes > (numbytes / 2)) {
810 810 bytesleft = ((numbytes / 2) - 2);
811 811 } else {
812 812 bytesleft = (totalbytes - 2);
813 813 }
814 814
815 815 /*
816 816 * Get the rest of the data
817 817 */
818 818 for (i = 0; i < bytesleft; i++, memp += 2) {
819 819 val = (ddi_get32(mpt->m_datap,
820 820 &mpt->m_reg->Doorbell) & MPI2_DOORBELL_DATA_MASK);
821 821 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
822 822 if (mptsas_ioc_wait_for_doorbell(mpt)) {
823 823 NDBG19(("mptsas_get_handshake failure getting"
824 824 " main data\n"));
825 825 return (-1);
826 826 }
827 827 ddi_put16(accessp, (uint16_t *)((void *)(memp)), val);
828 828 }
829 829
830 830 /*
831 831 * Sometimes the device will send more data than is expected
832 832 * This data is not used by us but needs to be cleared from
833 833 * ioc doorbell. So we just read the values and throw
834 834 * them out.
835 835 */
836 836 if (totalbytes > (numbytes / 2)) {
837 837 for (i = (numbytes / 2); i < totalbytes; i++) {
838 838 val = (ddi_get32(mpt->m_datap,
839 839 &mpt->m_reg->Doorbell) &
840 840 MPI2_DOORBELL_DATA_MASK);
841 841 ddi_put32(mpt->m_datap,
842 842 &mpt->m_reg->HostInterruptStatus, 0);
843 843 if (mptsas_ioc_wait_for_doorbell(mpt)) {
844 844 NDBG19(("mptsas_get_handshake failure getting "
845 845 "extra garbage data\n"));
846 846 return (-1);
847 847 }
848 848 }
849 849 }
850 850
851 851 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0);
852 852
853 853 if (mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) {
854 854 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
855 855 ddi_fm_acc_err_clear(mpt->m_datap, DDI_FME_VER0);
856 856 return (-1);
857 857 }
858 858
859 859 return (0);
860 860 }
861 861
862 862 int
863 863 mptsas_kick_start(mptsas_t *mpt)
864 864 {
865 865 int polls = 0;
866 866 uint32_t diag_reg, ioc_state, saved_HCB_size;
867 867
868 868 /*
869 869 * Start a hard reset. Write magic number and wait 500 mSeconds.
870 870 */
871 871 MPTSAS_ENABLE_DRWE(mpt);
872 872 drv_usecwait(500000);
873 873
874 874 /*
875 875 * Read the current Diag Reg and save the Host Controlled Boot size.
876 876 */
877 877 diag_reg = ddi_get32(mpt->m_datap, &mpt->m_reg->HostDiagnostic);
878 878 saved_HCB_size = ddi_get32(mpt->m_datap, &mpt->m_reg->HCBSize);
879 879
880 880 /*
881 881 * Set Reset Adapter bit and wait 50 mSeconds.
882 882 */
883 883 diag_reg |= MPI2_DIAG_RESET_ADAPTER;
884 884 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg);
885 885 drv_usecwait(50000);
886 886
887 887 /*
888 888 * Poll, waiting for Reset Adapter bit to clear. 300 Seconds max
889 889 * (600000 * 500 = 300,000,000 uSeconds, 300 seconds).
890 890 * If no more adapter (all FF's), just return failure.
891 891 */
892 892 for (polls = 0; polls < 600000; polls++) {
893 893 diag_reg = ddi_get32(mpt->m_datap,
894 894 &mpt->m_reg->HostDiagnostic);
895 895 if (diag_reg == 0xFFFFFFFF) {
896 896 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
897 897 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
898 898 return (DDI_FAILURE);
899 899 }
900 900 if (!(diag_reg & MPI2_DIAG_RESET_ADAPTER)) {
901 901 break;
902 902 }
903 903 drv_usecwait(500);
904 904 }
905 905 if (polls == 600000) {
906 906 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
907 907 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
908 908 return (DDI_FAILURE);
909 909 }
910 910
911 911 /*
912 912 * Check if adapter is in Host Boot Mode. If so, restart adapter
913 913 * assuming the HCB points to good FW.
914 914 * Set BootDeviceSel to HCDW (Host Code and Data Window).
915 915 */
916 916 if (diag_reg & MPI2_DIAG_HCB_MODE) {
917 917 diag_reg &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
918 918 diag_reg |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
919 919 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg);
920 920
921 921 /*
922 922 * Re-enable the HCDW.
923 923 */
924 924 ddi_put32(mpt->m_datap, &mpt->m_reg->HCBSize,
925 925 (saved_HCB_size | MPI2_HCB_SIZE_HCB_ENABLE));
926 926 }
927 927
928 928 /*
929 929 * Restart the adapter.
930 930 */
931 931 diag_reg &= ~MPI2_DIAG_HOLD_IOC_RESET;
932 932 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg);
933 933
934 934 /*
935 935 * Disable writes to the Host Diag register.
936 936 */
937 937 ddi_put32(mpt->m_datap, &mpt->m_reg->WriteSequence,
938 938 MPI2_WRSEQ_FLUSH_KEY_VALUE);
939 939
940 940 /*
941 941 * Wait 60 seconds max for FW to come to ready state.
942 942 */
943 943 for (polls = 0; polls < 60000; polls++) {
944 944 ioc_state = ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell);
945 945 if (ioc_state == 0xFFFFFFFF) {
946 946 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
947 947 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
948 948 return (DDI_FAILURE);
949 949 }
950 950 if ((ioc_state & MPI2_IOC_STATE_MASK) ==
951 951 MPI2_IOC_STATE_READY) {
952 952 break;
953 953 }
954 954 drv_usecwait(1000);
955 955 }
956 956 if (polls == 60000) {
957 957 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
958 958 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
959 959 return (DDI_FAILURE);
960 960 }
961 961
962 962 /*
963 963 * Clear the ioc ack events queue.
964 964 */
965 965 mptsas_destroy_ioc_event_cmd(mpt);
966 966
967 967 return (DDI_SUCCESS);
968 968 }
969 969
970 970 int
971 971 mptsas_ioc_reset(mptsas_t *mpt, int first_time)
972 972 {
973 973 int polls = 0;
974 974 uint32_t reset_msg;
975 975 uint32_t ioc_state;
976 976
977 977 ioc_state = ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell);
978 978 /*
979 979 * If chip is already in ready state then there is nothing to do.
980 980 */
981 981 if (ioc_state == MPI2_IOC_STATE_READY) {
982 982 return (MPTSAS_NO_RESET);
983 983 }
984 984 /*
985 985 * If the chip is already operational, we just need to send
986 986 * it a message unit reset to put it back in the ready state
987 987 */
988 988 if (ioc_state & MPI2_IOC_STATE_OPERATIONAL) {
989 989 /*
990 990 * If the first time, try MUR anyway, because we haven't even
991 991 * queried the card for m_event_replay and other capabilities.
992 992 * Other platforms do it this way, we can still do a hard
993 993 * reset if we need to, MUR takes less time than a full
994 994 * adapter reset, and there are reports that some HW
995 995 * combinations will lock up when receiving a hard reset.
996 996 */
997 997 if ((first_time || mpt->m_event_replay) &&
998 998 (mpt->m_softstate & MPTSAS_SS_MSG_UNIT_RESET)) {
999 999 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
1000 1000 reset_msg = MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET;
1001 1001 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell,
1002 1002 (reset_msg << MPI2_DOORBELL_FUNCTION_SHIFT));
1003 1003 if (mptsas_ioc_wait_for_response(mpt)) {
1004 1004 NDBG19(("mptsas_ioc_reset failure sending "
1005 1005 "message_unit_reset\n"));
1006 1006 goto hard_reset;
1007 1007 }
1008 1008
1009 1009 /*
1010 1010 * Wait no more than 60 seconds for chip to become
1011 1011 * ready.
1012 1012 */
1013 1013 while ((ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell) &
1014 1014 MPI2_IOC_STATE_READY) == 0x0) {
1015 1015 drv_usecwait(1000);
1016 1016 if (polls++ > 60000) {
1017 1017 goto hard_reset;
1018 1018 }
1019 1019 }
1020 1020
1021 1021 /*
1022 1022 * Save the last reset mode done on IOC which will be
1023 1023 * helpful while resuming from suspension.
1024 1024 */
1025 1025 mpt->m_softstate |= MPTSAS_DID_MSG_UNIT_RESET;
1026 1026
1027 1027 /*
1028 1028 * the message unit reset would do reset operations
1029 1029 * clear reply and request queue, so we should clear
1030 1030 * ACK event cmd.
1031 1031 */
1032 1032 mptsas_destroy_ioc_event_cmd(mpt);
1033 1033 return (MPTSAS_SUCCESS_MUR);
1034 1034 }
1035 1035 }
1036 1036 hard_reset:
1037 1037 mpt->m_softstate &= ~MPTSAS_DID_MSG_UNIT_RESET;
1038 1038 if (mptsas_kick_start(mpt) == DDI_FAILURE) {
1039 1039 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
1040 1040 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
1041 1041 return (MPTSAS_RESET_FAIL);
1042 1042 }
1043 1043 return (MPTSAS_SUCCESS_HARDRESET);
1044 1044 }
1045 1045
1046 1046
1047 1047 int
1048 1048 mptsas_request_from_pool(mptsas_t *mpt, mptsas_cmd_t **cmd,
1049 1049 struct scsi_pkt **pkt)
1050 1050 {
1051 1051 m_event_struct_t *ioc_cmd = NULL;
1052 1052
1053 1053 ioc_cmd = kmem_zalloc(M_EVENT_STRUCT_SIZE, KM_SLEEP);
1054 1054 if (ioc_cmd == NULL) {
1055 1055 return (DDI_FAILURE);
1056 1056 }
1057 1057 ioc_cmd->m_event_linkp = NULL;
1058 1058 mptsas_ioc_event_cmdq_add(mpt, ioc_cmd);
1059 1059 *cmd = &(ioc_cmd->m_event_cmd);
1060 1060 *pkt = &(ioc_cmd->m_event_pkt);
1061 1061
1062 1062 return (DDI_SUCCESS);
1063 1063 }
1064 1064
1065 1065 void
1066 1066 mptsas_return_to_pool(mptsas_t *mpt, mptsas_cmd_t *cmd)
1067 1067 {
1068 1068 m_event_struct_t *ioc_cmd = NULL;
1069 1069
1070 1070 ioc_cmd = mptsas_ioc_event_find_by_cmd(mpt, cmd);
1071 1071 if (ioc_cmd == NULL) {
1072 1072 return;
1073 1073 }
1074 1074
1075 1075 mptsas_ioc_event_cmdq_delete(mpt, ioc_cmd);
1076 1076 kmem_free(ioc_cmd, M_EVENT_STRUCT_SIZE);
1077 1077 ioc_cmd = NULL;
1078 1078 }
1079 1079
1080 1080 /*
1081 1081 * NOTE: We should be able to queue TM requests in the controller to make this
1082 1082 * a lot faster. If resetting all targets, for example, we can load the hi
1083 1083 * priority queue with its limit and the controller will reply as they are
1084 1084 * completed. This way, we don't have to poll for one reply at a time.
1085 1085 * Think about enhancing this later.
1086 1086 */
1087 1087 int
1088 1088 mptsas_ioc_task_management(mptsas_t *mpt, int task_type, uint16_t dev_handle,
1089 1089 int lun, uint8_t *reply, uint32_t reply_size, int mode)
1090 1090 {
1091 1091 /*
1092 1092 * In order to avoid allocating variables on the stack,
1093 1093 * we make use of the pre-existing mptsas_cmd_t and
1094 1094 * scsi_pkt which are included in the mptsas_t which
1095 1095 * is passed to this routine.
1096 1096 */
1097 1097
1098 1098 pMpi2SCSITaskManagementRequest_t task;
1099 1099 int rval = FALSE;
1100 1100 mptsas_cmd_t *cmd;
1101 1101 struct scsi_pkt *pkt;
1102 1102 mptsas_slots_t *slots = mpt->m_active;
1103 1103 uint64_t request_desc, i;
1104 1104 pMPI2DefaultReply_t reply_msg;
1105 1105
1106 1106 /*
1107 1107 * Can't start another task management routine.
1108 1108 */
1109 1109 if (slots->m_slot[MPTSAS_TM_SLOT(mpt)] != NULL) {
1110 1110 mptsas_log(mpt, CE_WARN, "Can only start 1 task management"
1111 1111 " command at a time\n");
1112 1112 return (FALSE);
1113 1113 }
1114 1114
1115 1115 cmd = &(mpt->m_event_task_mgmt.m_event_cmd);
1116 1116 pkt = &(mpt->m_event_task_mgmt.m_event_pkt);
1117 1117
1118 1118 bzero((caddr_t)cmd, sizeof (*cmd));
1119 1119 bzero((caddr_t)pkt, scsi_pkt_size());
1120 1120
1121 1121 pkt->pkt_cdbp = (opaque_t)&cmd->cmd_cdb[0];
1122 1122 pkt->pkt_scbp = (opaque_t)&cmd->cmd_scb;
1123 1123 pkt->pkt_ha_private = (opaque_t)cmd;
1124 1124 pkt->pkt_flags = (FLAG_NOINTR | FLAG_HEAD);
1125 1125 pkt->pkt_time = 60;
1126 1126 pkt->pkt_address.a_target = dev_handle;
1127 1127 pkt->pkt_address.a_lun = (uchar_t)lun;
1128 1128 cmd->cmd_pkt = pkt;
1129 1129 cmd->cmd_scblen = 1;
1130 1130 cmd->cmd_flags = CFLAG_TM_CMD;
1131 1131 cmd->cmd_slot = MPTSAS_TM_SLOT(mpt);
1132 1132
1133 1133 slots->m_slot[MPTSAS_TM_SLOT(mpt)] = cmd;
1134 1134
1135 1135 /*
1136 1136 * Store the TM message in memory location corresponding to the TM slot
1137 1137 * number.
1138 1138 */
1139 1139 task = (pMpi2SCSITaskManagementRequest_t)(mpt->m_req_frame +
1140 1140 (mpt->m_req_frame_size * cmd->cmd_slot));
1141 1141 bzero(task, mpt->m_req_frame_size);
1142 1142
1143 1143 /*
1144 1144 * form message for requested task
1145 1145 */
1146 1146 mptsas_init_std_hdr(mpt->m_acc_req_frame_hdl, task, dev_handle, lun, 0,
1147 1147 MPI2_FUNCTION_SCSI_TASK_MGMT);
1148 1148
1149 1149 /*
1150 1150 * Set the task type
1151 1151 */
1152 1152 ddi_put8(mpt->m_acc_req_frame_hdl, &task->TaskType, task_type);
1153 1153
1154 1154 /*
1155 1155 * Send TM request using High Priority Queue.
1156 1156 */
1157 1157 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
1158 1158 DDI_DMA_SYNC_FORDEV);
1159 1159 request_desc = (cmd->cmd_slot << 16) +
1160 1160 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1161 1161 MPTSAS_START_CMD(mpt, request_desc);
1162 1162 rval = mptsas_poll(mpt, cmd, MPTSAS_POLL_TIME);
1163 1163
1164 1164 if (pkt->pkt_reason == CMD_INCOMPLETE)
1165 1165 rval = FALSE;
1166 1166
1167 1167 /*
1168 1168 * If a reply frame was used and there is a reply buffer to copy the
1169 1169 * reply data into, copy it. If this fails, log a message, but don't
1170 1170 * fail the TM request.
1171 1171 */
1172 1172 if (cmd->cmd_rfm && reply) {
1173 1173 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0,
1174 1174 DDI_DMA_SYNC_FORCPU);
1175 1175 reply_msg = (pMPI2DefaultReply_t)
1176 1176 (mpt->m_reply_frame + (cmd->cmd_rfm -
1177 1177 (mpt->m_reply_frame_dma_addr & 0xffffffffu)));
1178 1178 if (reply_size > sizeof (MPI2_SCSI_TASK_MANAGE_REPLY)) {
1179 1179 reply_size = sizeof (MPI2_SCSI_TASK_MANAGE_REPLY);
1180 1180 }
1181 1181 mutex_exit(&mpt->m_mutex);
1182 1182 for (i = 0; i < reply_size; i++) {
1183 1183 if (ddi_copyout((uint8_t *)reply_msg + i, reply + i, 1,
1184 1184 mode)) {
1185 1185 mptsas_log(mpt, CE_WARN, "failed to copy out "
1186 1186 "reply data for TM request");
1187 1187 break;
1188 1188 }
|
↓ open down ↓ |
1188 lines elided |
↑ open up ↑ |
1189 1189 }
1190 1190 mutex_enter(&mpt->m_mutex);
1191 1191 }
1192 1192
1193 1193 /*
1194 1194 * clear the TM slot before returning
1195 1195 */
1196 1196 slots->m_slot[MPTSAS_TM_SLOT(mpt)] = NULL;
1197 1197
1198 1198 /*
1199 - * If we lost our task management command
1200 - * we need to reset the ioc
1199 + * If we lost our task management command we need to reset the ioc
1200 + * but we can't do it here as it's most likely we were called from
1201 + * the taskq that mptsas_restart_ioc()->mptsas_flush_hba() needs to
1202 + * wait for. So set a flag for mptsas_watch().
1201 1203 */
1202 1204 if (rval == FALSE) {
1203 1205 mptsas_log(mpt, CE_WARN, "mptsas_ioc_task_management failed "
1204 - "try to reset ioc to recovery!");
1205 - mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
1206 - if (mptsas_restart_ioc(mpt)) {
1207 - mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
1208 - rval = FAILED;
1209 - }
1206 + "schedule reset in watch!");
1207 + mpt->m_softstate |= MPTSAS_SS_RESET_INWATCH;
1210 1208 }
1211 -
1209 +
1212 1210 return (rval);
1213 1211 }
1214 1212
1215 1213 /*
1216 1214 * Complete firmware download frame for v2.0 cards.
1217 1215 */
1218 1216 static void
1219 1217 mptsas_uflash2(pMpi2FWDownloadRequest fwdownload,
1220 1218 ddi_acc_handle_t acc_hdl, uint32_t size, uint8_t type,
1221 1219 ddi_dma_cookie_t flsh_cookie)
1222 1220 {
1223 1221 pMpi2FWDownloadTCSGE_t tcsge;
1224 1222 pMpi2SGESimple64_t sge;
1225 1223 uint32_t flagslength;
1226 1224
1227 1225 ddi_put8(acc_hdl, &fwdownload->Function,
1228 1226 MPI2_FUNCTION_FW_DOWNLOAD);
1229 1227 ddi_put8(acc_hdl, &fwdownload->ImageType, type);
1230 1228 ddi_put8(acc_hdl, &fwdownload->MsgFlags,
1231 1229 MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT);
1232 1230 ddi_put32(acc_hdl, &fwdownload->TotalImageSize, size);
1233 1231
1234 1232 tcsge = (pMpi2FWDownloadTCSGE_t)&fwdownload->SGL;
1235 1233 ddi_put8(acc_hdl, &tcsge->ContextSize, 0);
1236 1234 ddi_put8(acc_hdl, &tcsge->DetailsLength, 12);
1237 1235 ddi_put8(acc_hdl, &tcsge->Flags, 0);
1238 1236 ddi_put32(acc_hdl, &tcsge->ImageOffset, 0);
1239 1237 ddi_put32(acc_hdl, &tcsge->ImageSize, size);
1240 1238
1241 1239 sge = (pMpi2SGESimple64_t)(tcsge + 1);
1242 1240 flagslength = size;
1243 1241 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
1244 1242 MPI2_SGE_FLAGS_END_OF_BUFFER |
1245 1243 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1246 1244 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
1247 1245 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1248 1246 MPI2_SGE_FLAGS_HOST_TO_IOC |
1249 1247 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
1250 1248 ddi_put32(acc_hdl, &sge->FlagsLength, flagslength);
1251 1249 ddi_put32(acc_hdl, &sge->Address.Low,
1252 1250 flsh_cookie.dmac_address);
1253 1251 ddi_put32(acc_hdl, &sge->Address.High,
1254 1252 (uint32_t)(flsh_cookie.dmac_laddress >> 32));
1255 1253 }
1256 1254
1257 1255 /*
1258 1256 * Complete firmware download frame for v2.5 cards.
1259 1257 */
1260 1258 static void
1261 1259 mptsas_uflash25(pMpi25FWDownloadRequest fwdownload,
1262 1260 ddi_acc_handle_t acc_hdl, uint32_t size, uint8_t type,
1263 1261 ddi_dma_cookie_t flsh_cookie)
1264 1262 {
1265 1263 pMpi2IeeeSgeSimple64_t sge;
1266 1264 uint8_t flags;
1267 1265
1268 1266 ddi_put8(acc_hdl, &fwdownload->Function,
1269 1267 MPI2_FUNCTION_FW_DOWNLOAD);
1270 1268 ddi_put8(acc_hdl, &fwdownload->ImageType, type);
1271 1269 ddi_put8(acc_hdl, &fwdownload->MsgFlags,
1272 1270 MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT);
1273 1271 ddi_put32(acc_hdl, &fwdownload->TotalImageSize, size);
1274 1272
1275 1273 ddi_put32(acc_hdl, &fwdownload->ImageOffset, 0);
1276 1274 ddi_put32(acc_hdl, &fwdownload->ImageSize, size);
1277 1275
1278 1276 sge = (pMpi2IeeeSgeSimple64_t)&fwdownload->SGL;
1279 1277 flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1280 1278 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
1281 1279 MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1282 1280 ddi_put8(acc_hdl, &sge->Flags, flags);
1283 1281 ddi_put32(acc_hdl, &sge->Length, size);
1284 1282 ddi_put32(acc_hdl, &sge->Address.Low,
1285 1283 flsh_cookie.dmac_address);
1286 1284 ddi_put32(acc_hdl, &sge->Address.High,
1287 1285 (uint32_t)(flsh_cookie.dmac_laddress >> 32));
1288 1286 }
1289 1287
1290 1288 static int mptsas_enable_mpi25_flashupdate = 0;
1291 1289
1292 1290 int
1293 1291 mptsas_update_flash(mptsas_t *mpt, caddr_t ptrbuffer, uint32_t size,
1294 1292 uint8_t type, int mode)
1295 1293 {
1296 1294
1297 1295 /*
1298 1296 * In order to avoid allocating variables on the stack,
1299 1297 * we make use of the pre-existing mptsas_cmd_t and
1300 1298 * scsi_pkt which are included in the mptsas_t which
1301 1299 * is passed to this routine.
1302 1300 */
1303 1301
1304 1302 ddi_dma_attr_t flsh_dma_attrs;
1305 1303 ddi_dma_cookie_t flsh_cookie;
1306 1304 ddi_dma_handle_t flsh_dma_handle;
1307 1305 ddi_acc_handle_t flsh_accessp;
1308 1306 caddr_t memp, flsh_memp;
1309 1307 mptsas_cmd_t *cmd;
1310 1308 struct scsi_pkt *pkt;
1311 1309 int i;
1312 1310 int rvalue = 0;
1313 1311 uint64_t request_desc;
1314 1312
1315 1313 if (mpt->m_MPI25 && !mptsas_enable_mpi25_flashupdate) {
1316 1314 /*
1317 1315 * The code is there but not tested yet.
1318 1316 * User has to know there are risks here.
1319 1317 */
1320 1318 mptsas_log(mpt, CE_WARN, "mptsas_update_flash(): "
1321 1319 "Updating firmware through MPI 2.5 has not been "
1322 1320 "tested yet!\n"
1323 1321 "To enable set mptsas_enable_mpi25_flashupdate to 1\n");
1324 1322 return (-1);
1325 1323 } /* Otherwise, you pay your money and you take your chances. */
1326 1324
1327 1325 if ((rvalue = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) {
1328 1326 mptsas_log(mpt, CE_WARN, "mptsas_update_flash(): allocation "
1329 1327 "failed. event ack command pool is full\n");
1330 1328 return (rvalue);
1331 1329 }
1332 1330
1333 1331 bzero((caddr_t)cmd, sizeof (*cmd));
1334 1332 bzero((caddr_t)pkt, scsi_pkt_size());
1335 1333 cmd->ioc_cmd_slot = (uint32_t)rvalue;
1336 1334
1337 1335 /*
1338 1336 * dynamically create a customized dma attribute structure
1339 1337 * that describes the flash file.
1340 1338 */
1341 1339 flsh_dma_attrs = mpt->m_msg_dma_attr;
1342 1340 flsh_dma_attrs.dma_attr_sgllen = 1;
1343 1341
1344 1342 if (mptsas_dma_addr_create(mpt, flsh_dma_attrs, &flsh_dma_handle,
1345 1343 &flsh_accessp, &flsh_memp, size, &flsh_cookie) == FALSE) {
1346 1344 mptsas_log(mpt, CE_WARN,
1347 1345 "(unable to allocate dma resource.");
1348 1346 mptsas_return_to_pool(mpt, cmd);
1349 1347 return (-1);
1350 1348 }
1351 1349
1352 1350 bzero(flsh_memp, size);
1353 1351
1354 1352 for (i = 0; i < size; i++) {
1355 1353 (void) ddi_copyin(ptrbuffer + i, flsh_memp + i, 1, mode);
1356 1354 }
1357 1355 (void) ddi_dma_sync(flsh_dma_handle, 0, 0, DDI_DMA_SYNC_FORDEV);
1358 1356
1359 1357 /*
1360 1358 * form a cmd/pkt to store the fw download message
1361 1359 */
1362 1360 pkt->pkt_cdbp = (opaque_t)&cmd->cmd_cdb[0];
1363 1361 pkt->pkt_scbp = (opaque_t)&cmd->cmd_scb;
1364 1362 pkt->pkt_ha_private = (opaque_t)cmd;
1365 1363 pkt->pkt_flags = FLAG_HEAD;
1366 1364 pkt->pkt_time = 60;
1367 1365 cmd->cmd_pkt = pkt;
1368 1366 cmd->cmd_scblen = 1;
1369 1367 cmd->cmd_flags = CFLAG_CMDIOC | CFLAG_FW_CMD;
1370 1368
1371 1369 /*
1372 1370 * Save the command in a slot
1373 1371 */
1374 1372 if (mptsas_save_cmd(mpt, cmd) == FALSE) {
1375 1373 mptsas_dma_addr_destroy(&flsh_dma_handle, &flsh_accessp);
1376 1374 mptsas_return_to_pool(mpt, cmd);
1377 1375 return (-1);
1378 1376 }
1379 1377
1380 1378 /*
1381 1379 * Fill in fw download message
1382 1380 */
1383 1381 ASSERT(cmd->cmd_slot != 0);
1384 1382 memp = mpt->m_req_frame + (mpt->m_req_frame_size * cmd->cmd_slot);
1385 1383 bzero(memp, mpt->m_req_frame_size);
1386 1384
1387 1385 if (mpt->m_MPI25)
1388 1386 mptsas_uflash25((pMpi25FWDownloadRequest)memp,
1389 1387 mpt->m_acc_req_frame_hdl, size, type, flsh_cookie);
1390 1388 else
1391 1389 mptsas_uflash2((pMpi2FWDownloadRequest)memp,
1392 1390 mpt->m_acc_req_frame_hdl, size, type, flsh_cookie);
1393 1391
1394 1392 /*
1395 1393 * Start command
1396 1394 */
1397 1395 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0,
1398 1396 DDI_DMA_SYNC_FORDEV);
1399 1397 request_desc = (cmd->cmd_slot << 16) +
1400 1398 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1401 1399 cmd->cmd_rfm = NULL;
1402 1400 MPTSAS_START_CMD(mpt, request_desc);
1403 1401
1404 1402 rvalue = 0;
1405 1403 (void) cv_reltimedwait(&mpt->m_fw_cv, &mpt->m_mutex,
1406 1404 drv_usectohz(60 * MICROSEC), TR_CLOCK_TICK);
1407 1405 if (!(cmd->cmd_flags & CFLAG_FINISHED)) {
1408 1406 mpt->m_softstate &= ~MPTSAS_SS_MSG_UNIT_RESET;
1409 1407 if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) {
1410 1408 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed");
1411 1409 }
1412 1410 rvalue = -1;
1413 1411 }
1414 1412 mptsas_remove_cmd(mpt, cmd);
1415 1413 mptsas_dma_addr_destroy(&flsh_dma_handle, &flsh_accessp);
1416 1414
1417 1415 return (rvalue);
1418 1416 }
1419 1417
1420 1418 static int
1421 1419 mptsas_sasdevpage_0_cb(mptsas_t *mpt, caddr_t page_memp,
1422 1420 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1423 1421 va_list ap)
1424 1422 {
1425 1423 #ifndef __lock_lint
1426 1424 _NOTE(ARGUNUSED(ap))
1427 1425 #endif
1428 1426 pMpi2SasDevicePage0_t sasdevpage;
1429 1427 int rval = DDI_SUCCESS, i;
1430 1428 uint8_t *sas_addr = NULL;
1431 1429 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE];
1432 1430 uint16_t *devhdl, *bay_num, *enclosure;
1433 1431 uint64_t *sas_wwn;
1434 1432 uint32_t *dev_info;
1435 1433 uint8_t *physport, *phynum;
1436 1434 uint16_t *pdevhdl, *io_flags;
1437 1435 uint32_t page_address;
1438 1436
1439 1437 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
1440 1438 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
1441 1439 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_device_page0 "
1442 1440 "header: IOCStatus=0x%x, IOCLogInfo=0x%x",
1443 1441 iocstatus, iocloginfo);
1444 1442 rval = DDI_FAILURE;
1445 1443 return (rval);
1446 1444 }
1447 1445 page_address = va_arg(ap, uint32_t);
1448 1446 /*
1449 1447 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
1450 1448 * are no more pages. If everything is OK up to this point but the
1451 1449 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
1452 1450 * signal that device traversal is complete.
1453 1451 */
1454 1452 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
1455 1453 if ((page_address & MPI2_SAS_DEVICE_PGAD_FORM_MASK) ==
1456 1454 MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE) {
1457 1455 mpt->m_done_traverse_dev = 1;
1458 1456 }
1459 1457 rval = DDI_FAILURE;
1460 1458 return (rval);
1461 1459 }
1462 1460 devhdl = va_arg(ap, uint16_t *);
1463 1461 sas_wwn = va_arg(ap, uint64_t *);
1464 1462 dev_info = va_arg(ap, uint32_t *);
1465 1463 physport = va_arg(ap, uint8_t *);
1466 1464 phynum = va_arg(ap, uint8_t *);
1467 1465 pdevhdl = va_arg(ap, uint16_t *);
1468 1466 bay_num = va_arg(ap, uint16_t *);
1469 1467 enclosure = va_arg(ap, uint16_t *);
1470 1468 io_flags = va_arg(ap, uint16_t *);
1471 1469
1472 1470 sasdevpage = (pMpi2SasDevicePage0_t)page_memp;
1473 1471
1474 1472 *dev_info = ddi_get32(accessp, &sasdevpage->DeviceInfo);
1475 1473 *devhdl = ddi_get16(accessp, &sasdevpage->DevHandle);
1476 1474 sas_addr = (uint8_t *)(&sasdevpage->SASAddress);
1477 1475 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) {
1478 1476 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i);
1479 1477 }
1480 1478 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE);
1481 1479 *sas_wwn = LE_64(*sas_wwn);
1482 1480 *physport = ddi_get8(accessp, &sasdevpage->PhysicalPort);
1483 1481 *phynum = ddi_get8(accessp, &sasdevpage->PhyNum);
1484 1482 *pdevhdl = ddi_get16(accessp, &sasdevpage->ParentDevHandle);
1485 1483 *bay_num = ddi_get16(accessp, &sasdevpage->Slot);
1486 1484 *enclosure = ddi_get16(accessp, &sasdevpage->EnclosureHandle);
1487 1485 *io_flags = ddi_get16(accessp, &sasdevpage->Flags);
1488 1486
1489 1487 if (*io_flags & MPI25_SAS_DEVICE0_FLAGS_FAST_PATH_CAPABLE) {
1490 1488 /*
1491 1489 * Leave a messages about FP cabability in the log.
1492 1490 */
1493 1491 mptsas_log(mpt, CE_CONT,
1494 1492 "!w%016"PRIx64" FastPath Capable%s", *sas_wwn,
1495 1493 (*io_flags &
1496 1494 MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH)?
1497 1495 " and Enabled":" but Disabled");
1498 1496 }
1499 1497
1500 1498 return (rval);
1501 1499 }
1502 1500
1503 1501 /*
1504 1502 * Request MPI configuration page SAS device page 0 to get DevHandle, device
1505 1503 * info and SAS address.
1506 1504 */
1507 1505 int
1508 1506 mptsas_get_sas_device_page0(mptsas_t *mpt, uint32_t page_address,
1509 1507 uint16_t *dev_handle, uint64_t *sas_wwn, uint32_t *dev_info,
1510 1508 uint8_t *physport, uint8_t *phynum, uint16_t *pdev_handle,
1511 1509 uint16_t *bay_num, uint16_t *enclosure, uint16_t *io_flags)
1512 1510 {
1513 1511 int rval = DDI_SUCCESS;
1514 1512
1515 1513 ASSERT(mutex_owned(&mpt->m_mutex));
1516 1514
1517 1515 /*
1518 1516 * Get the header and config page. reply contains the reply frame,
1519 1517 * which holds status info for the request.
1520 1518 */
1521 1519 rval = mptsas_access_config_page(mpt,
1522 1520 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1523 1521 MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE, 0, page_address,
1524 1522 mptsas_sasdevpage_0_cb, page_address, dev_handle, sas_wwn,
1525 1523 dev_info, physport, phynum, pdev_handle,
1526 1524 bay_num, enclosure, io_flags);
1527 1525
1528 1526 return (rval);
1529 1527 }
1530 1528
1531 1529 static int
1532 1530 mptsas_sasexpdpage_0_cb(mptsas_t *mpt, caddr_t page_memp,
1533 1531 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1534 1532 va_list ap)
1535 1533 {
1536 1534 #ifndef __lock_lint
1537 1535 _NOTE(ARGUNUSED(ap))
1538 1536 #endif
1539 1537 pMpi2ExpanderPage0_t expddevpage;
1540 1538 int rval = DDI_SUCCESS, i;
1541 1539 uint8_t *sas_addr = NULL;
1542 1540 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE];
1543 1541 uint16_t *devhdl;
1544 1542 uint64_t *sas_wwn;
1545 1543 uint8_t physport;
1546 1544 mptsas_phymask_t *phymask;
1547 1545 uint16_t *pdevhdl;
1548 1546 uint32_t page_address;
1549 1547
1550 1548 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
1551 1549 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
1552 1550 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page0 "
1553 1551 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1554 1552 iocstatus, iocloginfo);
1555 1553 rval = DDI_FAILURE;
1556 1554 return (rval);
1557 1555 }
1558 1556 page_address = va_arg(ap, uint32_t);
1559 1557 /*
1560 1558 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
1561 1559 * are no more pages. If everything is OK up to this point but the
1562 1560 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
1563 1561 * signal that device traversal is complete.
1564 1562 */
1565 1563 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
1566 1564 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) ==
1567 1565 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) {
1568 1566 mpt->m_done_traverse_smp = 1;
1569 1567 }
1570 1568 rval = DDI_FAILURE;
1571 1569 return (rval);
1572 1570 }
1573 1571 devhdl = va_arg(ap, uint16_t *);
1574 1572 sas_wwn = va_arg(ap, uint64_t *);
1575 1573 phymask = va_arg(ap, mptsas_phymask_t *);
1576 1574 pdevhdl = va_arg(ap, uint16_t *);
1577 1575
1578 1576 expddevpage = (pMpi2ExpanderPage0_t)page_memp;
1579 1577
1580 1578 *devhdl = ddi_get16(accessp, &expddevpage->DevHandle);
1581 1579 physport = ddi_get8(accessp, &expddevpage->PhysicalPort);
1582 1580 *phymask = mptsas_physport_to_phymask(mpt, physport);
1583 1581 *pdevhdl = ddi_get16(accessp, &expddevpage->ParentDevHandle);
1584 1582 sas_addr = (uint8_t *)(&expddevpage->SASAddress);
1585 1583 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) {
1586 1584 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i);
1587 1585 }
1588 1586 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE);
1589 1587 *sas_wwn = LE_64(*sas_wwn);
1590 1588
1591 1589 return (rval);
1592 1590 }
1593 1591
1594 1592 /*
1595 1593 * Request MPI configuration page SAS device page 0 to get DevHandle, phymask
1596 1594 * and SAS address.
1597 1595 */
1598 1596 int
1599 1597 mptsas_get_sas_expander_page0(mptsas_t *mpt, uint32_t page_address,
1600 1598 mptsas_smp_t *info)
1601 1599 {
1602 1600 int rval = DDI_SUCCESS;
1603 1601
1604 1602 ASSERT(mutex_owned(&mpt->m_mutex));
1605 1603
1606 1604 /*
1607 1605 * Get the header and config page. reply contains the reply frame,
1608 1606 * which holds status info for the request.
1609 1607 */
1610 1608 rval = mptsas_access_config_page(mpt,
1611 1609 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1612 1610 MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER, 0, page_address,
1613 1611 mptsas_sasexpdpage_0_cb, page_address, &info->m_devhdl,
1614 1612 &info->m_addr.mta_wwn, &info->m_addr.mta_phymask, &info->m_pdevhdl);
1615 1613
1616 1614 return (rval);
1617 1615 }
1618 1616
1619 1617 static int
1620 1618 mptsas_sasportpage_0_cb(mptsas_t *mpt, caddr_t page_memp,
1621 1619 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1622 1620 va_list ap)
1623 1621 {
1624 1622 #ifndef __lock_lint
1625 1623 _NOTE(ARGUNUSED(ap))
1626 1624 #endif
1627 1625 int rval = DDI_SUCCESS, i;
1628 1626 uint8_t *sas_addr = NULL;
1629 1627 uint64_t *sas_wwn;
1630 1628 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE];
1631 1629 uint8_t *portwidth;
1632 1630 pMpi2SasPortPage0_t sasportpage;
1633 1631
1634 1632 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1635 1633 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_port_page0 "
1636 1634 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1637 1635 iocstatus, iocloginfo);
1638 1636 rval = DDI_FAILURE;
1639 1637 return (rval);
1640 1638 }
1641 1639 sas_wwn = va_arg(ap, uint64_t *);
1642 1640 portwidth = va_arg(ap, uint8_t *);
1643 1641
1644 1642 sasportpage = (pMpi2SasPortPage0_t)page_memp;
1645 1643 sas_addr = (uint8_t *)(&sasportpage->SASAddress);
1646 1644 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) {
1647 1645 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i);
1648 1646 }
1649 1647 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE);
1650 1648 *sas_wwn = LE_64(*sas_wwn);
1651 1649 *portwidth = ddi_get8(accessp, &sasportpage->PortWidth);
1652 1650 return (rval);
1653 1651 }
1654 1652
1655 1653 /*
1656 1654 * Request MPI configuration page SAS port page 0 to get initiator SAS address
1657 1655 * and port width.
1658 1656 */
1659 1657 int
1660 1658 mptsas_get_sas_port_page0(mptsas_t *mpt, uint32_t page_address,
1661 1659 uint64_t *sas_wwn, uint8_t *portwidth)
1662 1660 {
1663 1661 int rval = DDI_SUCCESS;
1664 1662
1665 1663 ASSERT(mutex_owned(&mpt->m_mutex));
1666 1664
1667 1665 /*
1668 1666 * Get the header and config page. reply contains the reply frame,
1669 1667 * which holds status info for the request.
1670 1668 */
1671 1669 rval = mptsas_access_config_page(mpt,
1672 1670 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1673 1671 MPI2_CONFIG_EXTPAGETYPE_SAS_PORT, 0, page_address,
1674 1672 mptsas_sasportpage_0_cb, sas_wwn, portwidth);
1675 1673
1676 1674 return (rval);
1677 1675 }
1678 1676
1679 1677 static int
1680 1678 mptsas_sasiou_page_0_cb(mptsas_t *mpt, caddr_t page_memp,
1681 1679 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1682 1680 va_list ap)
1683 1681 {
1684 1682 #ifndef __lock_lint
1685 1683 _NOTE(ARGUNUSED(ap))
1686 1684 #endif
1687 1685 int rval = DDI_SUCCESS;
1688 1686 pMpi2SasIOUnitPage0_t sasioupage0;
1689 1687 int i, num_phys;
1690 1688 uint32_t cpdi[MPTSAS_MAX_PHYS], *retrypage0, *readpage1;
1691 1689 uint8_t port_flags;
1692 1690
1693 1691 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1694 1692 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_io_unit_page0 "
1695 1693 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1696 1694 iocstatus, iocloginfo);
1697 1695 rval = DDI_FAILURE;
1698 1696 return (rval);
1699 1697 }
1700 1698 readpage1 = va_arg(ap, uint32_t *);
1701 1699 retrypage0 = va_arg(ap, uint32_t *);
1702 1700
1703 1701 sasioupage0 = (pMpi2SasIOUnitPage0_t)page_memp;
1704 1702
1705 1703 num_phys = ddi_get8(accessp, &sasioupage0->NumPhys);
1706 1704 /*
1707 1705 * ASSERT that the num_phys value in SAS IO Unit Page 0 is the same as
1708 1706 * was initially set. This should never change throughout the life of
1709 1707 * the driver.
1710 1708 */
1711 1709 ASSERT(num_phys == mpt->m_num_phys);
1712 1710 for (i = 0; i < num_phys; i++) {
1713 1711 cpdi[i] = ddi_get32(accessp,
1714 1712 &sasioupage0->PhyData[i].
1715 1713 ControllerPhyDeviceInfo);
1716 1714 port_flags = ddi_get8(accessp,
1717 1715 &sasioupage0->PhyData[i].PortFlags);
1718 1716 mpt->m_phy_info[i].port_num =
1719 1717 ddi_get8(accessp,
1720 1718 &sasioupage0->PhyData[i].Port);
1721 1719 mpt->m_phy_info[i].ctrl_devhdl =
1722 1720 ddi_get16(accessp, &sasioupage0->
1723 1721 PhyData[i].ControllerDevHandle);
1724 1722 mpt->m_phy_info[i].attached_devhdl =
1725 1723 ddi_get16(accessp, &sasioupage0->
1726 1724 PhyData[i].AttachedDevHandle);
1727 1725 mpt->m_phy_info[i].phy_device_type = cpdi[i];
1728 1726 mpt->m_phy_info[i].port_flags = port_flags;
1729 1727
1730 1728 if (port_flags & DISCOVERY_IN_PROGRESS) {
1731 1729 *retrypage0 = *retrypage0 + 1;
1732 1730 break;
1733 1731 } else {
1734 1732 *retrypage0 = 0;
1735 1733 }
1736 1734 if (!(port_flags & AUTO_PORT_CONFIGURATION)) {
1737 1735 /*
1738 1736 * some PHY configuration described in
1739 1737 * SAS IO Unit Page1
1740 1738 */
1741 1739 *readpage1 = 1;
1742 1740 }
1743 1741 }
1744 1742
1745 1743 return (rval);
1746 1744 }
1747 1745
1748 1746 static int
1749 1747 mptsas_sasiou_page_1_cb(mptsas_t *mpt, caddr_t page_memp,
1750 1748 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1751 1749 va_list ap)
1752 1750 {
1753 1751 #ifndef __lock_lint
1754 1752 _NOTE(ARGUNUSED(ap))
1755 1753 #endif
1756 1754 int rval = DDI_SUCCESS;
1757 1755 pMpi2SasIOUnitPage1_t sasioupage1;
1758 1756 int i, num_phys;
1759 1757 uint32_t cpdi[MPTSAS_MAX_PHYS];
1760 1758 uint8_t port_flags;
1761 1759
1762 1760 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
1763 1761 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_io_unit_page1 "
1764 1762 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
1765 1763 iocstatus, iocloginfo);
1766 1764 rval = DDI_FAILURE;
1767 1765 return (rval);
1768 1766 }
1769 1767
1770 1768 sasioupage1 = (pMpi2SasIOUnitPage1_t)page_memp;
1771 1769 num_phys = ddi_get8(accessp, &sasioupage1->NumPhys);
1772 1770 /*
1773 1771 * ASSERT that the num_phys value in SAS IO Unit Page 1 is the same as
1774 1772 * was initially set. This should never change throughout the life of
1775 1773 * the driver.
1776 1774 */
1777 1775 ASSERT(num_phys == mpt->m_num_phys);
1778 1776 for (i = 0; i < num_phys; i++) {
1779 1777 cpdi[i] = ddi_get32(accessp, &sasioupage1->PhyData[i].
1780 1778 ControllerPhyDeviceInfo);
1781 1779 port_flags = ddi_get8(accessp,
1782 1780 &sasioupage1->PhyData[i].PortFlags);
1783 1781 mpt->m_phy_info[i].port_num =
1784 1782 ddi_get8(accessp,
1785 1783 &sasioupage1->PhyData[i].Port);
1786 1784 mpt->m_phy_info[i].port_flags = port_flags;
1787 1785 mpt->m_phy_info[i].phy_device_type = cpdi[i];
1788 1786 }
1789 1787 return (rval);
1790 1788 }
1791 1789
1792 1790 /*
1793 1791 * Read IO unit page 0 to get information for each PHY. If needed, Read IO Unit
1794 1792 * page1 to update the PHY information. This is the message passing method of
1795 1793 * this function which should be called except during initialization.
1796 1794 */
1797 1795 int
1798 1796 mptsas_get_sas_io_unit_page(mptsas_t *mpt)
1799 1797 {
1800 1798 int rval = DDI_SUCCESS, state;
1801 1799 uint32_t readpage1 = 0, retrypage0 = 0;
1802 1800
1803 1801 ASSERT(mutex_owned(&mpt->m_mutex));
1804 1802
1805 1803 /*
1806 1804 * Now we cycle through the state machine. Here's what happens:
1807 1805 * 1. Read IO unit page 0 and set phy information
1808 1806 * 2. See if Read IO unit page1 is needed because of port configuration
1809 1807 * 3. Read IO unit page 1 and update phy information.
1810 1808 */
1811 1809 state = IOUC_READ_PAGE0;
1812 1810 while (state != IOUC_DONE) {
1813 1811 if (state == IOUC_READ_PAGE0) {
1814 1812 rval = mptsas_access_config_page(mpt,
1815 1813 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1816 1814 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 0, 0,
1817 1815 mptsas_sasiou_page_0_cb, &readpage1,
1818 1816 &retrypage0);
1819 1817 } else if (state == IOUC_READ_PAGE1) {
1820 1818 rval = mptsas_access_config_page(mpt,
1821 1819 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
1822 1820 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 1, 0,
1823 1821 mptsas_sasiou_page_1_cb);
1824 1822 }
1825 1823
1826 1824 if (rval == DDI_SUCCESS) {
1827 1825 switch (state) {
1828 1826 case IOUC_READ_PAGE0:
1829 1827 /*
1830 1828 * retry 30 times if discovery is in process
1831 1829 */
1832 1830 if (retrypage0 && (retrypage0 < 30)) {
1833 1831 drv_usecwait(1000 * 100);
1834 1832 state = IOUC_READ_PAGE0;
1835 1833 break;
1836 1834 } else if (retrypage0 == 30) {
1837 1835 mptsas_log(mpt, CE_WARN,
1838 1836 "!Discovery in progress, can't "
1839 1837 "verify IO unit config, then "
1840 1838 "after 30 times retry, give "
1841 1839 "up!");
1842 1840 state = IOUC_DONE;
1843 1841 rval = DDI_FAILURE;
1844 1842 break;
1845 1843 }
1846 1844
1847 1845 if (readpage1 == 0) {
1848 1846 state = IOUC_DONE;
1849 1847 rval = DDI_SUCCESS;
1850 1848 break;
1851 1849 }
1852 1850
1853 1851 state = IOUC_READ_PAGE1;
1854 1852 break;
1855 1853
1856 1854 case IOUC_READ_PAGE1:
1857 1855 state = IOUC_DONE;
1858 1856 rval = DDI_SUCCESS;
1859 1857 break;
1860 1858 }
1861 1859 } else {
1862 1860 return (rval);
1863 1861 }
1864 1862 }
1865 1863
1866 1864 return (rval);
1867 1865 }
1868 1866
1869 1867 static int
1870 1868 mptsas_biospage_3_cb(mptsas_t *mpt, caddr_t page_memp,
1871 1869 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
1872 1870 va_list ap)
1873 1871 {
1874 1872 #ifndef __lock_lint
1875 1873 _NOTE(ARGUNUSED(ap))
1876 1874 #endif
1877 1875 pMpi2BiosPage3_t sasbiospage;
1878 1876 int rval = DDI_SUCCESS;
1879 1877 uint32_t *bios_version;
1880 1878
1881 1879 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
1882 1880 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
1883 1881 mptsas_log(mpt, CE_WARN, "mptsas_get_bios_page3 header: "
1884 1882 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus, iocloginfo);
1885 1883 rval = DDI_FAILURE;
1886 1884 return (rval);
1887 1885 }
1888 1886 bios_version = va_arg(ap, uint32_t *);
1889 1887 sasbiospage = (pMpi2BiosPage3_t)page_memp;
1890 1888 *bios_version = ddi_get32(accessp, &sasbiospage->BiosVersion);
1891 1889
1892 1890 return (rval);
1893 1891 }
1894 1892
1895 1893 /*
1896 1894 * Request MPI configuration page BIOS page 3 to get BIOS version. Since all
1897 1895 * other information in this page is not needed, just ignore it.
1898 1896 */
1899 1897 int
1900 1898 mptsas_get_bios_page3(mptsas_t *mpt, uint32_t *bios_version)
1901 1899 {
1902 1900 int rval = DDI_SUCCESS;
1903 1901
1904 1902 ASSERT(mutex_owned(&mpt->m_mutex));
1905 1903
1906 1904 /*
1907 1905 * Get the header and config page. reply contains the reply frame,
1908 1906 * which holds status info for the request.
1909 1907 */
1910 1908 rval = mptsas_access_config_page(mpt,
1911 1909 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, MPI2_CONFIG_PAGETYPE_BIOS, 3,
1912 1910 0, mptsas_biospage_3_cb, bios_version);
1913 1911
1914 1912 return (rval);
1915 1913 }
1916 1914
1917 1915 /*
1918 1916 * Read IO unit page 0 to get information for each PHY. If needed, Read IO Unit
1919 1917 * page1 to update the PHY information. This is the handshaking version of
1920 1918 * this function, which should be called during initialization only.
1921 1919 */
1922 1920 int
1923 1921 mptsas_get_sas_io_unit_page_hndshk(mptsas_t *mpt)
1924 1922 {
1925 1923 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs;
1926 1924 ddi_dma_cookie_t page_cookie;
1927 1925 ddi_dma_handle_t recv_dma_handle, page_dma_handle;
1928 1926 ddi_acc_handle_t recv_accessp, page_accessp;
1929 1927 pMpi2ConfigReply_t configreply;
1930 1928 pMpi2SasIOUnitPage0_t sasioupage0;
1931 1929 pMpi2SasIOUnitPage1_t sasioupage1;
1932 1930 int recv_numbytes;
1933 1931 caddr_t recv_memp, page_memp;
1934 1932 int i, num_phys, start_phy = 0;
1935 1933 int page0_size =
1936 1934 sizeof (MPI2_CONFIG_PAGE_SASIOUNIT_0) +
1937 1935 (sizeof (MPI2_SAS_IO_UNIT0_PHY_DATA) * (MPTSAS_MAX_PHYS - 1));
1938 1936 int page1_size =
1939 1937 sizeof (MPI2_CONFIG_PAGE_SASIOUNIT_1) +
1940 1938 (sizeof (MPI2_SAS_IO_UNIT1_PHY_DATA) * (MPTSAS_MAX_PHYS - 1));
1941 1939 uint32_t flags_length;
1942 1940 uint32_t cpdi[MPTSAS_MAX_PHYS];
1943 1941 uint32_t readpage1 = 0, retrypage0 = 0;
1944 1942 uint16_t iocstatus;
1945 1943 uint8_t port_flags, page_number, action;
1946 1944 uint32_t reply_size = 256; /* Big enough for any page */
1947 1945 uint_t state;
1948 1946 int rval = DDI_FAILURE;
1949 1947 boolean_t free_recv = B_FALSE, free_page = B_FALSE;
1950 1948
1951 1949 /*
1952 1950 * Initialize our "state machine". This is a bit convoluted,
1953 1951 * but it keeps us from having to do the ddi allocations numerous
1954 1952 * times.
1955 1953 */
1956 1954
1957 1955 NDBG20(("mptsas_get_sas_io_unit_page_hndshk enter"));
1958 1956 ASSERT(mutex_owned(&mpt->m_mutex));
1959 1957 state = IOUC_READ_PAGE0;
1960 1958
1961 1959 /*
1962 1960 * dynamically create a customized dma attribute structure
1963 1961 * that describes mpt's config reply page request structure.
1964 1962 */
1965 1963 recv_dma_attrs = mpt->m_msg_dma_attr;
1966 1964 recv_dma_attrs.dma_attr_sgllen = 1;
1967 1965 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY));
1968 1966
1969 1967 if (mptsas_dma_addr_create(mpt, recv_dma_attrs,
1970 1968 &recv_dma_handle, &recv_accessp, &recv_memp,
1971 1969 (sizeof (MPI2_CONFIG_REPLY)), NULL) == FALSE) {
1972 1970 mptsas_log(mpt, CE_WARN,
1973 1971 "mptsas_get_sas_io_unit_page_hndshk: recv dma failed");
1974 1972 goto cleanup;
1975 1973 }
1976 1974 /* Now safe to call mptsas_dma_addr_destroy(recv_dma_handle). */
1977 1975 free_recv = B_TRUE;
1978 1976
1979 1977 page_dma_attrs = mpt->m_msg_dma_attr;
1980 1978 page_dma_attrs.dma_attr_sgllen = 1;
1981 1979 page_dma_attrs.dma_attr_granular = reply_size;
1982 1980
1983 1981 if (mptsas_dma_addr_create(mpt, page_dma_attrs,
1984 1982 &page_dma_handle, &page_accessp, &page_memp,
1985 1983 reply_size, &page_cookie) == FALSE) {
1986 1984 mptsas_log(mpt, CE_WARN,
1987 1985 "mptsas_get_sas_io_unit_page_hndshk: page dma failed");
1988 1986 goto cleanup;
1989 1987 }
1990 1988 /* Now safe to call mptsas_dma_addr_destroy(page_dma_handle). */
1991 1989 free_page = B_TRUE;
1992 1990
1993 1991 /*
1994 1992 * Now we cycle through the state machine. Here's what happens:
1995 1993 * 1. Read IO unit page 0 and set phy information
1996 1994 * 2. See if Read IO unit page1 is needed because of port configuration
1997 1995 * 3. Read IO unit page 1 and update phy information.
1998 1996 */
1999 1997
2000 1998 sasioupage0 = (pMpi2SasIOUnitPage0_t)page_memp;
2001 1999 sasioupage1 = (pMpi2SasIOUnitPage1_t)page_memp;
2002 2000
2003 2001 while (state != IOUC_DONE) {
2004 2002 switch (state) {
2005 2003 case IOUC_READ_PAGE0:
2006 2004 page_number = 0;
2007 2005 action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
2008 2006 flags_length = (uint32_t)page0_size;
2009 2007 flags_length |= ((uint32_t)(
2010 2008 MPI2_SGE_FLAGS_LAST_ELEMENT |
2011 2009 MPI2_SGE_FLAGS_END_OF_BUFFER |
2012 2010 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2013 2011 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
2014 2012 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2015 2013 MPI2_SGE_FLAGS_IOC_TO_HOST |
2016 2014 MPI2_SGE_FLAGS_END_OF_LIST) <<
2017 2015 MPI2_SGE_FLAGS_SHIFT);
2018 2016
2019 2017 break;
2020 2018
2021 2019 case IOUC_READ_PAGE1:
2022 2020 page_number = 1;
2023 2021 action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
2024 2022 flags_length = (uint32_t)page1_size;
2025 2023 flags_length |= ((uint32_t)(
2026 2024 MPI2_SGE_FLAGS_LAST_ELEMENT |
2027 2025 MPI2_SGE_FLAGS_END_OF_BUFFER |
2028 2026 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2029 2027 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
2030 2028 MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2031 2029 MPI2_SGE_FLAGS_IOC_TO_HOST |
2032 2030 MPI2_SGE_FLAGS_END_OF_LIST) <<
2033 2031 MPI2_SGE_FLAGS_SHIFT);
2034 2032
2035 2033 break;
2036 2034 default:
2037 2035 break;
2038 2036 }
2039 2037
2040 2038 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY));
2041 2039 configreply = (pMpi2ConfigReply_t)recv_memp;
2042 2040 recv_numbytes = sizeof (MPI2_CONFIG_REPLY);
2043 2041
2044 2042 if (mptsas_send_extended_config_request_msg(mpt,
2045 2043 MPI2_CONFIG_ACTION_PAGE_HEADER,
2046 2044 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT,
2047 2045 0, page_number, 0, 0, 0, 0)) {
2048 2046 goto cleanup;
2049 2047 }
2050 2048
2051 2049 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2052 2050 recv_accessp)) {
2053 2051 goto cleanup;
2054 2052 }
2055 2053
2056 2054 iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus);
2057 2055 iocstatus = MPTSAS_IOCSTATUS(iocstatus);
2058 2056
2059 2057 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
2060 2058 mptsas_log(mpt, CE_WARN,
2061 2059 "mptsas_get_sas_io_unit_page_hndshk: read page "
2062 2060 "header iocstatus = 0x%x", iocstatus);
2063 2061 goto cleanup;
2064 2062 }
2065 2063
2066 2064 if (action != MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) {
2067 2065 bzero(page_memp, reply_size);
2068 2066 }
2069 2067
2070 2068 if (mptsas_send_extended_config_request_msg(mpt, action,
2071 2069 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 0, page_number,
2072 2070 ddi_get8(recv_accessp, &configreply->Header.PageVersion),
2073 2071 ddi_get16(recv_accessp, &configreply->ExtPageLength),
2074 2072 flags_length, page_cookie.dmac_laddress)) {
2075 2073 goto cleanup;
2076 2074 }
2077 2075
2078 2076 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2079 2077 recv_accessp)) {
2080 2078 goto cleanup;
2081 2079 }
2082 2080
2083 2081 iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus);
2084 2082 iocstatus = MPTSAS_IOCSTATUS(iocstatus);
2085 2083
2086 2084 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) {
2087 2085 mptsas_log(mpt, CE_WARN,
2088 2086 "mptsas_get_sas_io_unit_page_hndshk: IO unit "
2089 2087 "config failed for action %d, iocstatus = 0x%x",
2090 2088 action, iocstatus);
2091 2089 goto cleanup;
2092 2090 }
2093 2091
2094 2092 switch (state) {
2095 2093 case IOUC_READ_PAGE0:
2096 2094 if ((ddi_dma_sync(page_dma_handle, 0, 0,
2097 2095 DDI_DMA_SYNC_FORCPU)) != DDI_SUCCESS) {
2098 2096 goto cleanup;
2099 2097 }
2100 2098
2101 2099 num_phys = ddi_get8(page_accessp,
2102 2100 &sasioupage0->NumPhys);
2103 2101 ASSERT(num_phys == mpt->m_num_phys);
2104 2102 if (num_phys > MPTSAS_MAX_PHYS) {
2105 2103 mptsas_log(mpt, CE_WARN, "Number of phys "
2106 2104 "supported by HBA (%d) is more than max "
2107 2105 "supported by driver (%d). Driver will "
2108 2106 "not attach.", num_phys,
2109 2107 MPTSAS_MAX_PHYS);
2110 2108 rval = DDI_FAILURE;
2111 2109 goto cleanup;
2112 2110 }
2113 2111 for (i = start_phy; i < num_phys; i++, start_phy = i) {
2114 2112 cpdi[i] = ddi_get32(page_accessp,
2115 2113 &sasioupage0->PhyData[i].
2116 2114 ControllerPhyDeviceInfo);
2117 2115 port_flags = ddi_get8(page_accessp,
2118 2116 &sasioupage0->PhyData[i].PortFlags);
2119 2117
2120 2118 mpt->m_phy_info[i].port_num =
2121 2119 ddi_get8(page_accessp,
2122 2120 &sasioupage0->PhyData[i].Port);
2123 2121 mpt->m_phy_info[i].ctrl_devhdl =
2124 2122 ddi_get16(page_accessp, &sasioupage0->
2125 2123 PhyData[i].ControllerDevHandle);
2126 2124 mpt->m_phy_info[i].attached_devhdl =
2127 2125 ddi_get16(page_accessp, &sasioupage0->
2128 2126 PhyData[i].AttachedDevHandle);
2129 2127 mpt->m_phy_info[i].phy_device_type = cpdi[i];
2130 2128 mpt->m_phy_info[i].port_flags = port_flags;
2131 2129
2132 2130 if (port_flags & DISCOVERY_IN_PROGRESS) {
2133 2131 retrypage0++;
2134 2132 NDBG20(("Discovery in progress, can't "
2135 2133 "verify IO unit config, then NO.%d"
2136 2134 " times retry", retrypage0));
2137 2135 break;
2138 2136 } else {
2139 2137 retrypage0 = 0;
2140 2138 }
2141 2139 if (!(port_flags & AUTO_PORT_CONFIGURATION)) {
2142 2140 /*
2143 2141 * some PHY configuration described in
2144 2142 * SAS IO Unit Page1
2145 2143 */
2146 2144 readpage1 = 1;
2147 2145 }
2148 2146 }
2149 2147
2150 2148 /*
2151 2149 * retry 30 times if discovery is in process
2152 2150 */
2153 2151 if (retrypage0 && (retrypage0 < 30)) {
2154 2152 drv_usecwait(1000 * 100);
2155 2153 state = IOUC_READ_PAGE0;
2156 2154 break;
2157 2155 } else if (retrypage0 == 30) {
2158 2156 mptsas_log(mpt, CE_WARN,
2159 2157 "!Discovery in progress, can't "
2160 2158 "verify IO unit config, then after"
2161 2159 " 30 times retry, give up!");
2162 2160 state = IOUC_DONE;
2163 2161 rval = DDI_FAILURE;
2164 2162 break;
2165 2163 }
2166 2164
2167 2165 if (readpage1 == 0) {
2168 2166 state = IOUC_DONE;
2169 2167 rval = DDI_SUCCESS;
2170 2168 break;
2171 2169 }
2172 2170
2173 2171 state = IOUC_READ_PAGE1;
2174 2172 break;
2175 2173
2176 2174 case IOUC_READ_PAGE1:
2177 2175 if ((ddi_dma_sync(page_dma_handle, 0, 0,
2178 2176 DDI_DMA_SYNC_FORCPU)) != DDI_SUCCESS) {
2179 2177 goto cleanup;
2180 2178 }
2181 2179
2182 2180 num_phys = ddi_get8(page_accessp,
2183 2181 &sasioupage1->NumPhys);
2184 2182 ASSERT(num_phys == mpt->m_num_phys);
2185 2183 if (num_phys > MPTSAS_MAX_PHYS) {
2186 2184 mptsas_log(mpt, CE_WARN, "Number of phys "
2187 2185 "supported by HBA (%d) is more than max "
2188 2186 "supported by driver (%d). Driver will "
2189 2187 "not attach.", num_phys,
2190 2188 MPTSAS_MAX_PHYS);
2191 2189 rval = DDI_FAILURE;
2192 2190 goto cleanup;
2193 2191 }
2194 2192 for (i = 0; i < num_phys; i++) {
2195 2193 cpdi[i] = ddi_get32(page_accessp,
2196 2194 &sasioupage1->PhyData[i].
2197 2195 ControllerPhyDeviceInfo);
2198 2196 port_flags = ddi_get8(page_accessp,
2199 2197 &sasioupage1->PhyData[i].PortFlags);
2200 2198 mpt->m_phy_info[i].port_num =
2201 2199 ddi_get8(page_accessp,
2202 2200 &sasioupage1->PhyData[i].Port);
2203 2201 mpt->m_phy_info[i].port_flags = port_flags;
2204 2202 mpt->m_phy_info[i].phy_device_type = cpdi[i];
2205 2203
2206 2204 }
2207 2205
2208 2206 state = IOUC_DONE;
2209 2207 rval = DDI_SUCCESS;
2210 2208 break;
2211 2209 }
2212 2210 }
2213 2211 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) ||
2214 2212 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) {
2215 2213 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2216 2214 rval = DDI_FAILURE;
2217 2215 goto cleanup;
2218 2216 }
2219 2217 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) ||
2220 2218 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) {
2221 2219 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2222 2220 rval = DDI_FAILURE;
2223 2221 goto cleanup;
2224 2222 }
2225 2223
2226 2224 cleanup:
2227 2225 if (free_recv)
2228 2226 mptsas_dma_addr_destroy(&recv_dma_handle, &recv_accessp);
2229 2227 if (free_page)
2230 2228 mptsas_dma_addr_destroy(&page_dma_handle, &page_accessp);
2231 2229 if (rval != DDI_SUCCESS) {
2232 2230 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE);
2233 2231 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST);
2234 2232 }
2235 2233 return (rval);
2236 2234 }
2237 2235
2238 2236 /*
2239 2237 * mptsas_get_manufacture_page5
2240 2238 *
2241 2239 * This function will retrieve the base WWID from the adapter. Since this
2242 2240 * function is only called during the initialization process, use handshaking.
2243 2241 */
2244 2242 int
2245 2243 mptsas_get_manufacture_page5(mptsas_t *mpt)
2246 2244 {
2247 2245 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs;
2248 2246 ddi_dma_cookie_t page_cookie;
2249 2247 ddi_dma_handle_t recv_dma_handle, page_dma_handle;
2250 2248 ddi_acc_handle_t recv_accessp, page_accessp;
2251 2249 pMpi2ConfigReply_t configreply;
2252 2250 caddr_t recv_memp, page_memp;
2253 2251 int recv_numbytes;
2254 2252 pMpi2ManufacturingPage5_t m5;
2255 2253 uint32_t flagslength;
2256 2254 int rval = DDI_SUCCESS;
2257 2255 uint_t iocstatus;
2258 2256 boolean_t free_recv = B_FALSE, free_page = B_FALSE;
2259 2257
2260 2258 MPTSAS_DISABLE_INTR(mpt);
2261 2259
2262 2260 if (mptsas_send_config_request_msg(mpt, MPI2_CONFIG_ACTION_PAGE_HEADER,
2263 2261 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 5, 0, 0, 0, 0)) {
2264 2262 rval = DDI_FAILURE;
2265 2263 goto done;
2266 2264 }
2267 2265
2268 2266 /*
2269 2267 * dynamically create a customized dma attribute structure
2270 2268 * that describes the MPT's config reply page request structure.
2271 2269 */
2272 2270 recv_dma_attrs = mpt->m_msg_dma_attr;
2273 2271 recv_dma_attrs.dma_attr_sgllen = 1;
2274 2272 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY));
2275 2273
2276 2274 if (mptsas_dma_addr_create(mpt, recv_dma_attrs,
2277 2275 &recv_dma_handle, &recv_accessp, &recv_memp,
2278 2276 (sizeof (MPI2_CONFIG_REPLY)), NULL) == FALSE) {
2279 2277 rval = DDI_FAILURE;
2280 2278 goto done;
2281 2279 }
2282 2280 /* Now safe to call mptsas_dma_addr_destroy(recv_dma_handle). */
2283 2281 free_recv = B_TRUE;
2284 2282
2285 2283 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY));
2286 2284 configreply = (pMpi2ConfigReply_t)recv_memp;
2287 2285 recv_numbytes = sizeof (MPI2_CONFIG_REPLY);
2288 2286
2289 2287 /*
2290 2288 * get config reply message
2291 2289 */
2292 2290 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2293 2291 recv_accessp)) {
2294 2292 rval = DDI_FAILURE;
2295 2293 goto done;
2296 2294 }
2297 2295
2298 2296 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2299 2297 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 update: "
2300 2298 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2301 2299 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2302 2300 goto done;
2303 2301 }
2304 2302
2305 2303 /*
2306 2304 * dynamically create a customized dma attribute structure
2307 2305 * that describes the MPT's config page structure.
2308 2306 */
2309 2307 page_dma_attrs = mpt->m_msg_dma_attr;
2310 2308 page_dma_attrs.dma_attr_sgllen = 1;
2311 2309 page_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_PAGE_MAN_5));
2312 2310
2313 2311 if (mptsas_dma_addr_create(mpt, page_dma_attrs, &page_dma_handle,
2314 2312 &page_accessp, &page_memp, (sizeof (MPI2_CONFIG_PAGE_MAN_5)),
2315 2313 &page_cookie) == FALSE) {
2316 2314 rval = DDI_FAILURE;
2317 2315 goto done;
2318 2316 }
2319 2317 /* Now safe to call mptsas_dma_addr_destroy(page_dma_handle). */
2320 2318 free_page = B_TRUE;
2321 2319
2322 2320 bzero(page_memp, sizeof (MPI2_CONFIG_PAGE_MAN_5));
2323 2321 m5 = (pMpi2ManufacturingPage5_t)page_memp;
2324 2322 NDBG20(("mptsas_get_manufacture_page5: paddr 0x%p",
2325 2323 (void *)(uintptr_t)page_cookie.dmac_laddress));
2326 2324
2327 2325 /*
2328 2326 * Give reply address to IOC to store config page in and send
2329 2327 * config request out.
2330 2328 */
2331 2329
2332 2330 flagslength = sizeof (MPI2_CONFIG_PAGE_MAN_5);
2333 2331 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
2334 2332 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2335 2333 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2336 2334 MPI2_SGE_FLAGS_IOC_TO_HOST |
2337 2335 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
2338 2336
2339 2337 if (mptsas_send_config_request_msg(mpt,
2340 2338 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2341 2339 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 5,
2342 2340 ddi_get8(recv_accessp, &configreply->Header.PageVersion),
2343 2341 ddi_get8(recv_accessp, &configreply->Header.PageLength),
2344 2342 flagslength, page_cookie.dmac_laddress)) {
2345 2343 rval = DDI_FAILURE;
2346 2344 goto done;
2347 2345 }
2348 2346
2349 2347 /*
2350 2348 * get reply view handshake
2351 2349 */
2352 2350 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2353 2351 recv_accessp)) {
2354 2352 rval = DDI_FAILURE;
2355 2353 goto done;
2356 2354 }
2357 2355
2358 2356 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2359 2357 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 config: "
2360 2358 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2361 2359 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2362 2360 goto done;
2363 2361 }
2364 2362
2365 2363 (void) ddi_dma_sync(page_dma_handle, 0, 0, DDI_DMA_SYNC_FORCPU);
2366 2364
2367 2365 /*
2368 2366 * Fusion-MPT stores fields in little-endian format. This is
2369 2367 * why the low-order 32 bits are stored first.
2370 2368 */
2371 2369 mpt->un.sasaddr.m_base_wwid_lo =
2372 2370 ddi_get32(page_accessp, (uint32_t *)(void *)&m5->Phy[0].WWID);
2373 2371 mpt->un.sasaddr.m_base_wwid_hi =
2374 2372 ddi_get32(page_accessp, (uint32_t *)(void *)&m5->Phy[0].WWID + 1);
2375 2373
2376 2374 if (ddi_prop_update_int64(DDI_DEV_T_NONE, mpt->m_dip,
2377 2375 "base-wwid", mpt->un.m_base_wwid) != DDI_PROP_SUCCESS) {
2378 2376 NDBG2(("%s%d: failed to create base-wwid property",
2379 2377 ddi_driver_name(mpt->m_dip), ddi_get_instance(mpt->m_dip)));
2380 2378 }
2381 2379
2382 2380 /*
2383 2381 * Set the number of PHYs present.
2384 2382 */
2385 2383 mpt->m_num_phys = ddi_get8(page_accessp, (uint8_t *)&m5->NumPhys);
2386 2384
2387 2385 if (ddi_prop_update_int(DDI_DEV_T_NONE, mpt->m_dip,
2388 2386 "num-phys", mpt->m_num_phys) != DDI_PROP_SUCCESS) {
2389 2387 NDBG2(("%s%d: failed to create num-phys property",
2390 2388 ddi_driver_name(mpt->m_dip), ddi_get_instance(mpt->m_dip)));
2391 2389 }
2392 2390
2393 2391 mptsas_log(mpt, CE_NOTE, "!mpt%d: Initiator WWNs: 0x%016llx-0x%016llx",
2394 2392 mpt->m_instance, (unsigned long long)mpt->un.m_base_wwid,
2395 2393 (unsigned long long)mpt->un.m_base_wwid + mpt->m_num_phys - 1);
2396 2394
2397 2395 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) ||
2398 2396 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) {
2399 2397 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2400 2398 rval = DDI_FAILURE;
2401 2399 goto done;
2402 2400 }
2403 2401 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) ||
2404 2402 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) {
2405 2403 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2406 2404 rval = DDI_FAILURE;
2407 2405 }
2408 2406 done:
2409 2407 /*
2410 2408 * free up memory
2411 2409 */
2412 2410 if (free_recv)
2413 2411 mptsas_dma_addr_destroy(&recv_dma_handle, &recv_accessp);
2414 2412 if (free_page)
2415 2413 mptsas_dma_addr_destroy(&page_dma_handle, &page_accessp);
2416 2414 MPTSAS_ENABLE_INTR(mpt);
2417 2415
2418 2416 return (rval);
2419 2417 }
2420 2418
2421 2419 static int
2422 2420 mptsas_sasphypage_0_cb(mptsas_t *mpt, caddr_t page_memp,
2423 2421 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
2424 2422 va_list ap)
2425 2423 {
2426 2424 #ifndef __lock_lint
2427 2425 _NOTE(ARGUNUSED(ap))
2428 2426 #endif
2429 2427 pMpi2SasPhyPage0_t sasphypage;
2430 2428 int rval = DDI_SUCCESS;
2431 2429 uint16_t *owner_devhdl, *attached_devhdl;
2432 2430 uint8_t *attached_phy_identify;
2433 2431 uint32_t *attached_phy_info;
2434 2432 uint8_t *programmed_link_rate;
2435 2433 uint8_t *hw_link_rate;
2436 2434 uint8_t *change_count;
2437 2435 uint32_t *phy_info;
2438 2436 uint8_t *negotiated_link_rate;
2439 2437 uint32_t page_address;
2440 2438
2441 2439 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
2442 2440 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
2443 2441 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page0 "
2444 2442 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
2445 2443 iocstatus, iocloginfo);
2446 2444 rval = DDI_FAILURE;
2447 2445 return (rval);
2448 2446 }
2449 2447 page_address = va_arg(ap, uint32_t);
2450 2448 /*
2451 2449 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
2452 2450 * are no more pages. If everything is OK up to this point but the
2453 2451 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
2454 2452 * signal that device traversal is complete.
2455 2453 */
2456 2454 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
2457 2455 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) ==
2458 2456 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) {
2459 2457 mpt->m_done_traverse_smp = 1;
2460 2458 }
2461 2459 rval = DDI_FAILURE;
2462 2460 return (rval);
2463 2461 }
2464 2462 owner_devhdl = va_arg(ap, uint16_t *);
2465 2463 attached_devhdl = va_arg(ap, uint16_t *);
2466 2464 attached_phy_identify = va_arg(ap, uint8_t *);
2467 2465 attached_phy_info = va_arg(ap, uint32_t *);
2468 2466 programmed_link_rate = va_arg(ap, uint8_t *);
2469 2467 hw_link_rate = va_arg(ap, uint8_t *);
2470 2468 change_count = va_arg(ap, uint8_t *);
2471 2469 phy_info = va_arg(ap, uint32_t *);
2472 2470 negotiated_link_rate = va_arg(ap, uint8_t *);
2473 2471
2474 2472 sasphypage = (pMpi2SasPhyPage0_t)page_memp;
2475 2473
2476 2474 *owner_devhdl =
2477 2475 ddi_get16(accessp, &sasphypage->OwnerDevHandle);
2478 2476 *attached_devhdl =
2479 2477 ddi_get16(accessp, &sasphypage->AttachedDevHandle);
2480 2478 *attached_phy_identify =
2481 2479 ddi_get8(accessp, &sasphypage->AttachedPhyIdentifier);
2482 2480 *attached_phy_info =
2483 2481 ddi_get32(accessp, &sasphypage->AttachedPhyInfo);
2484 2482 *programmed_link_rate =
2485 2483 ddi_get8(accessp, &sasphypage->ProgrammedLinkRate);
2486 2484 *hw_link_rate =
2487 2485 ddi_get8(accessp, &sasphypage->HwLinkRate);
2488 2486 *change_count =
2489 2487 ddi_get8(accessp, &sasphypage->ChangeCount);
2490 2488 *phy_info =
2491 2489 ddi_get32(accessp, &sasphypage->PhyInfo);
2492 2490 *negotiated_link_rate =
2493 2491 ddi_get8(accessp, &sasphypage->NegotiatedLinkRate);
2494 2492
2495 2493 return (rval);
2496 2494 }
2497 2495
2498 2496 /*
2499 2497 * Request MPI configuration page SAS phy page 0 to get DevHandle, phymask
2500 2498 * and SAS address.
2501 2499 */
2502 2500 int
2503 2501 mptsas_get_sas_phy_page0(mptsas_t *mpt, uint32_t page_address,
2504 2502 smhba_info_t *info)
2505 2503 {
2506 2504 int rval = DDI_SUCCESS;
2507 2505
2508 2506 ASSERT(mutex_owned(&mpt->m_mutex));
2509 2507
2510 2508 /*
2511 2509 * Get the header and config page. reply contains the reply frame,
2512 2510 * which holds status info for the request.
2513 2511 */
2514 2512 rval = mptsas_access_config_page(mpt,
2515 2513 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2516 2514 MPI2_CONFIG_EXTPAGETYPE_SAS_PHY, 0, page_address,
2517 2515 mptsas_sasphypage_0_cb, page_address, &info->owner_devhdl,
2518 2516 &info->attached_devhdl, &info->attached_phy_identify,
2519 2517 &info->attached_phy_info, &info->programmed_link_rate,
2520 2518 &info->hw_link_rate, &info->change_count,
2521 2519 &info->phy_info, &info->negotiated_link_rate);
2522 2520
2523 2521 return (rval);
2524 2522 }
2525 2523
2526 2524 static int
2527 2525 mptsas_sasphypage_1_cb(mptsas_t *mpt, caddr_t page_memp,
2528 2526 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo,
2529 2527 va_list ap)
2530 2528 {
2531 2529 #ifndef __lock_lint
2532 2530 _NOTE(ARGUNUSED(ap))
2533 2531 #endif
2534 2532 pMpi2SasPhyPage1_t sasphypage;
2535 2533 int rval = DDI_SUCCESS;
2536 2534
2537 2535 uint32_t *invalid_dword_count;
2538 2536 uint32_t *running_disparity_error_count;
2539 2537 uint32_t *loss_of_dword_sync_count;
2540 2538 uint32_t *phy_reset_problem_count;
2541 2539 uint32_t page_address;
2542 2540
2543 2541 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) &&
2544 2542 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) {
2545 2543 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page1 "
2546 2544 "config: IOCStatus=0x%x, IOCLogInfo=0x%x",
2547 2545 iocstatus, iocloginfo);
2548 2546 rval = DDI_FAILURE;
2549 2547 return (rval);
2550 2548 }
2551 2549 page_address = va_arg(ap, uint32_t);
2552 2550 /*
2553 2551 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there
2554 2552 * are no more pages. If everything is OK up to this point but the
2555 2553 * status is INVALID_PAGE, change rval to FAILURE and quit. Also,
2556 2554 * signal that device traversal is complete.
2557 2555 */
2558 2556 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) {
2559 2557 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) ==
2560 2558 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) {
2561 2559 mpt->m_done_traverse_smp = 1;
2562 2560 }
2563 2561 rval = DDI_FAILURE;
2564 2562 return (rval);
2565 2563 }
2566 2564
2567 2565 invalid_dword_count = va_arg(ap, uint32_t *);
2568 2566 running_disparity_error_count = va_arg(ap, uint32_t *);
2569 2567 loss_of_dword_sync_count = va_arg(ap, uint32_t *);
2570 2568 phy_reset_problem_count = va_arg(ap, uint32_t *);
2571 2569
2572 2570 sasphypage = (pMpi2SasPhyPage1_t)page_memp;
2573 2571
2574 2572 *invalid_dword_count =
2575 2573 ddi_get32(accessp, &sasphypage->InvalidDwordCount);
2576 2574 *running_disparity_error_count =
2577 2575 ddi_get32(accessp, &sasphypage->RunningDisparityErrorCount);
2578 2576 *loss_of_dword_sync_count =
2579 2577 ddi_get32(accessp, &sasphypage->LossDwordSynchCount);
2580 2578 *phy_reset_problem_count =
2581 2579 ddi_get32(accessp, &sasphypage->PhyResetProblemCount);
2582 2580
2583 2581 return (rval);
2584 2582 }
2585 2583
2586 2584 /*
2587 2585 * Request MPI configuration page SAS phy page 0 to get DevHandle, phymask
2588 2586 * and SAS address.
2589 2587 */
2590 2588 int
2591 2589 mptsas_get_sas_phy_page1(mptsas_t *mpt, uint32_t page_address,
2592 2590 smhba_info_t *info)
2593 2591 {
2594 2592 int rval = DDI_SUCCESS;
2595 2593
2596 2594 ASSERT(mutex_owned(&mpt->m_mutex));
2597 2595
2598 2596 /*
2599 2597 * Get the header and config page. reply contains the reply frame,
2600 2598 * which holds status info for the request.
2601 2599 */
2602 2600 rval = mptsas_access_config_page(mpt,
2603 2601 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2604 2602 MPI2_CONFIG_EXTPAGETYPE_SAS_PHY, 1, page_address,
2605 2603 mptsas_sasphypage_1_cb, page_address,
2606 2604 &info->invalid_dword_count,
2607 2605 &info->running_disparity_error_count,
2608 2606 &info->loss_of_dword_sync_count,
2609 2607 &info->phy_reset_problem_count);
2610 2608
2611 2609 return (rval);
2612 2610 }
2613 2611 /*
2614 2612 * mptsas_get_manufacture_page0
2615 2613 *
2616 2614 * This function will retrieve the base
2617 2615 * Chip name, Board Name,Board Trace number from the adapter.
2618 2616 * Since this function is only called during the
2619 2617 * initialization process, use handshaking.
2620 2618 */
2621 2619 int
2622 2620 mptsas_get_manufacture_page0(mptsas_t *mpt)
2623 2621 {
2624 2622 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs;
2625 2623 ddi_dma_cookie_t page_cookie;
2626 2624 ddi_dma_handle_t recv_dma_handle, page_dma_handle;
2627 2625 ddi_acc_handle_t recv_accessp, page_accessp;
2628 2626 pMpi2ConfigReply_t configreply;
2629 2627 caddr_t recv_memp, page_memp;
2630 2628 int recv_numbytes;
2631 2629 pMpi2ManufacturingPage0_t m0;
2632 2630 uint32_t flagslength;
2633 2631 int rval = DDI_SUCCESS;
2634 2632 uint_t iocstatus;
2635 2633 uint8_t i = 0;
2636 2634 boolean_t free_recv = B_FALSE, free_page = B_FALSE;
2637 2635
2638 2636 MPTSAS_DISABLE_INTR(mpt);
2639 2637
2640 2638 if (mptsas_send_config_request_msg(mpt, MPI2_CONFIG_ACTION_PAGE_HEADER,
2641 2639 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 0, 0, 0, 0, 0)) {
2642 2640 rval = DDI_FAILURE;
2643 2641 goto done;
2644 2642 }
2645 2643
2646 2644 /*
2647 2645 * dynamically create a customized dma attribute structure
2648 2646 * that describes the MPT's config reply page request structure.
2649 2647 */
2650 2648 recv_dma_attrs = mpt->m_msg_dma_attr;
2651 2649 recv_dma_attrs.dma_attr_sgllen = 1;
2652 2650 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY));
2653 2651
2654 2652 if (mptsas_dma_addr_create(mpt, recv_dma_attrs, &recv_dma_handle,
2655 2653 &recv_accessp, &recv_memp, (sizeof (MPI2_CONFIG_REPLY)),
2656 2654 NULL) == FALSE) {
2657 2655 rval = DDI_FAILURE;
2658 2656 goto done;
2659 2657 }
2660 2658 /* Now safe to call mptsas_dma_addr_destroy(recv_dma_handle). */
2661 2659 free_recv = B_TRUE;
2662 2660
2663 2661 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY));
2664 2662 configreply = (pMpi2ConfigReply_t)recv_memp;
2665 2663 recv_numbytes = sizeof (MPI2_CONFIG_REPLY);
2666 2664
2667 2665 /*
2668 2666 * get config reply message
2669 2667 */
2670 2668 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2671 2669 recv_accessp)) {
2672 2670 rval = DDI_FAILURE;
2673 2671 goto done;
2674 2672 }
2675 2673
2676 2674 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2677 2675 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 update: "
2678 2676 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2679 2677 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2680 2678 goto done;
2681 2679 }
2682 2680
2683 2681 /*
2684 2682 * dynamically create a customized dma attribute structure
2685 2683 * that describes the MPT's config page structure.
2686 2684 */
2687 2685 page_dma_attrs = mpt->m_msg_dma_attr;
2688 2686 page_dma_attrs.dma_attr_sgllen = 1;
2689 2687 page_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_PAGE_MAN_0));
2690 2688
2691 2689 if (mptsas_dma_addr_create(mpt, page_dma_attrs, &page_dma_handle,
2692 2690 &page_accessp, &page_memp, (sizeof (MPI2_CONFIG_PAGE_MAN_0)),
2693 2691 &page_cookie) == FALSE) {
2694 2692 rval = DDI_FAILURE;
2695 2693 goto done;
2696 2694 }
2697 2695 /* Now safe to call mptsas_dma_addr_destroy(page_dma_handle). */
2698 2696 free_page = B_TRUE;
2699 2697
2700 2698 bzero(page_memp, sizeof (MPI2_CONFIG_PAGE_MAN_0));
2701 2699 m0 = (pMpi2ManufacturingPage0_t)page_memp;
2702 2700
2703 2701 /*
2704 2702 * Give reply address to IOC to store config page in and send
2705 2703 * config request out.
2706 2704 */
2707 2705
2708 2706 flagslength = sizeof (MPI2_CONFIG_PAGE_MAN_0);
2709 2707 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT |
2710 2708 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2711 2709 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2712 2710 MPI2_SGE_FLAGS_IOC_TO_HOST |
2713 2711 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
2714 2712
2715 2713 if (mptsas_send_config_request_msg(mpt,
2716 2714 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT,
2717 2715 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 0,
2718 2716 ddi_get8(recv_accessp, &configreply->Header.PageVersion),
2719 2717 ddi_get8(recv_accessp, &configreply->Header.PageLength),
2720 2718 flagslength, page_cookie.dmac_laddress)) {
2721 2719 rval = DDI_FAILURE;
2722 2720 goto done;
2723 2721 }
2724 2722
2725 2723 /*
2726 2724 * get reply view handshake
2727 2725 */
2728 2726 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes,
2729 2727 recv_accessp)) {
2730 2728 rval = DDI_FAILURE;
2731 2729 goto done;
2732 2730 }
2733 2731
2734 2732 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) {
2735 2733 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page0 config: "
2736 2734 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus,
2737 2735 ddi_get32(recv_accessp, &configreply->IOCLogInfo));
2738 2736 goto done;
2739 2737 }
2740 2738
2741 2739 (void) ddi_dma_sync(page_dma_handle, 0, 0, DDI_DMA_SYNC_FORCPU);
2742 2740
2743 2741 /*
2744 2742 * Fusion-MPT stores fields in little-endian format. This is
2745 2743 * why the low-order 32 bits are stored first.
2746 2744 */
2747 2745
2748 2746 for (i = 0; i < 16; i++) {
2749 2747 mpt->m_MANU_page0.ChipName[i] =
2750 2748 ddi_get8(page_accessp,
2751 2749 (uint8_t *)(void *)&m0->ChipName[i]);
2752 2750 }
2753 2751
2754 2752 for (i = 0; i < 8; i++) {
2755 2753 mpt->m_MANU_page0.ChipRevision[i] =
2756 2754 ddi_get8(page_accessp,
2757 2755 (uint8_t *)(void *)&m0->ChipRevision[i]);
2758 2756 }
2759 2757
2760 2758 for (i = 0; i < 16; i++) {
2761 2759 mpt->m_MANU_page0.BoardName[i] =
2762 2760 ddi_get8(page_accessp,
2763 2761 (uint8_t *)(void *)&m0->BoardName[i]);
2764 2762 }
2765 2763
2766 2764 for (i = 0; i < 16; i++) {
2767 2765 mpt->m_MANU_page0.BoardAssembly[i] =
2768 2766 ddi_get8(page_accessp,
2769 2767 (uint8_t *)(void *)&m0->BoardAssembly[i]);
2770 2768 }
2771 2769
2772 2770 for (i = 0; i < 16; i++) {
2773 2771 mpt->m_MANU_page0.BoardTracerNumber[i] =
2774 2772 ddi_get8(page_accessp,
2775 2773 (uint8_t *)(void *)&m0->BoardTracerNumber[i]);
2776 2774 }
2777 2775
2778 2776 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) ||
2779 2777 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) {
2780 2778 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2781 2779 rval = DDI_FAILURE;
2782 2780 goto done;
2783 2781 }
2784 2782 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) ||
2785 2783 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) {
2786 2784 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED);
2787 2785 rval = DDI_FAILURE;
2788 2786 }
2789 2787 done:
2790 2788 /*
2791 2789 * free up memory
2792 2790 */
2793 2791 if (free_recv)
2794 2792 mptsas_dma_addr_destroy(&recv_dma_handle, &recv_accessp);
2795 2793 if (free_page)
2796 2794 mptsas_dma_addr_destroy(&page_dma_handle, &page_accessp);
2797 2795 MPTSAS_ENABLE_INTR(mpt);
2798 2796
2799 2797 return (rval);
2800 2798 }
|
↓ open down ↓ |
1579 lines elided |
↑ open up ↑ |
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX