1 SYSV-MAKE(1) User Commands SYSV-MAKE(1) 2 3 4 5 NAME 6 sysV-make - maintain, update, and regenerate groups of programs 7 8 SYNOPSIS 9 /usr/lib/svr4.make [-f makefile] [-eiknpqrst] [names] 10 11 12 DESCRIPTION 13 This is the vanilla System V version of make. If the environment 14 variable USE_SVR4_MAKE is set, then the command make will invoke this 15 version of make. (See also the ENVIRONMENT section.) 16 17 18 make allows the programmer to maintain, update, and regenerate groups 19 of computer programs. make executes commands in makefile to update one 20 or more target names (names are typically programs). If the -f option is 21 not present, then makefile, Makefile, and the Source Code Control 22 System (SCCS) files s.makefile and s.Makefile are tried in order. If 23 makefile is ' the standard input is taken. More than one -f makefile 24 argument pair may appear. 25 26 27 make updates a target only if its dependents are newer than the target. 28 All prerequisite files of a target are added recursively to the list of 29 targets. Missing files are deemed to be outdated. 30 31 32 The following list of four directives can be included in makefile to 33 extend the options provided by make. They are used in makefile as if 34 they were targets: 35 36 .DEFAULT: 37 If a file must be made but there are no explicit 38 commands or relevant built-in rules, the commands 39 associated with the name .DEFAULT are used if it 40 exists. 41 42 43 .IGNORE: 44 Same effect as the -i option. 45 46 47 .PRECIOUS: 48 Dependents of the .PRECIOUS entry will not be removed 49 when quit or interrupt are hit. 50 51 52 .SILENT: 53 Same effect as the -s option. 54 55 56 Options 57 The options for make are listed below: 58 59 -e 60 Environment variables override assignments within 61 makefiles. 62 63 64 -f makefile 65 Description filename (makefile is assumed to be the name 66 of a description file). 67 68 69 -i 70 Ignore error codes returned by invoked commands. 71 72 73 -k 74 Abandon work on the current entry if it fails, but 75 continue on other branches that do not depend on that 76 entry. 77 78 79 -n 80 No execute mode. Print commands, but do not execute 81 them. Even command lines beginning with an `@' are 82 printed. 83 84 85 -p 86 Print out the complete set of macro definitions and 87 target descriptions. 88 89 90 -q 91 Question. make returns a zero or non-zero status code 92 depending on whether or not the target file has been 93 updated. 94 95 96 -r 97 Do not use the built-in rules. 98 99 100 -s 101 Silent mode. Do not print command lines before 102 executing. 103 104 105 -t 106 Touch the target files (causing them to be updated) 107 rather than issue the usual commands. 108 109 110 Creating the makefile 111 The makefile invoked with the -f option is a carefully structured file 112 of explicit instructions for updating and regenerating programs, and 113 contains a sequence of entries that specify dependencies. The first 114 line of an entry is a blank-separated, non-null list of targets, then a 115 `:', then a (possibly null) list of prerequisite files or dependencies. 116 Text following a `;' and all following lines that begin with a tab are 117 shell commands to be executed to update the target. The first non-empty 118 line that does not begin with a tab or `#' begins a new dependency or 119 macro definition. Shell commands may be continued across lines with a 120 backslash-new-line (\-NEWLINE) sequence. Everything printed by make 121 (except the initial TAB) is passed directly to the shell as is. Thus, 122 123 echo a\ 124 b 125 126 127 128 129 will produce 130 131 132 ab 133 134 135 exactly the same as the shell would. 136 137 138 Number-sign (#) and NEWLINE surround comments including contained 139 `\NEWLINE' sequences. 140 141 142 The following makefile says that pgm depends on two files a.o and b.o, 143 and that they in turn depend on their corresponding source files (a.c 144 and b.c) and a common file incl.h: 145 146 pgm: a.o b.o 147 cc a.o b.o -o pgm 148 a.o: incl.h a.c 149 cc -c a.c 150 b.o: incl.h b.c 151 cc -c b.c 152 153 154 155 156 Command lines are executed one at a time, each by its own shell. The 157 SHELL environment variable can be used to specify which shell make 158 should use to execute commands. The default is /usr/bin/sh. The first 159 one or two characters in a command can be the following: `@', ', `', 160 or @'. If `@' is present, printing of the command is suppressed. If ' 161 is present, make ignores an error. A line is printed when it is 162 executed unless the -s option is present, or the entry .SILENT: is 163 included in makefile, or unless the initial character sequence contains 164 a @. The -n option specifies printing without execution; however, if the 165 command line has the string $(MAKE) in it, the line is always executed 166 (see the discussion of the MAKEFLAGS macro in the make Environment sub- 167 section below). The -t (touch) option updates the modified date of a 168 file without executing any commands. 169 170 171 Commands returning non-zero status normally terminate make. If the -i 172 option is present, if the entry .IGNORE: is included in makefile, or if 173 the initial character sequence of the command contains ', the error is 174 ignored. If the -k option is present, work is abandoned on the current 175 entry, but continues on other branches that do not depend on that 176 entry. 177 178 179 Interrupt and quit cause the target to be deleted unless the target is 180 a dependent of the directive .PRECIOUS. 181 182 make Environment 183 The environment is read by make. All variables are assumed to be macro 184 definitions and are processed as such. The environment variables are 185 processed before any makefile and after the internal rules; thus, macro 186 assignments in a makefile override environment variables. The -e option 187 causes the environment to override the macro assignments in a makefile. 188 Suffixes and their associated rules in the makefile will override any 189 identical suffixes in the built-in rules. 190 191 192 The MAKEFLAGS environment variable is processed by make as containing 193 any legal input option (except -f and -p) defined for the command line. 194 Further, upon invocation, make "invents" the variable if it is not in 195 the environment, puts the current options into it, and passes it on to 196 invocations of commands. Thus, MAKEFLAGS always contains the current 197 input options. This feature proves very useful for "super-makes". In 198 fact, as noted above, when the -n option is used, the command $(MAKE) is 199 executed anyway; hence, one can perform a make -n recursively on a whole 200 software system to see what would have been executed. This result is 201 possible because the -n is put in MAKEFLAGS and passed to further 202 invocations of $(MAKE). This usage is one way of debugging all of the 203 makefiles for a software project without actually doing anything. 204 205 Include Files 206 If the string include appears as the first seven letters of a line in a 207 makefile, and is followed by a blank or a tab, the rest of the line is 208 assumed to be a filename and will be read by the current invocation, 209 after substituting for any macros. 210 211 Macros 212 Entries of the form string1 = string2 are macro definitions. string2 213 is defined as all characters up to a comment character or an unescaped 214 NEWLINE. Subsequent appearances of $(string1[:subst1=[subst2]]) are 215 replaced by string2. The parentheses are optional if a single-character 216 macro name is used and there is no substitute sequence. The optional 217 :subst1=subst2 is a substitute sequence. If it is specified, all non- 218 overlapping occurrences of subst1 in the named macro are replaced by 219 subst2. Strings (for the purposes of this type of substitution) are 220 delimited by BLANKs, TABs, NEWLINE characters, and beginnings of lines. 221 An example of the use of the substitute sequence is shown in the 222 Libraries sub-section below. 223 224 Internal Macros 225 There are five internally maintained macros that are useful for writing 226 rules for building targets. 227 228 $* 229 The macro $* stands for the filename part of the current 230 dependent with the suffix deleted. It is evaluated only for 231 inference rules. 232 233 234 $@ 235 The $@ macro stands for the full target name of the current 236 target. It is evaluated only for explicitly named dependencies. 237 238 239 $< 240 The $< macro is only evaluated for inference rules or the 241 .DEFAULT rule. It is the module that is outdated with respect to 242 the target (the "manufactured" dependent file name). Thus, in the 243 .c.o rule, the $< macro would evaluate to the .c file. An example 244 for making optimized .o files from .c files is: 245 246 .c.o: 247 cc c O $*.c 248 249 250 or: 251 252 .c.o: 253 cc c O $< 254 255 256 257 258 $? 259 The $? macro is evaluated when explicit rules from the makefile 260 are evaluated. It is the list of prerequisites that are outdated 261 with respect to the target, and essentially those modules that 262 must be rebuilt. 263 264 265 $% 266 The $% macro is only evaluated when the target is an archive 267 library member of the form lib(file.o). In this case, $@ 268 evaluates to lib and $% evaluates to the library member, file.o. 269 270 271 272 Four of the five macros can have alternative forms. When an upper case 273 D or F is appended to any of the four macros, the meaning is changed to 274 "directory part" for D and "file part" for F. Thus, $(@D) refers to the 275 directory part of the string $@. If there is no directory part, ./ is 276 generated. The only macro excluded from this alternative form is $?. 277 278 Suffixes 279 Certain names (for instance, those ending with .o) have inferable 280 prerequisites such as .c, .s, etc. If no update commands for such a 281 file appear in makefile, and if an inferable prerequisite exists, that 282 prerequisite is compiled to make the target. In this case, make has 283 inference rules that allow building files from other files by examining 284 the suffixes and determining an appropriate inference rule to use. The 285 current default inference rules are: 286 287 288 289 290 .c .c~ .f .f~ .s .s~ .sh .sh~ .C .C~ 291 .c.a .c.o .c~.a .c~.c .c~.o .f.a .f.o .f~.a .f~.f .f~.o 292 .h~.h .l.c .l.o .l~.c .l~.l .l~.o .s.a .s.o .s~.a .s~.o 293 .s~.s .sh~.sh .y.c .y.o .y~.c .y~.o .y~.y .C.a .C.o .C~.a 294 .C~.C .C~.o .L.C .L.o .L~.C .L~.L .L~.o .Y.C .Y.o .Y~.C 295 .Y~.o .Y~.Y 296 297 298 299 The internal rules for make are contained in the source file make.rules 300 for the make program. These rules can be locally modified. To print out 301 the rules compiled into the make on any machine in a form suitable for 302 re-compilation, the following command is used: 303 304 make -pf 2>/dev/null < /dev/null 305 306 307 308 309 A tilde in the above rules refers to an SCCS file (see sccsfile(4)). 310 Thus, the rule .c~.o would transform an SCCS C source file into an 311 object file (.o). Because the s. of the SCCS files is a prefix, it is 312 incompatible with the make suffix point of view. Hence, the tilde is a 313 way of changing any file reference into an SCCS file reference. 314 315 316 A rule with only one suffix (for example, .c:) is the definition of how 317 to build x from x.c. In effect, the other suffix is null. This feature 318 is useful for building targets from only one source file, for example, 319 shell procedures and simple C programs. 320 321 322 Additional suffixes are given as the dependency list for .SUFFIXES. 323 Order is significant: the first possible name for which both a file and 324 a rule exist is inferred as a prerequisite. The default list is: 325 326 327 .SUFFIXES: .o .c .c~ .y .y~ .l .l~ .s .s~ .sh .sh~ .h .h~ .f .f~ .C .C~ 328 .Y .Y~ .L .L~ 329 330 331 Here again, the above command for printing the internal rules will 332 display the list of suffixes implemented on the current machine. 333 Multiple suffix lists accumulate; .SUFFIXES: with no dependencies 334 clears the list of suffixes. 335 336 Inference Rules 337 The first example can be done more briefly. 338 339 pgm: a.o b.o 340 cc a.o b.o o pgm 341 a.o b.o: incl.h 342 343 344 345 346 This abbreviation is possible because make has a set of internal rules 347 for building files. The user may add rules to this list by simply 348 putting them in the makefile. 349 350 351 Certain macros are used by the default inference rules to permit the 352 inclusion of optional matter in any resulting commands. Again, the 353 previous method for examining the current rules is recommended. 354 355 356 The inference of prerequisites can be controlled. The rule to create a 357 file with suffix .o from a file with suffix .c is specified as an entry 358 with .c.o: as the target and no dependents. Shell commands associated 359 with the target define the rule for making a .o file from a .c file. 360 Any target that has no slashes in it and starts with a dot is 361 identified as a rule and not a true target. 362 363 Libraries 364 If a target or dependency name contains parentheses, it is assumed to 365 be an archive library, the string within parentheses referring to a 366 member within the library. Thus, lib(file.o) and $(LIB)(file.o) both 367 refer to an archive library that contains file.o. (This example assumes 368 the LIB macro has been previously defined.) The expression 369 $(LIB)(file1.o file2.o) is not legal. Rules pertaining to archive 370 libraries have the form .XX.a where the XX is the suffix from which 371 the archive member is to be made. An unfortunate by-product of the 372 current implementation requires the XX to be different from the suffix 373 of the archive member. Thus, one cannot have lib(file.o) depend upon 374 file.o explicitly. The most common use of the archive interface 375 follows. Here, we assume the source files are all C type source: 376 377 lib: lib(file1.o) lib(file2.o) lib(file3.o) 378 @echo lib is now up-to-date 379 .c.a: 380 $(CC) -c $(CFLAGS) $< 381 $(AR) $(ARFLAGS) $@ $*.o 382 rm -f $*.o 383 384 385 386 387 In fact, the .c.a rule listed above is built into make and is 388 unnecessary in this example. A more interesting, but more limited 389 example of an archive library maintenance construction follows: 390 391 lib: lib(file1.o) lib(file2.o) lib(file3.o) 392 $(CC) -c $(CFLAGS) $(?:.o=.c) 393 $(AR) $(ARFLAGS) lib $? 394 rm $? 395 @echo lib is now up-to-date 396 .c.a:; 397 398 399 400 401 Here the substitution mode of the macro expansions is used. The $? list 402 is defined to be the set of object filenames (inside lib) whose C 403 source files are outdated. The substitution mode translates the .o to 404 .c. (Unfortunately, one cannot as yet transform to .c~; however, this 405 transformation may become possible in the future.) Also note the 406 disabling of the .c.a: rule, which would have created each object file, 407 one by one. This particular construct speeds up archive library 408 maintenance considerably. This type of construct becomes very 409 cumbersome if the archive library contains a mix of assembly programs 410 and C programs. 411 412 ENVIRONMENT VARIABLES 413 USE_SVR4_MAKE 414 If this environment variable is set, then the make 415 command will invoke this System V version of make. If 416 this variable is not set, then the default version of 417 make(1S) is invoked. 418 419 USE_SVR4_MAKE can be set as follows (Bourne shell): 420 421 $ USE_SVR4_MAKE=``''; export USE_SVR4_MAKE 422 423 or (C shell): 424 425 % setenv USE_SVR4_MAKE 426 427 428 FILES 429 [Mm]akefile 430 s.[Mm]akefile 431 default makefiles 432 433 434 /usr/bin/sh 435 default shell for make 436 437 438 /usr/share/lib/make/make.rules 439 default rules for make 440 441 442 SEE ALSO 443 cd(1), make(1S), sh(1), printf(3C), sccsfile(4), attributes(5) 444 445 NOTES 446 Some commands return non-zero status inappropriately; use -i or the `-' 447 command line prefix to overcome the difficulty. 448 449 450 Filenames containing the characters =, :, and @ do not work. Commands 451 that are directly executed by the shell, notably cd(1), are ineffectual 452 across NEWLINEs in make. The syntax lib(file1.o file2.o file3.o) is 453 illegal. You cannot build lib(file.o) from file.o. 454 455 456 457 August 24, 2009 SYSV-MAKE(1)