SYSV-MAKE(1) | User Commands | SYSV-MAKE(1) |
make allows the programmer to maintain, update, and regenerate groups of computer programs. make executes commands in makefile to update one or more target names (names are typically programs). If the -f option is not present, then makefile, Makefile, and the Source Code Control System (SCCS) files s.makefile and s.Makefile are tried in order. If makefile is `−' the standard input is taken. More than one -f makefile argument pair may appear.
make updates a target only if its dependents are newer than the target. All prerequisite files of a target are added recursively to the list of targets. Missing files are deemed to be outdated.
The following list of four directives can be included in makefile to extend the options provided by make. They are used in makefile as if they were targets:
will produce
ab
exactly the same as the shell would.
Number-sign (#) and NEWLINE surround comments including contained ` \−NEWLINE' sequences.
The following makefile says that pgm depends on two files a.o and b.o, and that they in turn depend on their corresponding source files ( a.c and b.c) and a common file incl.h:
Command lines are executed one at a time, each by its own shell. The SHELL environment variable can be used to specify which shell make should use to execute commands. The default is /usr/bin/sh. The first one or two characters in a command can be the following: ` @', `−', ` @−', or `−@'. If `@' is present, printing of the command is suppressed. If ` −' is present, make ignores an error. A line is printed when it is executed unless the -s option is present, or the entry .SILENT: is included in makefile, or unless the initial character sequence contains a @. The -n option specifies printing without execution; however, if the command line has the string $(MAKE) in it, the line is always executed (see the discussion of the MAKEFLAGS macro in the make Environment sub-section below). The -t (touch) option updates the modified date of a file without executing any commands.
Commands returning non-zero status normally terminate make. If the -i option is present, if the entry .IGNORE: is included in makefile, or if the initial character sequence of the command contains ` −', the error is ignored. If the -k option is present, work is abandoned on the current entry, but continues on other branches that do not depend on that entry.
Interrupt and quit cause the target to be deleted unless the target is a dependent of the directive .PRECIOUS.
The MAKEFLAGS environment variable is processed by make as containing any legal input option (except -f and -p) defined for the command line. Further, upon invocation, make "invents" the variable if it is not in the environment, puts the current options into it, and passes it on to invocations of commands. Thus, MAKEFLAGS always contains the current input options. This feature proves very useful for "super-makes". In fact, as noted above, when the -n option is used, the command $(MAKE) is executed anyway; hence, one can perform a make -n recursively on a whole software system to see what would have been executed. This result is possible because the -n is put in MAKEFLAGS and passed to further invocations of $(MAKE). This usage is one way of debugging all of the makefiles for a software project without actually doing anything.
Four of the five macros can have alternative forms. When an upper case D or F is appended to any of the four macros, the meaning is changed to "directory part" for D and "file part" for F. Thus, $(@D) refers to the directory part of the string $@. If there is no directory part, ./ is generated. The only macro excluded from this alternative form is $?.
.c | .c~ | .f | .f~ | .s | .s~ | .sh | .sh~ | .C | .C~ |
.c.a | .c.o | .c~.a | .c~.c | .c~.o | .f.a | .f.o | .f~.a | .f~.f | .f~.o |
.h~.h | .l.c | .l.o | .l~.c | .l~.l | .l~.o | .s.a | .s.o | .s~.a | .s~.o |
.s~.s | .sh~.sh | .y.c | .y.o | .y~.c | .y~.o | .y~.y | .C.a | .C.o | .C~.a |
.C~.C | .C~.o | .L.C | .L.o | .L~.C | .L~.L | .L~.o | .Y.C | .Y.o | .Y~.C |
.Y~.o | .Y~.Y |
The internal rules for make are contained in the source file make.rules for the make program. These rules can be locally modified. To print out the rules compiled into the make on any machine in a form suitable for re-compilation, the following command is used:
A tilde in the above rules refers to an SCCS file (see sccsfile(4)). Thus, the rule .c~.o would transform an SCCS C source file into an object file ( .o). Because the s. of the SCCS files is a prefix, it is incompatible with the make suffix point of view. Hence, the tilde is a way of changing any file reference into an SCCS file reference.
A rule with only one suffix (for example, .c:) is the definition of how to build x from x.c. In effect, the other suffix is null. This feature is useful for building targets from only one source file, for example, shell procedures and simple C programs.
Additional suffixes are given as the dependency list for .SUFFIXES. Order is significant: the first possible name for which both a file and a rule exist is inferred as a prerequisite. The default list is:
.SUFFIXES: .o .c .c~ .y .y~ .l .l~ .s .s~ .sh .sh~ .h .h~ .f .f~ .C .C~ .Y .Y~ .L .L~
Here again, the above command for printing the internal rules will display the list of suffixes implemented on the current machine. Multiple suffix lists accumulate; .SUFFIXES: with no dependencies clears the list of suffixes.
This abbreviation is possible because make has a set of internal rules for building files. The user may add rules to this list by simply putting them in the makefile.
Certain macros are used by the default inference rules to permit the inclusion of optional matter in any resulting commands. Again, the previous method for examining the current rules is recommended.
The inference of prerequisites can be controlled. The rule to create a file with suffix .o from a file with suffix .c is specified as an entry with .c.o: as the target and no dependents. Shell commands associated with the target define the rule for making a .o file from a .c file. Any target that has no slashes in it and starts with a dot is identified as a rule and not a true target.
In fact, the .c.a rule listed above is built into make and is unnecessary in this example. A more interesting, but more limited example of an archive library maintenance construction follows:
Here the substitution mode of the macro expansions is used. The $? list is defined to be the set of object filenames (inside lib) whose C source files are outdated. The substitution mode translates the .o to .c. (Unfortunately, one cannot as yet transform to .c~; however, this transformation may become possible in the future.) Also note the disabling of the .c.a: rule, which would have created each object file, one by one. This particular construct speeds up archive library maintenance considerably. This type of construct becomes very cumbersome if the archive library contains a mix of assembly programs and C programs.
Filenames containing the characters =, :, and @ do not work. Commands that are directly executed by the shell, notably cd(1), are ineffectual across NEWLINEs in make. The syntax lib(file1.o file2.o file3.o) is illegal. You cannot build lib(file.o) from file.o.
August 24, 2009 |