172 t0.t_tid = p0.p_lwpcnt = p0.p_lwprcnt = p0.p_lwpid = 1;
173
174 mpcb = lwptompcb(&lwp0);
175 mpcb->mpcb_fpu = fp;
176 mpcb->mpcb_fpu->fpu_q = mpcb->mpcb_fpu_q;
177 mpcb->mpcb_thread = &t0;
178 lwp0.lwp_fpu = (void *)mpcb->mpcb_fpu;
179
180 p0.p_exec = NULL;
181 p0.p_stat = SRUN;
182 p0.p_flag = SSYS;
183 p0.p_tlist = &t0;
184 p0.p_stksize = 2*PAGESIZE;
185 p0.p_stkpageszc = 0;
186 p0.p_as = &kas;
187 p0.p_lockp = &p0lock;
188 p0.p_utraps = NULL;
189 p0.p_brkpageszc = 0;
190 p0.p_t1_lgrpid = LGRP_NONE;
191 p0.p_tr_lgrpid = LGRP_NONE;
192 sigorset(&p0.p_ignore, &ignoredefault);
193
194 CPU->cpu_thread = &t0;
195 CPU->cpu_dispthread = &t0;
196 bzero(&cpu0_disp, sizeof (disp_t));
197 CPU->cpu_disp = &cpu0_disp;
198 CPU->cpu_disp->disp_cpu = CPU;
199 CPU->cpu_idle_thread = &t0;
200 CPU->cpu_flags = CPU_RUNNING;
201 CPU->cpu_id = getprocessorid();
202 CPU->cpu_dispatch_pri = t0.t_pri;
203
204 /*
205 * Initialize thread/cpu microstate accounting
206 */
207 init_mstate(&t0, LMS_SYSTEM);
208 init_cpu_mstate(CPU, CMS_SYSTEM);
209
210 /*
211 * Initialize lists of available and active CPUs.
212 */
213 cpu_list_init(CPU);
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172 t0.t_tid = p0.p_lwpcnt = p0.p_lwprcnt = p0.p_lwpid = 1;
173
174 mpcb = lwptompcb(&lwp0);
175 mpcb->mpcb_fpu = fp;
176 mpcb->mpcb_fpu->fpu_q = mpcb->mpcb_fpu_q;
177 mpcb->mpcb_thread = &t0;
178 lwp0.lwp_fpu = (void *)mpcb->mpcb_fpu;
179
180 p0.p_exec = NULL;
181 p0.p_stat = SRUN;
182 p0.p_flag = SSYS;
183 p0.p_tlist = &t0;
184 p0.p_stksize = 2*PAGESIZE;
185 p0.p_stkpageszc = 0;
186 p0.p_as = &kas;
187 p0.p_lockp = &p0lock;
188 p0.p_utraps = NULL;
189 p0.p_brkpageszc = 0;
190 p0.p_t1_lgrpid = LGRP_NONE;
191 p0.p_tr_lgrpid = LGRP_NONE;
192 psecflags_default(&p0.p_secflags);
193 sigorset(&p0.p_ignore, &ignoredefault);
194
195
196 CPU->cpu_thread = &t0;
197 CPU->cpu_dispthread = &t0;
198 bzero(&cpu0_disp, sizeof (disp_t));
199 CPU->cpu_disp = &cpu0_disp;
200 CPU->cpu_disp->disp_cpu = CPU;
201 CPU->cpu_idle_thread = &t0;
202 CPU->cpu_flags = CPU_RUNNING;
203 CPU->cpu_id = getprocessorid();
204 CPU->cpu_dispatch_pri = t0.t_pri;
205
206 /*
207 * Initialize thread/cpu microstate accounting
208 */
209 init_mstate(&t0, LMS_SYSTEM);
210 init_cpu_mstate(CPU, CMS_SYSTEM);
211
212 /*
213 * Initialize lists of available and active CPUs.
214 */
215 cpu_list_init(CPU);
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