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7029 want per-process exploit mitigation features (secflags)
7030 want basic address space layout randomization (aslr)
7031 noexec_user_stack should be a secflag
7032 want a means to forbid mappings around NULL.
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--- old/usr/src/uts/sun4v/vm/mach_vm_dep.c
+++ new/usr/src/uts/sun4v/vm/mach_vm_dep.c
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21 /*
22 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
23 23 * Use is subject to license terms.
24 24 */
25 25
26 26 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
27 27 /* All Rights Reserved */
28 28
29 29 /*
30 30 * Portions of this source code were derived from Berkeley 4.3 BSD
31 31 * under license from the Regents of the University of California.
32 32 */
33 33
34 34 /*
35 35 * UNIX machine dependent virtual memory support.
36 36 */
37 37
38 38 #include <sys/vm.h>
39 39 #include <sys/exec.h>
40 40 #include <sys/cmn_err.h>
41 41 #include <sys/cpu_module.h>
42 42 #include <sys/cpu.h>
43 43 #include <sys/elf_SPARC.h>
44 44 #include <sys/archsystm.h>
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45 45 #include <vm/hat_sfmmu.h>
46 46 #include <sys/memnode.h>
47 47 #include <sys/mem_cage.h>
48 48 #include <vm/vm_dep.h>
49 49 #include <sys/error.h>
50 50 #include <sys/machsystm.h>
51 51 #include <vm/seg_kmem.h>
52 52 #include <sys/stack.h>
53 53 #include <sys/atomic.h>
54 54 #include <sys/promif.h>
55 +#include <sys/random.h>
55 56
56 57 uint_t page_colors = 0;
57 58 uint_t page_colors_mask = 0;
58 59 uint_t page_coloring_shift = 0;
59 60 int consistent_coloring;
60 61 int update_proc_pgcolorbase_after_fork = 1;
61 62
62 63 uint_t mmu_page_sizes = MMU_PAGE_SIZES;
63 64 uint_t max_mmu_page_sizes = MMU_PAGE_SIZES;
64 65 uint_t mmu_hashcnt = MAX_HASHCNT;
65 66 uint_t max_mmu_hashcnt = MAX_HASHCNT;
66 67 size_t mmu_ism_pagesize = DEFAULT_ISM_PAGESIZE;
67 68
68 69 /*
69 70 * A bitmask of the page sizes supported by hardware based upon szc.
70 71 * The base pagesize (p_szc == 0) must always be supported by the hardware.
71 72 */
72 73 int mmu_exported_pagesize_mask;
73 74 uint_t mmu_exported_page_sizes;
74 75
75 76 uint_t szc_2_userszc[MMU_PAGE_SIZES];
76 77 uint_t userszc_2_szc[MMU_PAGE_SIZES];
77 78
78 79 extern uint_t vac_colors_mask;
79 80 extern int vac_shift;
80 81
81 82 hw_pagesize_t hw_page_array[] = {
82 83 {MMU_PAGESIZE, MMU_PAGESHIFT, 0, MMU_PAGESIZE >> MMU_PAGESHIFT},
83 84 {MMU_PAGESIZE64K, MMU_PAGESHIFT64K, 0,
84 85 MMU_PAGESIZE64K >> MMU_PAGESHIFT},
85 86 {MMU_PAGESIZE512K, MMU_PAGESHIFT512K, 0,
86 87 MMU_PAGESIZE512K >> MMU_PAGESHIFT},
87 88 {MMU_PAGESIZE4M, MMU_PAGESHIFT4M, 0, MMU_PAGESIZE4M >> MMU_PAGESHIFT},
88 89 {MMU_PAGESIZE32M, MMU_PAGESHIFT32M, 0,
89 90 MMU_PAGESIZE32M >> MMU_PAGESHIFT},
90 91 {MMU_PAGESIZE256M, MMU_PAGESHIFT256M, 0,
91 92 MMU_PAGESIZE256M >> MMU_PAGESHIFT},
92 93 {0, 0, 0, 0}
93 94 };
94 95
95 96 /*
96 97 * Maximum page size used to map 64-bit memory segment kmem64_base..kmem64_end
97 98 */
98 99 int max_bootlp_tteszc = TTE256M;
99 100
100 101 /*
101 102 * Maximum and default segment size tunables for user heap, stack, private
102 103 * and shared anonymous memory, and user text and initialized data.
103 104 */
104 105 size_t max_uheap_lpsize = MMU_PAGESIZE64K;
105 106 size_t default_uheap_lpsize = MMU_PAGESIZE64K;
106 107 size_t max_ustack_lpsize = MMU_PAGESIZE64K;
107 108 size_t default_ustack_lpsize = MMU_PAGESIZE64K;
108 109 size_t max_privmap_lpsize = MMU_PAGESIZE64K;
109 110 size_t max_uidata_lpsize = MMU_PAGESIZE64K;
110 111 size_t max_utext_lpsize = MMU_PAGESIZE4M;
111 112 size_t max_shm_lpsize = MMU_PAGESIZE4M;
112 113
113 114 /*
114 115 * Contiguous memory allocator data structures and variables.
115 116 *
116 117 * The sun4v kernel must provide a means to allocate physically
117 118 * contiguous, non-relocatable memory. The contig_mem_arena
118 119 * and contig_mem_slab_arena exist for this purpose. Allocations
119 120 * that require physically contiguous non-relocatable memory should
120 121 * be made using contig_mem_alloc() or contig_mem_alloc_align()
121 122 * which return memory from contig_mem_arena or contig_mem_reloc_arena.
122 123 * These arenas import memory from the contig_mem_slab_arena one
123 124 * contiguous chunk at a time.
124 125 *
125 126 * When importing slabs, an attempt is made to allocate a large page
126 127 * to use as backing. As a result of the non-relocatable requirement,
127 128 * slabs are allocated from the kernel cage freelists. If the cage does
128 129 * not contain any free contiguous chunks large enough to satisfy the
129 130 * slab allocation, the slab size will be downsized and the operation
130 131 * retried. Large slab sizes are tried first to minimize cage
131 132 * fragmentation. If the slab allocation is unsuccessful still, the slab
132 133 * is allocated from outside the kernel cage. This is undesirable because,
133 134 * until slabs are freed, it results in non-relocatable chunks scattered
134 135 * throughout physical memory.
135 136 *
136 137 * Allocations from the contig_mem_arena are backed by slabs from the
137 138 * cage. Allocations from the contig_mem_reloc_arena are backed by
138 139 * slabs allocated outside the cage. Slabs are left share locked while
139 140 * in use to prevent non-cage slabs from being relocated.
140 141 *
141 142 * Since there is no guarantee that large pages will be available in
142 143 * the kernel cage, contiguous memory is reserved and added to the
143 144 * contig_mem_arena at boot time, making it available for later
144 145 * contiguous memory allocations. This reserve will be used to satisfy
145 146 * contig_mem allocations first and it is only when the reserve is
146 147 * completely allocated that new slabs will need to be imported.
147 148 */
148 149 static vmem_t *contig_mem_slab_arena;
149 150 static vmem_t *contig_mem_arena;
150 151 static vmem_t *contig_mem_reloc_arena;
151 152 static kmutex_t contig_mem_lock;
152 153 #define CONTIG_MEM_ARENA_QUANTUM 64
153 154 #define CONTIG_MEM_SLAB_ARENA_QUANTUM MMU_PAGESIZE64K
154 155
155 156 /* contig_mem_arena import slab sizes, in decreasing size order */
156 157 static size_t contig_mem_import_sizes[] = {
157 158 MMU_PAGESIZE4M,
158 159 MMU_PAGESIZE512K,
159 160 MMU_PAGESIZE64K
160 161 };
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161 162 #define NUM_IMPORT_SIZES \
162 163 (sizeof (contig_mem_import_sizes) / sizeof (size_t))
163 164 static size_t contig_mem_import_size_max = MMU_PAGESIZE4M;
164 165 size_t contig_mem_slab_size = MMU_PAGESIZE4M;
165 166
166 167 /* Boot-time allocated buffer to pre-populate the contig_mem_arena */
167 168 static size_t contig_mem_prealloc_size;
168 169 static void *contig_mem_prealloc_buf;
169 170
170 171 /*
172 + * The maximum amount a randomized mapping will be slewed. We should perhaps
173 + * arrange things so these tunables can be separate for mmap, mmapobj, and
174 + * ld.so
175 + */
176 +size_t aslr_max_map_skew = 256 * 1024 * 1024; /* 256MB */
177 +
178 +/*
171 179 * map_addr_proc() is the routine called when the system is to
172 180 * choose an address for the user. We will pick an address
173 181 * range which is just below the current stack limit. The
174 182 * algorithm used for cache consistency on machines with virtual
175 183 * address caches is such that offset 0 in the vnode is always
176 184 * on a shm_alignment'ed aligned address. Unfortunately, this
177 185 * means that vnodes which are demand paged will not be mapped
178 186 * cache consistently with the executable images. When the
179 187 * cache alignment for a given object is inconsistent, the
180 188 * lower level code must manage the translations so that this
181 189 * is not seen here (at the cost of efficiency, of course).
182 190 *
183 191 * Every mapping will have a redzone of a single page on either side of
184 192 * the request. This is done to leave one page unmapped between segments.
185 193 * This is not required, but it's useful for the user because if their
186 194 * program strays across a segment boundary, it will catch a fault
187 195 * immediately making debugging a little easier. Currently the redzone
188 196 * is mandatory.
189 197 *
190 198 * addrp is a value/result parameter.
191 199 * On input it is a hint from the user to be used in a completely
192 200 * machine dependent fashion. For MAP_ALIGN, addrp contains the
193 201 * minimal alignment, which must be some "power of two" multiple of
194 202 * pagesize.
195 203 *
196 204 * On output it is NULL if no address can be found in the current
197 205 * processes address space or else an address that is currently
198 206 * not mapped for len bytes with a page of red zone on either side.
199 207 * If vacalign is true, then the selected address will obey the alignment
200 208 * constraints of a vac machine based on the given off value.
201 209 */
202 210 /*ARGSUSED3*/
203 211 void
204 212 map_addr_proc(caddr_t *addrp, size_t len, offset_t off, int vacalign,
205 213 caddr_t userlimit, struct proc *p, uint_t flags)
206 214 {
207 215 struct as *as = p->p_as;
208 216 caddr_t addr;
209 217 caddr_t base;
210 218 size_t slen;
211 219 uintptr_t align_amount;
212 220 int allow_largepage_alignment = 1;
213 221
214 222 base = p->p_brkbase;
215 223 if (userlimit < as->a_userlimit) {
216 224 /*
217 225 * This happens when a program wants to map something in
218 226 * a range that's accessible to a program in a smaller
219 227 * address space. For example, a 64-bit program might
220 228 * be calling mmap32(2) to guarantee that the returned
221 229 * address is below 4Gbytes.
222 230 */
223 231 ASSERT(userlimit > base);
224 232 slen = userlimit - base;
225 233 } else {
226 234 slen = p->p_usrstack - base -
227 235 ((p->p_stk_ctl + PAGEOFFSET) & PAGEMASK);
228 236 }
229 237 /* Make len be a multiple of PAGESIZE */
230 238 len = (len + PAGEOFFSET) & PAGEMASK;
231 239
232 240 /*
233 241 * If the request is larger than the size of a particular
234 242 * mmu level, then we use that level to map the request.
235 243 * But this requires that both the virtual and the physical
236 244 * addresses be aligned with respect to that level, so we
237 245 * do the virtual bit of nastiness here.
238 246 *
239 247 * For 32-bit processes, only those which have specified
240 248 * MAP_ALIGN or an addr will be aligned on a page size > 4MB. Otherwise
241 249 * we can potentially waste up to 256MB of the 4G process address
242 250 * space just for alignment.
243 251 *
244 252 * XXXQ Should iterate trough hw_page_array here to catch
245 253 * all supported pagesizes
246 254 */
247 255 if (p->p_model == DATAMODEL_ILP32 && ((flags & MAP_ALIGN) == 0 ||
248 256 ((uintptr_t)*addrp) != 0)) {
249 257 allow_largepage_alignment = 0;
250 258 }
251 259 if ((mmu_page_sizes == max_mmu_page_sizes) &&
252 260 allow_largepage_alignment &&
253 261 (len >= MMU_PAGESIZE256M)) { /* 256MB mappings */
254 262 align_amount = MMU_PAGESIZE256M;
255 263 } else if ((mmu_page_sizes == max_mmu_page_sizes) &&
256 264 allow_largepage_alignment &&
257 265 (len >= MMU_PAGESIZE32M)) { /* 32MB mappings */
258 266 align_amount = MMU_PAGESIZE32M;
259 267 } else if (len >= MMU_PAGESIZE4M) { /* 4MB mappings */
260 268 align_amount = MMU_PAGESIZE4M;
261 269 } else if (len >= MMU_PAGESIZE512K) { /* 512KB mappings */
262 270 align_amount = MMU_PAGESIZE512K;
263 271 } else if (len >= MMU_PAGESIZE64K) { /* 64KB mappings */
264 272 align_amount = MMU_PAGESIZE64K;
265 273 } else {
266 274 /*
267 275 * Align virtual addresses on a 64K boundary to ensure
268 276 * that ELF shared libraries are mapped with the appropriate
269 277 * alignment constraints by the run-time linker.
270 278 */
271 279 align_amount = ELF_SPARC_MAXPGSZ;
272 280 if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp != 0) &&
273 281 ((uintptr_t)*addrp < align_amount))
274 282 align_amount = (uintptr_t)*addrp;
275 283 }
276 284
277 285 /*
278 286 * 64-bit processes require 1024K alignment of ELF shared libraries.
279 287 */
280 288 if (p->p_model == DATAMODEL_LP64)
281 289 align_amount = MAX(align_amount, ELF_SPARCV9_MAXPGSZ);
282 290 #ifdef VAC
283 291 if (vac && vacalign && (align_amount < shm_alignment))
284 292 align_amount = shm_alignment;
285 293 #endif
286 294
287 295 if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp > align_amount)) {
288 296 align_amount = (uintptr_t)*addrp;
289 297 }
290 298
291 299 ASSERT(ISP2(align_amount));
292 300 ASSERT(align_amount == 0 || align_amount >= PAGESIZE);
293 301
294 302 /*
295 303 * Look for a large enough hole starting below the stack limit.
296 304 * After finding it, use the upper part.
297 305 */
298 306 as_purge(as);
299 307 off = off & (align_amount - 1);
300 308 if (as_gap_aligned(as, len, &base, &slen, AH_HI, NULL, align_amount,
301 309 PAGESIZE, off) == 0) {
302 310 caddr_t as_addr;
303 311
304 312 /*
305 313 * addr is the highest possible address to use since we have
306 314 * a PAGESIZE redzone at the beginning and end.
307 315 */
308 316 addr = base + slen - (PAGESIZE + len);
309 317 as_addr = addr;
310 318 /*
311 319 * Round address DOWN to the alignment amount and
312 320 * add the offset in.
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313 321 * If addr is greater than as_addr, len would not be large
314 322 * enough to include the redzone, so we must adjust down
315 323 * by the alignment amount.
316 324 */
317 325 addr = (caddr_t)((uintptr_t)addr & (~(align_amount - 1l)));
318 326 addr += (long)off;
319 327 if (addr > as_addr) {
320 328 addr -= align_amount;
321 329 }
322 330
331 + /*
332 + * If randomization is requested, slew the allocation
333 + * backwards, within the same gap, by a random amount.
334 + */
335 + if (flags & _MAP_RANDOMIZE) {
336 + uint32_t slew;
337 +
338 + (void) random_get_pseudo_bytes((uint8_t *)&slew,
339 + sizeof (slew));
340 +
341 + slew = slew % MIN(aslr_max_map_skew, (addr - base));
342 + addr -= P2ALIGN(slew, align_amount);
343 + }
344 +
323 345 ASSERT(addr > base);
324 346 ASSERT(addr + len < base + slen);
325 347 ASSERT(((uintptr_t)addr & (align_amount - 1l)) ==
326 348 ((uintptr_t)(off)));
327 349 *addrp = addr;
328 350
329 351 } else {
330 352 *addrp = NULL; /* no more virtual space */
331 353 }
332 354 }
333 355
334 356 /*
335 357 * Platform-dependent page scrub call.
336 358 * We call hypervisor to scrub the page.
337 359 */
338 360 void
339 361 pagescrub(page_t *pp, uint_t off, uint_t len)
340 362 {
341 363 uint64_t pa, length;
342 364
343 365 pa = (uint64_t)(pp->p_pagenum << MMU_PAGESHIFT + off);
344 366 length = (uint64_t)len;
345 367
346 368 (void) mem_scrub(pa, length);
347 369 }
348 370
349 371 void
350 372 sync_data_memory(caddr_t va, size_t len)
351 373 {
352 374 /* Call memory sync function */
353 375 (void) mem_sync(va, len);
354 376 }
355 377
356 378 size_t
357 379 mmu_get_kernel_lpsize(size_t lpsize)
358 380 {
359 381 extern int mmu_exported_pagesize_mask;
360 382 uint_t tte;
361 383
362 384 if (lpsize == 0) {
363 385 /* no setting for segkmem_lpsize in /etc/system: use default */
364 386 if (mmu_exported_pagesize_mask & (1 << TTE256M)) {
365 387 lpsize = MMU_PAGESIZE256M;
366 388 } else if (mmu_exported_pagesize_mask & (1 << TTE4M)) {
367 389 lpsize = MMU_PAGESIZE4M;
368 390 } else if (mmu_exported_pagesize_mask & (1 << TTE64K)) {
369 391 lpsize = MMU_PAGESIZE64K;
370 392 } else {
371 393 lpsize = MMU_PAGESIZE;
372 394 }
373 395
374 396 return (lpsize);
375 397 }
376 398
377 399 for (tte = TTE8K; tte <= TTE256M; tte++) {
378 400
379 401 if ((mmu_exported_pagesize_mask & (1 << tte)) == 0)
380 402 continue;
381 403
382 404 if (lpsize == TTEBYTES(tte))
383 405 return (lpsize);
384 406 }
385 407
386 408 lpsize = TTEBYTES(TTE8K);
387 409 return (lpsize);
388 410 }
389 411
390 412 void
391 413 mmu_init_kcontext()
392 414 {
393 415 }
394 416
395 417 /*ARGSUSED*/
396 418 void
397 419 mmu_init_kernel_pgsz(struct hat *hat)
398 420 {
399 421 }
400 422
401 423 static void *
402 424 contig_mem_span_alloc(vmem_t *vmp, size_t size, int vmflag)
403 425 {
404 426 page_t *ppl;
405 427 page_t *rootpp;
406 428 caddr_t addr = NULL;
407 429 pgcnt_t npages = btopr(size);
408 430 page_t **ppa;
409 431 int pgflags;
410 432 spgcnt_t i = 0;
411 433
412 434
413 435 ASSERT(size <= contig_mem_import_size_max);
414 436 ASSERT((size & (size - 1)) == 0);
415 437
416 438 if ((addr = vmem_xalloc(vmp, size, size, 0, 0,
417 439 NULL, NULL, vmflag)) == NULL) {
418 440 return (NULL);
419 441 }
420 442
421 443 /* The address should be slab-size aligned. */
422 444 ASSERT(((uintptr_t)addr & (size - 1)) == 0);
423 445
424 446 if (page_resv(npages, vmflag & VM_KMFLAGS) == 0) {
425 447 vmem_xfree(vmp, addr, size);
426 448 return (NULL);
427 449 }
428 450
429 451 pgflags = PG_EXCL;
430 452 if (vmflag & VM_NORELOC)
431 453 pgflags |= PG_NORELOC;
432 454
433 455 ppl = page_create_va_large(&kvp, (u_offset_t)(uintptr_t)addr, size,
434 456 pgflags, &kvseg, addr, NULL);
435 457
436 458 if (ppl == NULL) {
437 459 vmem_xfree(vmp, addr, size);
438 460 page_unresv(npages);
439 461 return (NULL);
440 462 }
441 463
442 464 rootpp = ppl;
443 465 ppa = kmem_zalloc(npages * sizeof (page_t *), KM_SLEEP);
444 466 while (ppl != NULL) {
445 467 page_t *pp = ppl;
446 468 ppa[i++] = pp;
447 469 page_sub(&ppl, pp);
448 470 ASSERT(page_iolock_assert(pp));
449 471 ASSERT(PAGE_EXCL(pp));
450 472 page_io_unlock(pp);
451 473 }
452 474
453 475 /*
454 476 * Load the locked entry. It's OK to preload the entry into
455 477 * the TSB since we now support large mappings in the kernel TSB.
456 478 */
457 479 hat_memload_array(kas.a_hat, (caddr_t)rootpp->p_offset, size,
458 480 ppa, (PROT_ALL & ~PROT_USER) | HAT_NOSYNC, HAT_LOAD_LOCK);
459 481
460 482 ASSERT(i == page_get_pagecnt(ppa[0]->p_szc));
461 483 for (--i; i >= 0; --i) {
462 484 ASSERT(ppa[i]->p_szc == ppa[0]->p_szc);
463 485 ASSERT(page_pptonum(ppa[i]) == page_pptonum(ppa[0]) + i);
464 486 (void) page_pp_lock(ppa[i], 0, 1);
465 487 /*
466 488 * Leave the page share locked. For non-cage pages,
467 489 * this would prevent memory DR if it were supported
468 490 * on sun4v.
469 491 */
470 492 page_downgrade(ppa[i]);
471 493 }
472 494
473 495 kmem_free(ppa, npages * sizeof (page_t *));
474 496 return (addr);
475 497 }
476 498
477 499 /*
478 500 * Allocates a slab by first trying to use the largest slab size
479 501 * in contig_mem_import_sizes and then falling back to smaller slab
480 502 * sizes still large enough for the allocation. The sizep argument
481 503 * is a pointer to the requested size. When a slab is successfully
482 504 * allocated, the slab size, which must be >= *sizep and <=
483 505 * contig_mem_import_size_max, is returned in the *sizep argument.
484 506 * Returns the virtual address of the new slab.
485 507 */
486 508 static void *
487 509 span_alloc_downsize(vmem_t *vmp, size_t *sizep, size_t align, int vmflag)
488 510 {
489 511 int i;
490 512
491 513 ASSERT(*sizep <= contig_mem_import_size_max);
492 514
493 515 for (i = 0; i < NUM_IMPORT_SIZES; i++) {
494 516 size_t page_size = contig_mem_import_sizes[i];
495 517
496 518 /*
497 519 * Check that the alignment is also less than the
498 520 * import (large page) size. In the case where the
499 521 * alignment is larger than the size, a large page
500 522 * large enough for the allocation is not necessarily
501 523 * physical-address aligned to satisfy the requested
502 524 * alignment. Since alignment is required to be a
503 525 * power-of-2, any large page >= size && >= align will
504 526 * suffice.
505 527 */
506 528 if (*sizep <= page_size && align <= page_size) {
507 529 void *addr;
508 530 addr = contig_mem_span_alloc(vmp, page_size, vmflag);
509 531 if (addr == NULL)
510 532 continue;
511 533 *sizep = page_size;
512 534 return (addr);
513 535 }
514 536 return (NULL);
515 537 }
516 538
517 539 return (NULL);
518 540 }
519 541
520 542 static void *
521 543 contig_mem_span_xalloc(vmem_t *vmp, size_t *sizep, size_t align, int vmflag)
522 544 {
523 545 return (span_alloc_downsize(vmp, sizep, align, vmflag | VM_NORELOC));
524 546 }
525 547
526 548 static void *
527 549 contig_mem_reloc_span_xalloc(vmem_t *vmp, size_t *sizep, size_t align,
528 550 int vmflag)
529 551 {
530 552 ASSERT((vmflag & VM_NORELOC) == 0);
531 553 return (span_alloc_downsize(vmp, sizep, align, vmflag));
532 554 }
533 555
534 556 /*
535 557 * Free a span, which is always exactly one large page.
536 558 */
537 559 static void
538 560 contig_mem_span_free(vmem_t *vmp, void *inaddr, size_t size)
539 561 {
540 562 page_t *pp;
541 563 caddr_t addr = inaddr;
542 564 caddr_t eaddr;
543 565 pgcnt_t npages = btopr(size);
544 566 page_t *rootpp = NULL;
545 567
546 568 ASSERT(size <= contig_mem_import_size_max);
547 569 /* All slabs should be size aligned */
548 570 ASSERT(((uintptr_t)addr & (size - 1)) == 0);
549 571
550 572 hat_unload(kas.a_hat, addr, size, HAT_UNLOAD_UNLOCK);
551 573
552 574 for (eaddr = addr + size; addr < eaddr; addr += PAGESIZE) {
553 575 pp = page_find(&kvp, (u_offset_t)(uintptr_t)addr);
554 576 if (pp == NULL) {
555 577 panic("contig_mem_span_free: page not found");
556 578 }
557 579 if (!page_tryupgrade(pp)) {
558 580 page_unlock(pp);
559 581 pp = page_lookup(&kvp,
560 582 (u_offset_t)(uintptr_t)addr, SE_EXCL);
561 583 if (pp == NULL)
562 584 panic("contig_mem_span_free: page not found");
563 585 }
564 586
565 587 ASSERT(PAGE_EXCL(pp));
566 588 ASSERT(size == page_get_pagesize(pp->p_szc));
567 589 ASSERT(rootpp == NULL || rootpp->p_szc == pp->p_szc);
568 590 ASSERT(rootpp == NULL || (page_pptonum(rootpp) +
569 591 (pgcnt_t)btop(addr - (caddr_t)inaddr) == page_pptonum(pp)));
570 592
571 593 page_pp_unlock(pp, 0, 1);
572 594
573 595 if (rootpp == NULL)
574 596 rootpp = pp;
575 597 }
576 598 page_destroy_pages(rootpp);
577 599 page_unresv(npages);
578 600
579 601 if (vmp != NULL)
580 602 vmem_xfree(vmp, inaddr, size);
581 603 }
582 604
583 605 static void *
584 606 contig_vmem_xalloc_aligned_wrapper(vmem_t *vmp, size_t *sizep, size_t align,
585 607 int vmflag)
586 608 {
587 609 ASSERT((align & (align - 1)) == 0);
588 610 return (vmem_xalloc(vmp, *sizep, align, 0, 0, NULL, NULL, vmflag));
589 611 }
590 612
591 613 /*
592 614 * contig_mem_alloc, contig_mem_alloc_align
593 615 *
594 616 * Caution: contig_mem_alloc and contig_mem_alloc_align should be
595 617 * used only when physically contiguous non-relocatable memory is
596 618 * required. Furthermore, use of these allocation routines should be
597 619 * minimized as well as should the allocation size. As described in the
598 620 * contig_mem_arena comment block above, slab allocations fall back to
599 621 * being outside of the cage. Therefore, overuse of these allocation
600 622 * routines can lead to non-relocatable large pages being allocated
601 623 * outside the cage. Such pages prevent the allocation of a larger page
602 624 * occupying overlapping pages. This can impact performance for
603 625 * applications that utilize e.g. 256M large pages.
604 626 */
605 627
606 628 /*
607 629 * Allocates size aligned contiguous memory up to contig_mem_import_size_max.
608 630 * Size must be a power of 2.
609 631 */
610 632 void *
611 633 contig_mem_alloc(size_t size)
612 634 {
613 635 ASSERT((size & (size - 1)) == 0);
614 636 return (contig_mem_alloc_align(size, size));
615 637 }
616 638
617 639 /*
618 640 * contig_mem_alloc_align allocates real contiguous memory with the
619 641 * specified alignment up to contig_mem_import_size_max. The alignment must
620 642 * be a power of 2 and no greater than contig_mem_import_size_max. We assert
621 643 * the aligment is a power of 2. For non-debug, vmem_xalloc will panic
622 644 * for non power of 2 alignments.
623 645 */
624 646 void *
625 647 contig_mem_alloc_align(size_t size, size_t align)
626 648 {
627 649 void *buf;
628 650
629 651 ASSERT(size <= contig_mem_import_size_max);
630 652 ASSERT(align <= contig_mem_import_size_max);
631 653 ASSERT((align & (align - 1)) == 0);
632 654
633 655 if (align < CONTIG_MEM_ARENA_QUANTUM)
634 656 align = CONTIG_MEM_ARENA_QUANTUM;
635 657
636 658 /*
637 659 * We take the lock here to serialize span allocations.
638 660 * We do not lose concurrency for the common case, since
639 661 * allocations that don't require new span allocations
640 662 * are serialized by vmem_xalloc. Serializing span
641 663 * allocations also prevents us from trying to allocate
642 664 * more spans than necessary.
643 665 */
644 666 mutex_enter(&contig_mem_lock);
645 667
646 668 buf = vmem_xalloc(contig_mem_arena, size, align, 0, 0,
647 669 NULL, NULL, VM_NOSLEEP | VM_NORELOC);
648 670
649 671 if ((buf == NULL) && (size <= MMU_PAGESIZE)) {
650 672 mutex_exit(&contig_mem_lock);
651 673 return (vmem_xalloc(static_alloc_arena, size, align, 0, 0,
652 674 NULL, NULL, VM_NOSLEEP));
653 675 }
654 676
655 677 if (buf == NULL) {
656 678 buf = vmem_xalloc(contig_mem_reloc_arena, size, align, 0, 0,
657 679 NULL, NULL, VM_NOSLEEP);
658 680 }
659 681
660 682 mutex_exit(&contig_mem_lock);
661 683
662 684 return (buf);
663 685 }
664 686
665 687 void
666 688 contig_mem_free(void *vaddr, size_t size)
667 689 {
668 690 if (vmem_contains(contig_mem_arena, vaddr, size)) {
669 691 vmem_xfree(contig_mem_arena, vaddr, size);
670 692 } else if (size > MMU_PAGESIZE) {
671 693 vmem_xfree(contig_mem_reloc_arena, vaddr, size);
672 694 } else {
673 695 vmem_xfree(static_alloc_arena, vaddr, size);
674 696 }
675 697 }
676 698
677 699 /*
678 700 * We create a set of stacked vmem arenas to enable us to
679 701 * allocate large >PAGESIZE chucks of contiguous Real Address space.
680 702 * The vmem_xcreate interface is used to create the contig_mem_arena
681 703 * allowing the import routine to downsize the requested slab size
682 704 * and return a smaller slab.
683 705 */
684 706 void
685 707 contig_mem_init(void)
686 708 {
687 709 mutex_init(&contig_mem_lock, NULL, MUTEX_DEFAULT, NULL);
688 710
689 711 contig_mem_slab_arena = vmem_xcreate("contig_mem_slab_arena", NULL, 0,
690 712 CONTIG_MEM_SLAB_ARENA_QUANTUM, contig_vmem_xalloc_aligned_wrapper,
691 713 vmem_xfree, heap_arena, 0, VM_SLEEP | VMC_XALIGN);
692 714
693 715 contig_mem_arena = vmem_xcreate("contig_mem_arena", NULL, 0,
694 716 CONTIG_MEM_ARENA_QUANTUM, contig_mem_span_xalloc,
695 717 contig_mem_span_free, contig_mem_slab_arena, 0,
696 718 VM_SLEEP | VM_BESTFIT | VMC_XALIGN);
697 719
698 720 contig_mem_reloc_arena = vmem_xcreate("contig_mem_reloc_arena", NULL, 0,
699 721 CONTIG_MEM_ARENA_QUANTUM, contig_mem_reloc_span_xalloc,
700 722 contig_mem_span_free, contig_mem_slab_arena, 0,
701 723 VM_SLEEP | VM_BESTFIT | VMC_XALIGN);
702 724
703 725 if (contig_mem_prealloc_buf == NULL || vmem_add(contig_mem_arena,
704 726 contig_mem_prealloc_buf, contig_mem_prealloc_size, VM_SLEEP)
705 727 == NULL) {
706 728 cmn_err(CE_WARN, "Failed to pre-populate contig_mem_arena");
707 729 }
708 730 }
709 731
710 732 /*
711 733 * In calculating how much memory to pre-allocate, we include a small
712 734 * amount per-CPU to account for per-CPU buffers in line with measured
713 735 * values for different size systems. contig_mem_prealloc_base_size is
714 736 * a cpu specific amount to be pre-allocated before considering per-CPU
715 737 * requirements and memory size. We always pre-allocate a minimum amount
716 738 * of memory determined by PREALLOC_MIN. Beyond that, we take the minimum
717 739 * of contig_mem_prealloc_base_size and a small percentage of physical
718 740 * memory to prevent allocating too much on smaller systems.
719 741 * contig_mem_prealloc_base_size is global, allowing for the CPU module
720 742 * to increase its value if necessary.
721 743 */
722 744 #define PREALLOC_PER_CPU (256 * 1024) /* 256K */
723 745 #define PREALLOC_PERCENT (4) /* 4% */
724 746 #define PREALLOC_MIN (16 * 1024 * 1024) /* 16M */
725 747 size_t contig_mem_prealloc_base_size = 0;
726 748
727 749 /*
728 750 * Called at boot-time allowing pre-allocation of contiguous memory.
729 751 * The argument 'alloc_base' is the requested base address for the
730 752 * allocation and originates in startup_memlist.
731 753 */
732 754 caddr_t
733 755 contig_mem_prealloc(caddr_t alloc_base, pgcnt_t npages)
734 756 {
735 757 caddr_t chunkp;
736 758
737 759 contig_mem_prealloc_size = MIN((PREALLOC_PER_CPU * ncpu_guest_max) +
738 760 contig_mem_prealloc_base_size,
739 761 (ptob(npages) * PREALLOC_PERCENT) / 100);
740 762 contig_mem_prealloc_size = MAX(contig_mem_prealloc_size, PREALLOC_MIN);
741 763 contig_mem_prealloc_size = P2ROUNDUP(contig_mem_prealloc_size,
742 764 MMU_PAGESIZE4M);
743 765
744 766 alloc_base = (caddr_t)roundup((uintptr_t)alloc_base, MMU_PAGESIZE4M);
745 767 if (prom_alloc(alloc_base, contig_mem_prealloc_size,
746 768 MMU_PAGESIZE4M) != alloc_base) {
747 769
748 770 /*
749 771 * Failed. This may mean the physical memory has holes in it
750 772 * and it will be more difficult to get large contiguous
751 773 * pieces of memory. Since we only guarantee contiguous
752 774 * pieces of memory contig_mem_import_size_max or smaller,
753 775 * loop, getting contig_mem_import_size_max at a time, until
754 776 * failure or contig_mem_prealloc_size is reached.
755 777 */
756 778 for (chunkp = alloc_base;
757 779 (chunkp - alloc_base) < contig_mem_prealloc_size;
758 780 chunkp += contig_mem_import_size_max) {
759 781
760 782 if (prom_alloc(chunkp, contig_mem_import_size_max,
761 783 MMU_PAGESIZE4M) != chunkp) {
762 784 break;
763 785 }
764 786 }
765 787 contig_mem_prealloc_size = chunkp - alloc_base;
766 788 ASSERT(contig_mem_prealloc_size != 0);
767 789 }
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768 790
769 791 if (contig_mem_prealloc_size != 0) {
770 792 contig_mem_prealloc_buf = alloc_base;
771 793 } else {
772 794 contig_mem_prealloc_buf = NULL;
773 795 }
774 796 alloc_base += contig_mem_prealloc_size;
775 797
776 798 return (alloc_base);
777 799 }
778 -
779 -static uint_t sp_color_stride = 16;
780 -static uint_t sp_color_mask = 0x1f;
781 -static uint_t sp_current_color = (uint_t)-1;
782 -
783 -size_t
784 -exec_get_spslew(void)
785 -{
786 - uint_t spcolor = atomic_inc_32_nv(&sp_current_color);
787 - return ((size_t)((spcolor & sp_color_mask) * SA(sp_color_stride)));
788 -}
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