1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  23  * Use is subject to license terms.
  24  */
  25 
  26 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
  27 /*      All Rights Reserved   */
  28 
  29 /*
  30  * Portions of this source code were derived from Berkeley 4.3 BSD
  31  * under license from the Regents of the University of California.
  32  */
  33 
  34 /*
  35  * UNIX machine dependent virtual memory support.
  36  */
  37 
  38 #include <sys/vm.h>
  39 #include <sys/exec.h>
  40 #include <sys/cmn_err.h>
  41 #include <sys/cpu_module.h>
  42 #include <sys/cpu.h>
  43 #include <sys/elf_SPARC.h>
  44 #include <sys/archsystm.h>
  45 #include <vm/hat_sfmmu.h>
  46 #include <sys/memnode.h>
  47 #include <sys/mem_cage.h>
  48 #include <vm/vm_dep.h>
  49 
  50 #if defined(__sparcv9) && defined(SF_ERRATA_57)
  51 caddr_t errata57_limit;
  52 #endif
  53 
  54 uint_t page_colors = 0;
  55 uint_t page_colors_mask = 0;
  56 uint_t page_coloring_shift = 0;
  57 int consistent_coloring;
  58 int update_proc_pgcolorbase_after_fork = 0;
  59 
  60 uint_t mmu_page_sizes = DEFAULT_MMU_PAGE_SIZES;
  61 uint_t max_mmu_page_sizes = MMU_PAGE_SIZES;
  62 uint_t mmu_hashcnt = DEFAULT_MAX_HASHCNT;
  63 uint_t max_mmu_hashcnt = MAX_HASHCNT;
  64 size_t mmu_ism_pagesize = DEFAULT_ISM_PAGESIZE;
  65 
  66 /*
  67  * The sun4u hardware mapping sizes which will always be supported are
  68  * 8K, 64K, 512K and 4M.  If sun4u based machines need to support other
  69  * page sizes, platform or cpu specific routines need to modify the value.
  70  * The base pagesize (p_szc == 0) must always be supported by the hardware.
  71  */
  72 int mmu_exported_pagesize_mask = (1 << TTE8K) | (1 << TTE64K) |
  73         (1 << TTE512K) | (1 << TTE4M);
  74 uint_t mmu_exported_page_sizes;
  75 
  76 uint_t szc_2_userszc[MMU_PAGE_SIZES];
  77 uint_t userszc_2_szc[MMU_PAGE_SIZES];
  78 
  79 extern uint_t vac_colors_mask;
  80 extern int vac_shift;
  81 
  82 hw_pagesize_t hw_page_array[] = {
  83         {MMU_PAGESIZE, MMU_PAGESHIFT, 0, MMU_PAGESIZE >> MMU_PAGESHIFT},
  84         {MMU_PAGESIZE64K, MMU_PAGESHIFT64K, 0,
  85             MMU_PAGESIZE64K >> MMU_PAGESHIFT},
  86         {MMU_PAGESIZE512K, MMU_PAGESHIFT512K, 0,
  87             MMU_PAGESIZE512K >> MMU_PAGESHIFT},
  88         {MMU_PAGESIZE4M, MMU_PAGESHIFT4M, 0, MMU_PAGESIZE4M >> MMU_PAGESHIFT},
  89         {MMU_PAGESIZE32M, MMU_PAGESHIFT32M, 0,
  90             MMU_PAGESIZE32M >> MMU_PAGESHIFT},
  91         {MMU_PAGESIZE256M, MMU_PAGESHIFT256M, 0,
  92             MMU_PAGESIZE256M >> MMU_PAGESHIFT},
  93         {0, 0, 0, 0}
  94 };
  95 
  96 /*
  97  * Maximum page size used to map 64-bit memory segment kmem64_base..kmem64_end
  98  */
  99 int     max_bootlp_tteszc = TTE4M;
 100 
 101 /*
 102  * use_text_pgsz64k and use_text_pgsz512k allow the user to turn on these
 103  * additional text page sizes for USIII-IV+ and OPL by changing the default
 104  * values via /etc/system.
 105  */
 106 int     use_text_pgsz64K = 0;
 107 int     use_text_pgsz512K = 0;
 108 
 109 /*
 110  * Maximum and default segment size tunables for user heap, stack, private
 111  * and shared anonymous memory, and user text and initialized data.
 112  */
 113 size_t max_uheap_lpsize = MMU_PAGESIZE4M;
 114 size_t default_uheap_lpsize = MMU_PAGESIZE;
 115 size_t max_ustack_lpsize = MMU_PAGESIZE4M;
 116 size_t default_ustack_lpsize = MMU_PAGESIZE;
 117 size_t max_privmap_lpsize = MMU_PAGESIZE4M;
 118 size_t max_uidata_lpsize = MMU_PAGESIZE;
 119 size_t max_utext_lpsize = MMU_PAGESIZE4M;
 120 size_t max_shm_lpsize = MMU_PAGESIZE4M;
 121 
 122 void
 123 adjust_data_maxlpsize(size_t ismpagesize)
 124 {
 125         if (max_uheap_lpsize == MMU_PAGESIZE4M) {
 126                 max_uheap_lpsize = ismpagesize;
 127         }
 128         if (max_ustack_lpsize == MMU_PAGESIZE4M) {
 129                 max_ustack_lpsize = ismpagesize;
 130         }
 131         if (max_privmap_lpsize == MMU_PAGESIZE4M) {
 132                 max_privmap_lpsize = ismpagesize;
 133         }
 134         if (max_shm_lpsize == MMU_PAGESIZE4M) {
 135                 max_shm_lpsize = ismpagesize;
 136         }
 137 }
 138 
 139 /*
 140  * map_addr_proc() is the routine called when the system is to
 141  * choose an address for the user.  We will pick an address
 142  * range which is just below the current stack limit.  The
 143  * algorithm used for cache consistency on machines with virtual
 144  * address caches is such that offset 0 in the vnode is always
 145  * on a shm_alignment'ed aligned address.  Unfortunately, this
 146  * means that vnodes which are demand paged will not be mapped
 147  * cache consistently with the executable images.  When the
 148  * cache alignment for a given object is inconsistent, the
 149  * lower level code must manage the translations so that this
 150  * is not seen here (at the cost of efficiency, of course).
 151  *
 152  * Every mapping will have a redzone of a single page on either side of
 153  * the request. This is done to leave one page unmapped between segments.
 154  * This is not required, but it's useful for the user because if their
 155  * program strays across a segment boundary, it will catch a fault
 156  * immediately making debugging a little easier.  Currently the redzone
 157  * is mandatory.
 158  *
 159  *
 160  * addrp is a value/result parameter.
 161  *      On input it is a hint from the user to be used in a completely
 162  *      machine dependent fashion.  For MAP_ALIGN, addrp contains the
 163  *      minimal alignment, which must be some "power of two" multiple of
 164  *      pagesize.
 165  *
 166  *      On output it is NULL if no address can be found in the current
 167  *      processes address space or else an address that is currently
 168  *      not mapped for len bytes with a page of red zone on either side.
 169  *      If vacalign is true, then the selected address will obey the alignment
 170  *      constraints of a vac machine based on the given off value.
 171  */
 172 /*ARGSUSED4*/
 173 void
 174 map_addr_proc(caddr_t *addrp, size_t len, offset_t off, int vacalign,
 175     caddr_t userlimit, struct proc *p, uint_t flags)
 176 {
 177         struct as *as = p->p_as;
 178         caddr_t addr;
 179         caddr_t base;
 180         size_t slen;
 181         uintptr_t align_amount;
 182         int allow_largepage_alignment = 1;
 183 
 184         base = p->p_brkbase;
 185         if (userlimit < as->a_userlimit) {
 186                 /*
 187                  * This happens when a program wants to map something in
 188                  * a range that's accessible to a program in a smaller
 189                  * address space.  For example, a 64-bit program might
 190                  * be calling mmap32(2) to guarantee that the returned
 191                  * address is below 4Gbytes.
 192                  */
 193                 ASSERT(userlimit > base);
 194                 slen = userlimit - base;
 195         } else {
 196                 slen = p->p_usrstack - base -
 197                     ((p->p_stk_ctl + PAGEOFFSET) & PAGEMASK);
 198         }
 199 
 200         /* Make len be a multiple of PAGESIZE */
 201         len = (len + PAGEOFFSET) & PAGEMASK;
 202 
 203         /*
 204          *  If the request is larger than the size of a particular
 205          *  mmu level, then we use that level to map the request.
 206          *  But this requires that both the virtual and the physical
 207          *  addresses be aligned with respect to that level, so we
 208          *  do the virtual bit of nastiness here.
 209          *
 210          *  For 32-bit processes, only those which have specified
 211          *  MAP_ALIGN or an addr will be aligned on a page size > 4MB. Otherwise
 212          *  we can potentially waste up to 256MB of the 4G process address
 213          *  space just for alignment.
 214          */
 215         if (p->p_model == DATAMODEL_ILP32 && ((flags & MAP_ALIGN) == 0 ||
 216             ((uintptr_t)*addrp) != 0)) {
 217                 allow_largepage_alignment = 0;
 218         }
 219         if ((mmu_page_sizes == max_mmu_page_sizes) &&
 220             allow_largepage_alignment &&
 221             (len >= MMU_PAGESIZE256M)) {     /* 256MB mappings */
 222                 align_amount = MMU_PAGESIZE256M;
 223         } else if ((mmu_page_sizes == max_mmu_page_sizes) &&
 224             allow_largepage_alignment &&
 225             (len >= MMU_PAGESIZE32M)) {      /* 32MB mappings */
 226                 align_amount = MMU_PAGESIZE32M;
 227         } else if (len >= MMU_PAGESIZE4M) {  /* 4MB mappings */
 228                 align_amount = MMU_PAGESIZE4M;
 229         } else if (len >= MMU_PAGESIZE512K) { /* 512KB mappings */
 230                 align_amount = MMU_PAGESIZE512K;
 231         } else if (len >= MMU_PAGESIZE64K) { /* 64KB mappings */
 232                 align_amount = MMU_PAGESIZE64K;
 233         } else  {
 234                 /*
 235                  * Align virtual addresses on a 64K boundary to ensure
 236                  * that ELF shared libraries are mapped with the appropriate
 237                  * alignment constraints by the run-time linker.
 238                  */
 239                 align_amount = ELF_SPARC_MAXPGSZ;
 240                 if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp != 0) &&
 241                     ((uintptr_t)*addrp < align_amount))
 242                         align_amount = (uintptr_t)*addrp;
 243         }
 244 
 245         /*
 246          * 64-bit processes require 1024K alignment of ELF shared libraries.
 247          */
 248         if (p->p_model == DATAMODEL_LP64)
 249                 align_amount = MAX(align_amount, ELF_SPARCV9_MAXPGSZ);
 250 #ifdef VAC
 251         if (vac && vacalign && (align_amount < shm_alignment))
 252                 align_amount = shm_alignment;
 253 #endif
 254 
 255         if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp > align_amount)) {
 256                 align_amount = (uintptr_t)*addrp;
 257         }
 258 
 259         ASSERT(ISP2(align_amount));
 260         ASSERT(align_amount == 0 || align_amount >= PAGESIZE);
 261 
 262         /*
 263          * Look for a large enough hole starting below the stack limit.
 264          * After finding it, use the upper part.
 265          */
 266         as_purge(as);
 267         off = off & (align_amount - 1);
 268         if (as_gap_aligned(as, len, &base, &slen, AH_HI, NULL, align_amount,
 269             PAGESIZE, off) == 0) {
 270                 caddr_t as_addr;
 271 
 272                 /*
 273                  * addr is the highest possible address to use since we have
 274                  * a PAGESIZE redzone at the beginning and end.
 275                  */
 276                 addr = base + slen - (PAGESIZE + len);
 277                 as_addr = addr;
 278                 /*
 279                  * Round address DOWN to the alignment amount and
 280                  * add the offset in.
 281                  * If addr is greater than as_addr, len would not be large
 282                  * enough to include the redzone, so we must adjust down
 283                  * by the alignment amount.
 284                  */
 285                 addr = (caddr_t)((uintptr_t)addr & (~(align_amount - 1l)));
 286                 addr += (long)off;
 287                 if (addr > as_addr) {
 288                         addr -= align_amount;
 289                 }
 290 
 291                 ASSERT(addr > base);
 292                 ASSERT(addr + len < base + slen);
 293                 ASSERT(((uintptr_t)addr & (align_amount - 1l)) ==
 294                     ((uintptr_t)(off)));
 295                 *addrp = addr;
 296 
 297 #if defined(SF_ERRATA_57)
 298                 if (AS_TYPE_64BIT(as) && addr < errata57_limit) {
 299                         *addrp = NULL;
 300                 }
 301 #endif
 302         } else {
 303                 *addrp = NULL;  /* no more virtual space */
 304         }
 305 }
 306 
 307 /*
 308  * Platform-dependent page scrub call.
 309  */
 310 void
 311 pagescrub(page_t *pp, uint_t off, uint_t len)
 312 {
 313         /*
 314          * For now, we rely on the fact that pagezero() will
 315          * always clear UEs.
 316          */
 317         pagezero(pp, off, len);
 318 }
 319 
 320 /*ARGSUSED*/
 321 void
 322 sync_data_memory(caddr_t va, size_t len)
 323 {
 324         cpu_flush_ecache();
 325 }
 326 
 327 /*
 328  * platform specific large pages for kernel heap support
 329  */
 330 void
 331 mmu_init_kcontext()
 332 {
 333         extern void set_kcontextreg();
 334 
 335         if (kcontextreg)
 336                 set_kcontextreg();
 337 }
 338 
 339 void
 340 contig_mem_init(void)
 341 {
 342         /* not applicable to sun4u */
 343 }
 344 
 345 /*ARGSUSED*/
 346 caddr_t
 347 contig_mem_prealloc(caddr_t alloc_base, pgcnt_t npages)
 348 {
 349         /* not applicable to sun4u */
 350         return (alloc_base);
 351 }
 352 
 353 size_t
 354 exec_get_spslew(void)
 355 {
 356         return (0);
 357 }