1 #ifndef IO_H
2 #define IO_H
3
4
5 /* Amount of relocation etherboot is experiencing */
6 extern unsigned long virt_offset;
7
8 /* Don't require identity mapped physical memory,
9 * osloader.c is the only valid user at the moment.
10 */
11 unsigned long virt_to_phys(volatile const void *virt_addr);
12 void *phys_to_virt(unsigned long phys_addr);
13
14 /* virt_to_bus converts an addresss inside of etherboot [_start, _end]
15 * into a memory access cards can use.
16 */
17 #define virt_to_bus virt_to_phys
18
19
20 /* bus_to_virt reverses virt_to_bus, the address must be output
21 * from virt_to_bus to be valid. This function does not work on
22 * all bus addresses.
23 */
24 #define bus_to_virt phys_to_virt
102 *
103 * I expect future Intel CPU's to have a weaker ordering,
104 * but I'd also expect them to finally get their act together
105 * and add some real memory barriers if so.
106 *
107 * Some non intel clones support out of order store. wmb() ceases to be a
108 * nop for these.
109 */
110
111 #define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
112 #define rmb() mb()
113 #define wmb() mb();
114
115
116 /*
117 * Talk about misusing macros..
118 */
119
120 #define __OUT1(s,x) \
121 extern void __out##s(unsigned x value, unsigned short port); \
122 extern inline void __out##s(unsigned x value, unsigned short port) {
123
124 #define __OUT2(s,s1,s2) \
125 __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
126
127 #define __OUT(s,s1,x) \
128 __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "d" (port)); } \
129 __OUT1(s##c,x) __OUT2(s,s1,"") : : "a" (value), "id" (port)); } \
130 __OUT1(s##_p,x) __OUT2(s,s1,"w") : : "a" (value), "d" (port)); SLOW_DOWN_IO; } \
131 __OUT1(s##c_p,x) __OUT2(s,s1,"") : : "a" (value), "id" (port)); SLOW_DOWN_IO; }
132
133 #define __IN1(s,x) \
134 extern unsigned x __in##s(unsigned short port); \
135 extern inline unsigned x __in##s(unsigned short port) { unsigned x _v;
136
137 #define __IN2(s,s1,s2) \
138 __asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
139
140 #define __IN(s,s1,x,i...) \
141 __IN1(s,x) __IN2(s,s1,"w") : "=a" (_v) : "d" (port) ,##i ); return _v; } \
142 __IN1(s##c,x) __IN2(s,s1,"") : "=a" (_v) : "id" (port) ,##i ); return _v; } \
143 __IN1(s##_p,x) __IN2(s,s1,"w") : "=a" (_v) : "d" (port) ,##i ); SLOW_DOWN_IO; return _v; } \
144 __IN1(s##c_p,x) __IN2(s,s1,"") : "=a" (_v) : "id" (port) ,##i ); SLOW_DOWN_IO; return _v; }
145
146 #define __INS(s) \
147 extern void ins##s(unsigned short port, void * addr, unsigned long count); \
148 extern inline void ins##s(unsigned short port, void * addr, unsigned long count) \
149 { __asm__ __volatile__ ("cld ; rep ; ins" #s \
150 : "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
151
152 #define __OUTS(s) \
153 extern void outs##s(unsigned short port, const void * addr, unsigned long count); \
154 extern inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
155 { __asm__ __volatile__ ("cld ; rep ; outs" #s \
156 : "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
157
158 __IN(b,"", char)
159 __IN(w,"",short)
160 __IN(l,"", long)
161
162 __OUT(b,"b",char)
163 __OUT(w,"w",short)
164 __OUT(l,,int)
165
166 __INS(b)
167 __INS(w)
168 __INS(l)
169
170 __OUTS(b)
171 __OUTS(w)
172 __OUTS(l)
173
174 /*
|
1 #include <sys/ccompile.h>
2
3 #ifndef IO_H
4 #define IO_H
5
6 /* Amount of relocation etherboot is experiencing */
7 extern unsigned long virt_offset;
8
9 /* Don't require identity mapped physical memory,
10 * osloader.c is the only valid user at the moment.
11 */
12 unsigned long virt_to_phys(volatile const void *virt_addr);
13 void *phys_to_virt(unsigned long phys_addr);
14
15 /* virt_to_bus converts an addresss inside of etherboot [_start, _end]
16 * into a memory access cards can use.
17 */
18 #define virt_to_bus virt_to_phys
19
20
21 /* bus_to_virt reverses virt_to_bus, the address must be output
22 * from virt_to_bus to be valid. This function does not work on
23 * all bus addresses.
24 */
25 #define bus_to_virt phys_to_virt
103 *
104 * I expect future Intel CPU's to have a weaker ordering,
105 * but I'd also expect them to finally get their act together
106 * and add some real memory barriers if so.
107 *
108 * Some non intel clones support out of order store. wmb() ceases to be a
109 * nop for these.
110 */
111
112 #define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
113 #define rmb() mb()
114 #define wmb() mb();
115
116
117 /*
118 * Talk about misusing macros..
119 */
120
121 #define __OUT1(s,x) \
122 extern void __out##s(unsigned x value, unsigned short port); \
123 extern __GNU_INLINE \
124 void __out##s(unsigned x value, unsigned short port) {
125
126 #define __OUT2(s,s1,s2) \
127 __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
128
129 #define __OUT(s,s1,x) \
130 __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "d" (port)); } \
131 __OUT1(s##c,x) __OUT2(s,s1,"") : : "a" (value), "id" (port)); } \
132 __OUT1(s##_p,x) __OUT2(s,s1,"w") : : "a" (value), "d" (port)); SLOW_DOWN_IO; } \
133 __OUT1(s##c_p,x) __OUT2(s,s1,"") : : "a" (value), "id" (port)); SLOW_DOWN_IO; }
134
135 #define __IN1(s,x) \
136 extern unsigned x __in##s(unsigned short port); \
137 extern __GNU_INLINE \
138 unsigned x __in##s(unsigned short port) { unsigned x _v;
139
140 #define __IN2(s,s1,s2) \
141 __asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
142
143 #define __IN(s,s1,x,i...) \
144 __IN1(s,x) __IN2(s,s1,"w") : "=a" (_v) : "d" (port) ,##i ); return _v; } \
145 __IN1(s##c,x) __IN2(s,s1,"") : "=a" (_v) : "id" (port) ,##i ); return _v; } \
146 __IN1(s##_p,x) __IN2(s,s1,"w") : "=a" (_v) : "d" (port) ,##i ); SLOW_DOWN_IO; return _v; } \
147 __IN1(s##c_p,x) __IN2(s,s1,"") : "=a" (_v) : "id" (port) ,##i ); SLOW_DOWN_IO; return _v; }
148
149 #define __INS(s) \
150 extern void ins##s(unsigned short port, void * addr, unsigned long count); \
151 extern __GNU_INLINE \
152 void ins##s(unsigned short port, void * addr, unsigned long count) \
153 { __asm__ __volatile__ ("cld ; rep ; ins" #s \
154 : "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
155
156 #define __OUTS(s) \
157 extern void outs##s(unsigned short port, const void * addr, unsigned long count); \
158 extern __GNU_INLINE \
159 void outs##s(unsigned short port, const void * addr, unsigned long count) \
160 { __asm__ __volatile__ ("cld ; rep ; outs" #s \
161 : "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
162
163 __IN(b,"", char)
164 __IN(w,"",short)
165 __IN(l,"", long)
166
167 __OUT(b,"b",char)
168 __OUT(w,"w",short)
169 __OUT(l,,int)
170
171 __INS(b)
172 __INS(w)
173 __INS(l)
174
175 __OUTS(b)
176 __OUTS(w)
177 __OUTS(l)
178
179 /*
|