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11210 libm should be cstyle(1ONBLD) clean
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--- old/usr/src/lib/libm/common/m9x/fenv_inlines.h
+++ new/usr/src/lib/libm/common/m9x/fenv_inlines.h
1 1 /*
2 2 * This file and its contents are supplied under the terms of the
3 3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 4 * You may only use this file in accordance with the terms of version
5 5 * 1.0 of the CDDL.
6 6 *
7 7 * A full copy of the text of the CDDL should have accompanied this
8 8 * source. A copy of the CDDL is also available via the Internet at
9 9 * http://www.illumos.org/license/CDDL.
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10 10 */
11 11
12 12 /*
13 13 * Copyright 2011, Richard Lowe
14 14 */
15 15
16 16 #ifndef _FENV_INLINES_H
17 17 #define _FENV_INLINES_H
18 18
19 19 #ifdef __GNUC__
20 -
21 20 #ifdef __cplusplus
22 21 extern "C" {
23 22 #endif
24 23
25 24 #include <sys/types.h>
26 25
27 26 #if defined(__x86)
28 -
29 27 /*
30 28 * Floating point Control Word and Status Word
31 29 * Definition should actually be shared with x86
32 30 * (much of this 'amd64' code can be, in fact.)
33 31 */
34 32 union fp_cwsw {
35 33 uint32_t cwsw;
36 34 struct {
37 35 uint16_t cw;
38 36 uint16_t sw;
39 37 } words;
40 38 };
41 39
42 40 extern __GNU_INLINE void
43 41 __fenv_getcwsw(unsigned int *value)
44 42 {
45 43 union fp_cwsw *u = (union fp_cwsw *)value;
46 44
47 45 __asm__ __volatile__(
48 46 "fstsw %0\n\t"
49 47 "fstcw %1\n\t"
50 48 : "=m" (u->words.cw), "=m" (u->words.sw));
51 49 }
52 50
53 51 extern __GNU_INLINE void
54 52 __fenv_setcwsw(const unsigned int *value)
55 53 {
56 54 union fp_cwsw cwsw;
57 55 short fenv[16];
58 56
59 57 cwsw.cwsw = *value;
60 58
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61 59 __asm__ __volatile__(
62 60 "fstenv %0\n\t"
63 61 "movw %4,%1\n\t"
64 62 "movw %3,%2\n\t"
65 63 "fldenv %0\n\t"
66 64 "fwait\n\t"
67 65 : "=m" (fenv), "=m" (fenv[0]), "=m" (fenv[2])
68 66 : "r" (cwsw.words.cw), "r" (cwsw.words.sw)
69 67 /* For practical purposes, we clobber the whole FPU */
70 68 : "cc", "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)",
71 - "st(6)", "st(7)");
69 + "st(6)", "st(7)");
72 70 }
73 71
74 72 extern __GNU_INLINE void
75 73 __fenv_getmxcsr(unsigned int *value)
76 74 {
77 75 __asm__ __volatile__("stmxcsr %0" : "=m" (*value));
78 76 }
79 77
80 78 extern __GNU_INLINE void
81 79 __fenv_setmxcsr(const unsigned int *value)
82 80 {
83 81 __asm__ __volatile__("ldmxcsr %0" : : "m" (*value));
84 82 }
85 83
86 84 extern __GNU_INLINE long double
87 85 f2xm1(long double x)
88 86 {
89 87 long double ret;
90 88
91 89 __asm__ __volatile__("f2xm1" : "=t" (ret) : "0" (x) : "cc");
92 90 return (ret);
93 91 }
94 92
95 93 extern __GNU_INLINE long double
96 94 fyl2x(long double y, long double x)
97 95 {
98 96 long double ret;
99 97
100 98 __asm__ __volatile__("fyl2x"
101 99 : "=t" (ret)
102 100 : "0" (x), "u" (y)
103 101 : "st(1)", "cc");
104 102 return (ret);
105 103 }
106 104
107 105 extern __GNU_INLINE long double
108 106 fptan(long double x)
109 107 {
110 108 /*
111 109 * fptan pushes 1.0 then the result on completion, so we want to pop
112 110 * the FP stack twice, so we need a dummy value into which to pop it.
113 111 */
114 112 long double ret;
115 113 long double dummy;
116 114
117 115 __asm__ __volatile__("fptan"
118 116 : "=t" (dummy), "=u" (ret)
119 117 : "0" (x)
120 118 : "cc");
121 119 return (ret);
122 120 }
123 121
124 122 extern __GNU_INLINE long double
125 123 fpatan(long double x, long double y)
126 124 {
127 125 long double ret;
128 126
129 127 __asm__ __volatile__("fpatan"
130 128 : "=t" (ret)
131 129 : "0" (y), "u" (x)
132 130 : "st(1)", "cc");
133 131 return (ret);
134 132 }
135 133
136 134 extern __GNU_INLINE long double
137 135 fxtract(long double x)
138 136 {
139 137 __asm__ __volatile__("fxtract" : "+t" (x) : : "cc");
140 138 return (x);
141 139 }
142 140
143 141 extern __GNU_INLINE long double
144 142 fprem1(long double idend, long double div)
145 143 {
146 144 __asm__ __volatile__("fprem1" : "+t" (div) : "u" (idend) : "cc");
147 145 return (div);
148 146 }
149 147
150 148 extern __GNU_INLINE long double
151 149 fprem(long double idend, long double div)
152 150 {
153 151 __asm__ __volatile__("fprem" : "+t" (div) : "u" (idend) : "cc");
154 152 return (div);
155 153 }
156 154
157 155 extern __GNU_INLINE long double
158 156 fyl2xp1(long double y, long double x)
159 157 {
160 158 long double ret;
161 159
162 160 __asm__ __volatile__("fyl2xp1"
163 161 : "=t" (ret)
164 162 : "0" (x), "u" (y)
165 163 : "st(1)", "cc");
166 164 return (ret);
167 165 }
168 166
169 167 extern __GNU_INLINE long double
170 168 fsqrt(long double x)
171 169 {
172 170 __asm__ __volatile__("fsqrt" : "+t" (x) : : "cc");
173 171 return (x);
174 172 }
175 173
176 174 extern __GNU_INLINE long double
177 175 fsincos(long double x)
178 176 {
179 177 long double dummy;
180 178
181 179 __asm__ __volatile__("fsincos" : "+t" (x), "=u" (dummy) : : "cc");
182 180 return (x);
183 181 }
184 182
185 183 extern __GNU_INLINE long double
186 184 frndint(long double x)
187 185 {
188 186 __asm__ __volatile__("frndint" : "+t" (x) : : "cc");
189 187 return (x);
190 188 }
191 189
192 190 extern __GNU_INLINE long double
193 191 fscale(long double x, long double y)
194 192 {
195 193 long double ret;
196 194
197 195 __asm__ __volatile__("fscale" : "=t" (ret) : "0" (y), "u" (x) : "cc");
198 196 return (ret);
199 197 }
200 198
201 199 extern __GNU_INLINE long double
202 200 fsin(long double x)
203 201 {
204 202 __asm__ __volatile__("fsin" : "+t" (x) : : "cc");
205 203 return (x);
206 204 }
207 205
208 206 extern __GNU_INLINE long double
209 207 fcos(long double x)
210 208 {
211 209 __asm__ __volatile__("fcos" : "+t" (x) : : "cc");
212 210 return (x);
213 211 }
214 212
215 213 extern __GNU_INLINE void
216 214 sse_cmpeqss(float *f1, float *f2, int *i1)
217 215 {
218 216 __asm__ __volatile__(
219 217 "cmpeqss %2, %1\n\t"
220 218 "movss %1, %0"
221 219 : "=m" (*i1), "+x" (*f1)
222 220 : "x" (*f2)
223 221 : "cc");
224 222 }
225 223
226 224 extern __GNU_INLINE void
227 225 sse_cmpltss(float *f1, float *f2, int *i1)
228 226 {
229 227 __asm__ __volatile__(
230 228 "cmpltss %2, %1\n\t"
231 229 "movss %1, %0"
232 230 : "=m" (*i1), "+x" (*f1)
233 231 : "x" (*f2)
234 232 : "cc");
235 233 }
236 234
237 235 extern __GNU_INLINE void
238 236 sse_cmpless(float *f1, float *f2, int *i1)
239 237 {
240 238 __asm__ __volatile__(
241 239 "cmpless %2, %1\n\t"
242 240 "movss %1, %0"
243 241 : "=m" (*i1), "+x" (*f1)
244 242 : "x" (*f2)
245 243 : "cc");
246 244 }
247 245
248 246 extern __GNU_INLINE void
249 247 sse_cmpunordss(float *f1, float *f2, int *i1)
250 248 {
251 249 __asm__ __volatile__(
252 250 "cmpunordss %2, %1\n\t"
253 251 "movss %1, %0"
254 252 : "=m" (*i1), "+x" (*f1)
255 253 : "x" (*f2)
256 254 : "cc");
257 255 }
258 256
259 257 extern __GNU_INLINE void
260 258 sse_minss(float *f1, float *f2, float *f3)
261 259 {
262 260 __asm__ __volatile__(
263 261 "minss %2, %1\n\t"
264 262 "movss %1, %0"
265 263 : "=m" (*f3), "+x" (*f1)
266 264 : "x" (*f2));
267 265 }
268 266
269 267 extern __GNU_INLINE void
270 268 sse_maxss(float *f1, float *f2, float *f3)
271 269 {
272 270 __asm__ __volatile__(
273 271 "maxss %2, %1\n\t"
274 272 "movss %1, %0"
275 273 : "=m" (*f3), "+x" (*f1)
276 274 : "x" (*f2));
277 275 }
278 276
279 277 extern __GNU_INLINE void
280 278 sse_addss(float *f1, float *f2, float *f3)
281 279 {
282 280 __asm__ __volatile__(
283 281 "addss %2, %1\n\t"
284 282 "movss %1, %0"
285 283 : "=m" (*f3), "+x" (*f1)
286 284 : "x" (*f2));
287 285 }
288 286
289 287 extern __GNU_INLINE void
290 288 sse_subss(float *f1, float *f2, float *f3)
291 289 {
292 290 __asm__ __volatile__(
293 291 "subss %2, %1\n\t"
294 292 "movss %1, %0"
295 293 : "=m" (*f3), "+x" (*f1)
296 294 : "x" (*f2));
297 295 }
298 296
299 297 extern __GNU_INLINE void
300 298 sse_mulss(float *f1, float *f2, float *f3)
301 299 {
302 300 __asm__ __volatile__(
303 301 "mulss %2, %1\n\t"
304 302 "movss %1, %0"
305 303 : "=m" (*f3), "+x" (*f1)
306 304 : "x" (*f2));
307 305 }
308 306
309 307 extern __GNU_INLINE void
310 308 sse_divss(float *f1, float *f2, float *f3)
311 309 {
312 310 __asm__ __volatile__(
313 311 "divss %2, %1\n\t"
314 312 "movss %1, %0"
315 313 : "=m" (*f3), "+x" (*f1)
316 314 : "x" (*f2));
317 315 }
318 316
319 317 extern __GNU_INLINE void
320 318 sse_sqrtss(float *f1, float *f2)
321 319 {
322 320 double tmp;
323 321
324 322 __asm__ __volatile__(
325 323 "sqrtss %2, %1\n\t"
326 324 "movss %1, %0"
327 325 : "=m" (*f2), "=x" (tmp)
328 326 : "m" (*f1));
329 327 }
330 328
331 329 extern __GNU_INLINE void
332 330 sse_ucomiss(float *f1, float *f2)
333 331 {
334 332 __asm__ __volatile__("ucomiss %1, %0" : : "x" (*f1), "x" (*f2));
335 333
336 334 }
337 335
338 336 extern __GNU_INLINE void
339 337 sse_comiss(float *f1, float *f2)
340 338 {
341 339 __asm__ __volatile__("comiss %1, %0" : : "x" (*f1), "x" (*f2));
342 340 }
343 341
344 342 extern __GNU_INLINE void
345 343 sse_cvtss2sd(float *f1, double *d1)
346 344 {
347 345 double tmp;
348 346
349 347 __asm__ __volatile__(
350 348 "cvtss2sd %2, %1\n\t"
351 349 "movsd %1, %0"
352 350 : "=m" (*d1), "=x" (tmp)
353 351 : "m" (*f1));
354 352 }
355 353
356 354 extern __GNU_INLINE void
357 355 sse_cvtsi2ss(int *i1, float *f1)
358 356 {
359 357 double tmp;
360 358
361 359 __asm__ __volatile__(
362 360 "cvtsi2ss %2, %1\n\t"
363 361 "movss %1, %0"
364 362 : "=m" (*f1), "=x" (tmp)
365 363 : "m" (*i1));
366 364 }
367 365
368 366 extern __GNU_INLINE void
369 367 sse_cvttss2si(float *f1, int *i1)
370 368 {
371 369 int tmp;
372 370
373 371 __asm__ __volatile__(
374 372 "cvttss2si %2, %1\n\t"
375 373 "movl %1, %0"
376 374 : "=m" (*i1), "=r" (tmp)
377 375 : "m" (*f1));
378 376 }
379 377
380 378 extern __GNU_INLINE void
381 379 sse_cvtss2si(float *f1, int *i1)
382 380 {
383 381 int tmp;
384 382
385 383 __asm__ __volatile__(
386 384 "cvtss2si %2, %1\n\t"
387 385 "movl %1, %0"
388 386 : "=m" (*i1), "=r" (tmp)
389 387 : "m" (*f1));
390 388 }
391 389
392 390 #if defined(__amd64)
393 391 extern __GNU_INLINE void
394 392 sse_cvtsi2ssq(long long *ll1, float *f1)
395 393 {
396 394 double tmp;
397 395
398 396 __asm__ __volatile__(
399 397 "cvtsi2ssq %2, %1\n\t"
400 398 "movss %1, %0"
401 399 : "=m" (*f1), "=x" (tmp)
402 400 : "m" (*ll1));
403 401 }
404 402
405 403 extern __GNU_INLINE void
406 404 sse_cvttss2siq(float *f1, long long *ll1)
407 405 {
408 406 uint64_t tmp;
409 407
410 408 __asm__ __volatile__(
411 409 "cvttss2siq %2, %1\n\t"
412 410 "movq %1, %0"
413 411 : "=m" (*ll1), "=r" (tmp)
414 412 : "m" (*f1));
415 413 }
416 414
417 415 extern __GNU_INLINE void
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418 416 sse_cvtss2siq(float *f1, long long *ll1)
419 417 {
420 418 uint64_t tmp;
421 419
422 420 __asm__ __volatile__(
423 421 "cvtss2siq %2, %1\n\t"
424 422 "movq %1, %0"
425 423 : "=m" (*ll1), "=r" (tmp)
426 424 : "m" (*f1));
427 425 }
428 -
429 426 #endif
430 427
431 428 extern __GNU_INLINE void
432 429 sse_cmpeqsd(double *d1, double *d2, long long *ll1)
433 430 {
434 431 __asm__ __volatile__(
435 432 "cmpeqsd %2,%1\n\t"
436 433 "movsd %1,%0"
437 434 : "=m" (*ll1), "+x" (*d1)
438 435 : "x" (*d2));
439 436 }
440 437
441 438 extern __GNU_INLINE void
442 439 sse_cmpltsd(double *d1, double *d2, long long *ll1)
443 440 {
444 441 __asm__ __volatile__(
445 442 "cmpltsd %2,%1\n\t"
446 443 "movsd %1,%0"
447 444 : "=m" (*ll1), "+x" (*d1)
448 445 : "x" (*d2));
449 446 }
450 447
451 448 extern __GNU_INLINE void
452 449 sse_cmplesd(double *d1, double *d2, long long *ll1)
453 450 {
454 451 __asm__ __volatile__(
455 452 "cmplesd %2,%1\n\t"
456 453 "movsd %1,%0"
457 454 : "=m" (*ll1), "+x" (*d1)
458 455 : "x" (*d2));
459 456 }
460 457
461 458 extern __GNU_INLINE void
462 459 sse_cmpunordsd(double *d1, double *d2, long long *ll1)
463 460 {
464 461 __asm__ __volatile__(
465 462 "cmpunordsd %2,%1\n\t"
466 463 "movsd %1,%0"
467 464 : "=m" (*ll1), "+x" (*d1)
468 465 : "x" (*d2));
469 466 }
470 467
471 468
472 469 extern __GNU_INLINE void
473 470 sse_minsd(double *d1, double *d2, double *d3)
474 471 {
475 472 __asm__ __volatile__(
476 473 "minsd %2,%1\n\t"
477 474 "movsd %1,%0"
478 475 : "=m" (*d3), "+x" (*d1)
479 476 : "x" (*d2));
480 477 }
481 478
482 479 extern __GNU_INLINE void
483 480 sse_maxsd(double *d1, double *d2, double *d3)
484 481 {
485 482 __asm__ __volatile__(
486 483 "maxsd %2,%1\n\t"
487 484 "movsd %1,%0"
488 485 : "=m" (*d3), "+x" (*d1)
489 486 : "x" (*d2));
490 487 }
491 488
492 489 extern __GNU_INLINE void
493 490 sse_addsd(double *d1, double *d2, double *d3)
494 491 {
495 492 __asm__ __volatile__(
496 493 "addsd %2,%1\n\t"
497 494 "movsd %1,%0"
498 495 : "=m" (*d3), "+x" (*d1)
499 496 : "x" (*d2));
500 497 }
501 498
502 499 extern __GNU_INLINE void
503 500 sse_subsd(double *d1, double *d2, double *d3)
504 501 {
505 502 __asm__ __volatile__(
506 503 "subsd %2,%1\n\t"
507 504 "movsd %1,%0"
508 505 : "=m" (*d3), "+x" (*d1)
509 506 : "x" (*d2));
510 507 }
511 508
512 509 extern __GNU_INLINE void
513 510 sse_mulsd(double *d1, double *d2, double *d3)
514 511 {
515 512 __asm__ __volatile__(
516 513 "mulsd %2,%1\n\t"
517 514 "movsd %1,%0"
518 515 : "=m" (*d3), "+x" (*d1)
519 516 : "x" (*d2));
520 517 }
521 518
522 519 extern __GNU_INLINE void
523 520 sse_divsd(double *d1, double *d2, double *d3)
524 521 {
525 522 __asm__ __volatile__(
526 523 "divsd %2,%1\n\t"
527 524 "movsd %1,%0"
528 525 : "=m" (*d3), "+x" (*d1)
529 526 : "x" (*d2));
530 527 }
531 528
532 529 extern __GNU_INLINE void
533 530 sse_sqrtsd(double *d1, double *d2)
534 531 {
535 532 double tmp;
536 533
537 534 __asm__ __volatile__(
538 535 "sqrtsd %2, %1\n\t"
539 536 "movsd %1, %0"
540 537 : "=m" (*d2), "=x" (tmp)
541 538 : "m" (*d1));
542 539 }
543 540
544 541 extern __GNU_INLINE void
545 542 sse_ucomisd(double *d1, double *d2)
546 543 {
547 544 __asm__ __volatile__("ucomisd %1, %0" : : "x" (*d1), "x" (*d2));
548 545 }
549 546
550 547 extern __GNU_INLINE void
551 548 sse_comisd(double *d1, double *d2)
552 549 {
553 550 __asm__ __volatile__("comisd %1, %0" : : "x" (*d1), "x" (*d2));
554 551 }
555 552
556 553 extern __GNU_INLINE void
557 554 sse_cvtsd2ss(double *d1, float *f1)
558 555 {
559 556 double tmp;
560 557
561 558 __asm__ __volatile__(
562 559 "cvtsd2ss %2,%1\n\t"
563 560 "movss %1,%0"
564 561 : "=m" (*f1), "=x" (tmp)
565 562 : "m" (*d1));
566 563 }
567 564
568 565 extern __GNU_INLINE void
569 566 sse_cvtsi2sd(int *i1, double *d1)
570 567 {
571 568 double tmp;
572 569 __asm__ __volatile__(
573 570 "cvtsi2sd %2,%1\n\t"
574 571 "movsd %1,%0"
575 572 : "=m" (*d1), "=x" (tmp)
576 573 : "m" (*i1));
577 574 }
578 575
579 576 extern __GNU_INLINE void
580 577 sse_cvttsd2si(double *d1, int *i1)
581 578 {
582 579 int tmp;
583 580
584 581 __asm__ __volatile__(
585 582 "cvttsd2si %2,%1\n\t"
586 583 "movl %1,%0"
587 584 : "=m" (*i1), "=r" (tmp)
588 585 : "m" (*d1));
589 586 }
590 587
591 588 extern __GNU_INLINE void
592 589 sse_cvtsd2si(double *d1, int *i1)
593 590 {
594 591 int tmp;
595 592
596 593 __asm__ __volatile__(
597 594 "cvtsd2si %2,%1\n\t"
598 595 "movl %1,%0"
599 596 : "=m" (*i1), "=r" (tmp)
600 597 : "m" (*d1));
601 598 }
602 599
603 600 #if defined(__amd64)
604 601 extern __GNU_INLINE void
605 602 sse_cvtsi2sdq(long long *ll1, double *d1)
606 603 {
607 604 double tmp;
608 605
609 606 __asm__ __volatile__(
610 607 "cvtsi2sdq %2,%1\n\t"
611 608 "movsd %1,%0"
612 609 : "=m" (*d1), "=x" (tmp)
613 610 : "m" (*ll1));
614 611 }
615 612
616 613 extern __GNU_INLINE void
617 614 sse_cvttsd2siq(double *d1, long long *ll1)
618 615 {
619 616 uint64_t tmp;
620 617
621 618 __asm__ __volatile__(
622 619 "cvttsd2siq %2,%1\n\t"
623 620 "movq %1,%0"
624 621 : "=m" (*ll1), "=r" (tmp)
625 622 : "m" (*d1));
626 623 }
627 624
628 625 extern __GNU_INLINE void
629 626 sse_cvtsd2siq(double *d1, long long *ll1)
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630 627 {
631 628 uint64_t tmp;
632 629
633 630 __asm__ __volatile__(
634 631 "cvtsd2siq %2,%1\n\t"
635 632 "movq %1,%0"
636 633 : "=m" (*ll1), "=r" (tmp)
637 634 : "m" (*d1));
638 635 }
639 636 #endif
640 -
641 637 #elif defined(__sparc)
642 638 extern __GNU_INLINE void
643 639 __fenv_getfsr(unsigned long *l)
644 640 {
645 641 __asm__ __volatile__(
646 642 #if defined(__sparcv9)
647 643 "stx %%fsr,%0\n\t"
648 644 #else
649 645 "st %%fsr,%0\n\t"
650 646 #endif
651 647 : "=m" (*l));
652 648 }
653 649
654 650 extern __GNU_INLINE void
655 651 __fenv_setfsr(const unsigned long *l)
656 652 {
657 653 __asm__ __volatile__(
658 654 #if defined(__sparcv9)
659 655 "ldx %0,%%fsr\n\t"
660 656 #else
661 657 "ld %0,%%fsr\n\t"
662 658 #endif
663 659 : : "m" (*l) : "cc");
664 660 }
665 661
666 662 extern __GNU_INLINE void
667 663 __fenv_getfsr32(unsigned int *l)
668 664 {
669 665 __asm__ __volatile__("st %%fsr,%0\n\t" : "=m" (*l));
670 666 }
671 667
672 668 extern __GNU_INLINE void
673 669 __fenv_setfsr32(const unsigned int *l)
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674 670 {
675 671 __asm__ __volatile__("ld %0,%%fsr\n\t" : : "m" (*l));
676 672 }
677 673 #else
678 674 #error "GCC FENV inlines not implemented for this platform"
679 675 #endif
680 676
681 677 #ifdef __cplusplus
682 678 }
683 679 #endif
684 -
685 680 #endif /* __GNUC__ */
686 -
687 681 #endif /* _FENV_INLINES_H */
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