1 /*
2 * This file and its contents are supplied under the terms of the
3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 * You may only use this file in accordance with the terms of version
5 * 1.0 of the CDDL.
6 *
7 * A full copy of the text of the CDDL should have accompanied this
8 * source. A copy of the CDDL is also available via the Internet at
9 * http://www.illumos.org/license/CDDL.
10 */
11
12 /*
13 * Copyright 2011, Richard Lowe
14 */
15
16 #ifndef _FENV_INLINES_H
17 #define _FENV_INLINES_H
18
19 #ifdef __GNUC__
20
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24
25 #include <sys/types.h>
26
27 #if defined(__x86)
28
29 /*
30 * Floating point Control Word and Status Word
31 * Definition should actually be shared with x86
32 * (much of this 'amd64' code can be, in fact.)
33 */
34 union fp_cwsw {
35 uint32_t cwsw;
36 struct {
37 uint16_t cw;
38 uint16_t sw;
39 } words;
40 };
41
42 extern __GNU_INLINE void
43 __fenv_getcwsw(unsigned int *value)
44 {
45 union fp_cwsw *u = (union fp_cwsw *)value;
46
47 __asm__ __volatile__(
48 "fstsw %0\n\t"
408 uint64_t tmp;
409
410 __asm__ __volatile__(
411 "cvttss2siq %2, %1\n\t"
412 "movq %1, %0"
413 : "=m" (*ll1), "=r" (tmp)
414 : "m" (*f1));
415 }
416
417 extern __GNU_INLINE void
418 sse_cvtss2siq(float *f1, long long *ll1)
419 {
420 uint64_t tmp;
421
422 __asm__ __volatile__(
423 "cvtss2siq %2, %1\n\t"
424 "movq %1, %0"
425 : "=m" (*ll1), "=r" (tmp)
426 : "m" (*f1));
427 }
428
429 #endif
430
431 extern __GNU_INLINE void
432 sse_cmpeqsd(double *d1, double *d2, long long *ll1)
433 {
434 __asm__ __volatile__(
435 "cmpeqsd %2,%1\n\t"
436 "movsd %1,%0"
437 : "=m" (*ll1), "+x" (*d1)
438 : "x" (*d2));
439 }
440
441 extern __GNU_INLINE void
442 sse_cmpltsd(double *d1, double *d2, long long *ll1)
443 {
444 __asm__ __volatile__(
445 "cmpltsd %2,%1\n\t"
446 "movsd %1,%0"
447 : "=m" (*ll1), "+x" (*d1)
448 : "x" (*d2));
620
621 __asm__ __volatile__(
622 "cvttsd2siq %2,%1\n\t"
623 "movq %1,%0"
624 : "=m" (*ll1), "=r" (tmp)
625 : "m" (*d1));
626 }
627
628 extern __GNU_INLINE void
629 sse_cvtsd2siq(double *d1, long long *ll1)
630 {
631 uint64_t tmp;
632
633 __asm__ __volatile__(
634 "cvtsd2siq %2,%1\n\t"
635 "movq %1,%0"
636 : "=m" (*ll1), "=r" (tmp)
637 : "m" (*d1));
638 }
639 #endif
640
641 #elif defined(__sparc)
642 extern __GNU_INLINE void
643 __fenv_getfsr(unsigned long *l)
644 {
645 __asm__ __volatile__(
646 #if defined(__sparcv9)
647 "stx %%fsr,%0\n\t"
648 #else
649 "st %%fsr,%0\n\t"
650 #endif
651 : "=m" (*l));
652 }
653
654 extern __GNU_INLINE void
655 __fenv_setfsr(const unsigned long *l)
656 {
657 __asm__ __volatile__(
658 #if defined(__sparcv9)
659 "ldx %0,%%fsr\n\t"
660 #else
664 }
665
666 extern __GNU_INLINE void
667 __fenv_getfsr32(unsigned int *l)
668 {
669 __asm__ __volatile__("st %%fsr,%0\n\t" : "=m" (*l));
670 }
671
672 extern __GNU_INLINE void
673 __fenv_setfsr32(const unsigned int *l)
674 {
675 __asm__ __volatile__("ld %0,%%fsr\n\t" : : "m" (*l));
676 }
677 #else
678 #error "GCC FENV inlines not implemented for this platform"
679 #endif
680
681 #ifdef __cplusplus
682 }
683 #endif
684
685 #endif /* __GNUC__ */
686
687 #endif /* _FENV_INLINES_H */
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1 /*
2 * This file and its contents are supplied under the terms of the
3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 * You may only use this file in accordance with the terms of version
5 * 1.0 of the CDDL.
6 *
7 * A full copy of the text of the CDDL should have accompanied this
8 * source. A copy of the CDDL is also available via the Internet at
9 * http://www.illumos.org/license/CDDL.
10 */
11
12 /*
13 * Copyright 2011, Richard Lowe
14 */
15
16 #ifndef _FENV_INLINES_H
17 #define _FENV_INLINES_H
18
19 #ifdef __GNUC__
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23
24 #include <sys/types.h>
25
26 #if defined(__x86)
27 /*
28 * Floating point Control Word and Status Word
29 * Definition should actually be shared with x86
30 * (much of this 'amd64' code can be, in fact.)
31 */
32 union fp_cwsw {
33 uint32_t cwsw;
34 struct {
35 uint16_t cw;
36 uint16_t sw;
37 } words;
38 };
39
40 extern __GNU_INLINE void
41 __fenv_getcwsw(unsigned int *value)
42 {
43 union fp_cwsw *u = (union fp_cwsw *)value;
44
45 __asm__ __volatile__(
46 "fstsw %0\n\t"
406 uint64_t tmp;
407
408 __asm__ __volatile__(
409 "cvttss2siq %2, %1\n\t"
410 "movq %1, %0"
411 : "=m" (*ll1), "=r" (tmp)
412 : "m" (*f1));
413 }
414
415 extern __GNU_INLINE void
416 sse_cvtss2siq(float *f1, long long *ll1)
417 {
418 uint64_t tmp;
419
420 __asm__ __volatile__(
421 "cvtss2siq %2, %1\n\t"
422 "movq %1, %0"
423 : "=m" (*ll1), "=r" (tmp)
424 : "m" (*f1));
425 }
426 #endif
427
428 extern __GNU_INLINE void
429 sse_cmpeqsd(double *d1, double *d2, long long *ll1)
430 {
431 __asm__ __volatile__(
432 "cmpeqsd %2,%1\n\t"
433 "movsd %1,%0"
434 : "=m" (*ll1), "+x" (*d1)
435 : "x" (*d2));
436 }
437
438 extern __GNU_INLINE void
439 sse_cmpltsd(double *d1, double *d2, long long *ll1)
440 {
441 __asm__ __volatile__(
442 "cmpltsd %2,%1\n\t"
443 "movsd %1,%0"
444 : "=m" (*ll1), "+x" (*d1)
445 : "x" (*d2));
617
618 __asm__ __volatile__(
619 "cvttsd2siq %2,%1\n\t"
620 "movq %1,%0"
621 : "=m" (*ll1), "=r" (tmp)
622 : "m" (*d1));
623 }
624
625 extern __GNU_INLINE void
626 sse_cvtsd2siq(double *d1, long long *ll1)
627 {
628 uint64_t tmp;
629
630 __asm__ __volatile__(
631 "cvtsd2siq %2,%1\n\t"
632 "movq %1,%0"
633 : "=m" (*ll1), "=r" (tmp)
634 : "m" (*d1));
635 }
636 #endif
637 #elif defined(__sparc)
638 extern __GNU_INLINE void
639 __fenv_getfsr(unsigned long *l)
640 {
641 __asm__ __volatile__(
642 #if defined(__sparcv9)
643 "stx %%fsr,%0\n\t"
644 #else
645 "st %%fsr,%0\n\t"
646 #endif
647 : "=m" (*l));
648 }
649
650 extern __GNU_INLINE void
651 __fenv_setfsr(const unsigned long *l)
652 {
653 __asm__ __volatile__(
654 #if defined(__sparcv9)
655 "ldx %0,%%fsr\n\t"
656 #else
660 }
661
662 extern __GNU_INLINE void
663 __fenv_getfsr32(unsigned int *l)
664 {
665 __asm__ __volatile__("st %%fsr,%0\n\t" : "=m" (*l));
666 }
667
668 extern __GNU_INLINE void
669 __fenv_setfsr32(const unsigned int *l)
670 {
671 __asm__ __volatile__("ld %0,%%fsr\n\t" : : "m" (*l));
672 }
673 #else
674 #error "GCC FENV inlines not implemented for this platform"
675 #endif
676
677 #ifdef __cplusplus
678 }
679 #endif
680 #endif /* __GNUC__ */
681 #endif /* _FENV_INLINES_H */
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