117 /* We also write this with the %rsp value on tramp entry */
118
119 /* Written to 0x1 when this kpti_frame is in use. */
120 uint64_t kf_tr_flag;
121
122 uint64_t kf_middle_redzone;
123
124 /*
125 * The things we need to write to %cr3 to change between page tables.
126 * These live "above" the HW stack.
127 */
128 greg_t kf_kernel_cr3;
129 greg_t kf_user_cr3;
130 greg_t kf_tr_ret_rsp;
131
132 uint64_t kf_unused; /* For 16-byte align */
133
134 uint64_t kf_upper_redzone;
135 };
136
137 /*
138 * This first value, MACHCPU_SIZE is the size of all the members in the cpu_t
139 * AND struct machcpu, before we get to the mcpu_pad and the kpti area.
140 * The KPTI is used to contain per-CPU data that is visible in both sets of
141 * page-tables, and hence must be page-aligned and page-sized. See
142 * hat_pcp_setup().
143 *
144 * There is a CTASSERT in os/intr.c that checks these numbers.
145 */
146 #define MACHCPU_SIZE (572 + 1584)
147 #define MACHCPU_PAD (MMU_PAGESIZE - MACHCPU_SIZE)
148 #define MACHCPU_PAD2 (MMU_PAGESIZE - 16 - 3 * sizeof (struct kpti_frame))
149
150 struct machcpu {
151 /*
152 * x_call fields - used for interprocessor cross calls
153 */
154 struct xc_msg *xc_msgbox;
155 struct xc_msg *xc_free;
156 xc_data_t xc_data;
157 uint32_t xc_wait_cnt;
158 volatile uint32_t xc_work_cnt;
159
160 int mcpu_nodeid; /* node-id */
161 int mcpu_pri; /* CPU priority */
162
163 struct hat *mcpu_current_hat; /* cpu's current hat */
164
165 struct hat_cpu_info *mcpu_hat_info;
166
202 volatile uint32_t *mcpu_mwait; /* MONITOR/MWAIT buffer */
203 void (*mcpu_idle_cpu)(void); /* idle function */
204 uint16_t mcpu_idle_type; /* CPU next idle type */
205 uint16_t max_cstates; /* supported max cstates */
206
207 struct cpu_ucode_info *mcpu_ucode_info;
208
209 void *mcpu_pm_mach_state;
210 struct cmi_hdl *mcpu_cmi_hdl;
211 void *mcpu_mach_ctx_ptr;
212
213 /*
214 * A stamp that is unique per processor and changes
215 * whenever an interrupt happens. Userful for detecting
216 * if a section of code gets interrupted.
217 * The high order 16 bits will hold the cpu->cpu_id.
218 * The low order bits will be incremented on every interrupt.
219 */
220 volatile uint32_t mcpu_istamp;
221
222 char mcpu_pad[MACHCPU_PAD];
223
224 /* This is the start of the page */
225 char mcpu_pad2[MACHCPU_PAD2];
226 struct kpti_frame mcpu_kpti;
227 struct kpti_frame mcpu_kpti_flt;
228 struct kpti_frame mcpu_kpti_dbg;
229 char mcpu_pad3[16];
230 };
231
232 #define NINTR_THREADS (LOCK_LEVEL-1) /* number of interrupt threads */
233 #define MWAIT_HALTED (1) /* mcpu_mwait set when halting */
234 #define MWAIT_RUNNING (0) /* mcpu_mwait set to wakeup */
235 #define MWAIT_WAKEUP_IPI (2) /* need IPI to wakeup */
236 #define MWAIT_WAKEUP(cpu) (*((cpu)->cpu_m.mcpu_mwait) = MWAIT_RUNNING)
237
238 #endif /* _ASM */
239
240 /* Please DON'T add any more of this namespace-poisoning sewage here */
241
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117 /* We also write this with the %rsp value on tramp entry */
118
119 /* Written to 0x1 when this kpti_frame is in use. */
120 uint64_t kf_tr_flag;
121
122 uint64_t kf_middle_redzone;
123
124 /*
125 * The things we need to write to %cr3 to change between page tables.
126 * These live "above" the HW stack.
127 */
128 greg_t kf_kernel_cr3;
129 greg_t kf_user_cr3;
130 greg_t kf_tr_ret_rsp;
131
132 uint64_t kf_unused; /* For 16-byte align */
133
134 uint64_t kf_upper_redzone;
135 };
136
137 typedef struct cpu_ht {
138 lock_t ch_lock;
139 char ch_pad[56];
140 struct cpu *ch_sib;
141 volatile uint64_t ch_intr_depth;
142 volatile uint64_t ch_state;
143 volatile uint64_t ch_sibstate;
144 } cpu_ht_t;
145
146 /*
147 * This first value, MACHCPU_SIZE is the size of all the members in the cpu_t
148 * AND struct machcpu, before we get to the mcpu_pad and the kpti area.
149 * The KPTI is used to contain per-CPU data that is visible in both sets of
150 * page-tables, and hence must be page-aligned and page-sized. See
151 * hat_pcp_setup().
152 *
153 * There are CTASSERTs in os/intr.c that verify this all works out.
154 */
155 #define MACHCPU_SIZE (1568 + 688)
156 #define MACHCPU_PAD (MMU_PAGESIZE - MACHCPU_SIZE)
157 #define MACHCPU_PAD2 (MMU_PAGESIZE - 16 - 3 * sizeof (struct kpti_frame))
158
159 struct machcpu {
160 /*
161 * x_call fields - used for interprocessor cross calls
162 */
163 struct xc_msg *xc_msgbox;
164 struct xc_msg *xc_free;
165 xc_data_t xc_data;
166 uint32_t xc_wait_cnt;
167 volatile uint32_t xc_work_cnt;
168
169 int mcpu_nodeid; /* node-id */
170 int mcpu_pri; /* CPU priority */
171
172 struct hat *mcpu_current_hat; /* cpu's current hat */
173
174 struct hat_cpu_info *mcpu_hat_info;
175
211 volatile uint32_t *mcpu_mwait; /* MONITOR/MWAIT buffer */
212 void (*mcpu_idle_cpu)(void); /* idle function */
213 uint16_t mcpu_idle_type; /* CPU next idle type */
214 uint16_t max_cstates; /* supported max cstates */
215
216 struct cpu_ucode_info *mcpu_ucode_info;
217
218 void *mcpu_pm_mach_state;
219 struct cmi_hdl *mcpu_cmi_hdl;
220 void *mcpu_mach_ctx_ptr;
221
222 /*
223 * A stamp that is unique per processor and changes
224 * whenever an interrupt happens. Userful for detecting
225 * if a section of code gets interrupted.
226 * The high order 16 bits will hold the cpu->cpu_id.
227 * The low order bits will be incremented on every interrupt.
228 */
229 volatile uint32_t mcpu_istamp;
230
231 cpu_ht_t mcpu_ht;
232
233 char mcpu_pad[MACHCPU_PAD];
234
235 /* This is the start of the page */
236 char mcpu_pad2[MACHCPU_PAD2];
237 struct kpti_frame mcpu_kpti;
238 struct kpti_frame mcpu_kpti_flt;
239 struct kpti_frame mcpu_kpti_dbg;
240 char mcpu_pad3[16];
241 };
242
243 #define NINTR_THREADS (LOCK_LEVEL-1) /* number of interrupt threads */
244 #define MWAIT_HALTED (1) /* mcpu_mwait set when halting */
245 #define MWAIT_RUNNING (0) /* mcpu_mwait set to wakeup */
246 #define MWAIT_WAKEUP_IPI (2) /* need IPI to wakeup */
247 #define MWAIT_WAKEUP(cpu) (*((cpu)->cpu_m.mcpu_mwait) = MWAIT_RUNNING)
248
249 #endif /* _ASM */
250
251 /* Please DON'T add any more of this namespace-poisoning sewage here */
252
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