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OS-7125 Need mitigation of L1TF (CVE-2018-3646)
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
        
*** 132,151 ****
          uint64_t        kf_unused;              /* For 16-byte align */
  
          uint64_t        kf_upper_redzone;
  };
  
  /*
   * This first value, MACHCPU_SIZE is the size of all the members in the cpu_t
   * AND struct machcpu, before we get to the mcpu_pad and the kpti area.
   * The KPTI is used to contain per-CPU data that is visible in both sets of
   * page-tables, and hence must be page-aligned and page-sized. See
   * hat_pcp_setup().
   *
!  * There is a CTASSERT in os/intr.c that checks these numbers.
   */
! #define MACHCPU_SIZE    (572 + 1584)
  #define MACHCPU_PAD     (MMU_PAGESIZE - MACHCPU_SIZE)
  #define MACHCPU_PAD2    (MMU_PAGESIZE - 16 - 3 * sizeof (struct kpti_frame))
  
  struct  machcpu {
          /*
--- 132,160 ----
          uint64_t        kf_unused;              /* For 16-byte align */
  
          uint64_t        kf_upper_redzone;
  };
  
+ typedef struct cpu_ht {
+         lock_t ch_lock;
+         char ch_pad[56];
+         struct cpu *ch_sib;
+         volatile uint64_t ch_intr_depth;
+         volatile uint64_t ch_state;
+         volatile uint64_t ch_sibstate;
+ } cpu_ht_t;
+ 
  /*
   * This first value, MACHCPU_SIZE is the size of all the members in the cpu_t
   * AND struct machcpu, before we get to the mcpu_pad and the kpti area.
   * The KPTI is used to contain per-CPU data that is visible in both sets of
   * page-tables, and hence must be page-aligned and page-sized. See
   * hat_pcp_setup().
   *
!  * There are CTASSERTs in os/intr.c that verify this all works out.
   */
! #define MACHCPU_SIZE    (1568 + 688)
  #define MACHCPU_PAD     (MMU_PAGESIZE - MACHCPU_SIZE)
  #define MACHCPU_PAD2    (MMU_PAGESIZE - 16 - 3 * sizeof (struct kpti_frame))
  
  struct  machcpu {
          /*
*** 217,226 ****
--- 226,237 ----
           * The high order 16 bits will hold the cpu->cpu_id.
           * The low order bits will be incremented on every interrupt.
           */
          volatile uint32_t       mcpu_istamp;
  
+         cpu_ht_t                mcpu_ht;
+ 
          char                    mcpu_pad[MACHCPU_PAD];
  
          /* This is the start of the page */
          char                    mcpu_pad2[MACHCPU_PAD2];
          struct kpti_frame       mcpu_kpti;