OS-7125 Need mitigation of L1TF (CVE-2018-3646)
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>

*** 20,29 ****
--- 20,30 ----
   */
  
  /*
   * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
   * Copyright 2018 Western Digital Corporation.  All rights reserved.
+  * Copyright 2018 Joyent, Inc.
   */
  
  #include <sys/cpuvar.h>
  #include <sys/cpu_event.h>
  #include <sys/param.h>
*** 66,75 ****
--- 67,77 ----
  #include <sys/x_call.h>
  #include <sys/reboot.h>
  #include <vm/hat_i86.h>
  #include <sys/stack.h>
  #include <sys/apix.h>
+ #include <sys/ht.h>
  
  static void apix_post_hardint(int);
  
  /*
   * Insert an vector into the tail of the interrupt pending list
*** 278,287 ****
--- 280,290 ----
          ASSERT(SA((uintptr_t)stackptr) == (uintptr_t)stackptr);
          t->t_sp = (uintptr_t)stackptr;
  
          it->t_intr = t;
          cpu->cpu_thread = it;
+         ht_begin_intr(pil);
  
          /*
           * Set bit for this pil in CPU's interrupt active bitmask.
           */
          ASSERT((cpu->cpu_intr_actv & (1 << pil)) == 0);
*** 348,358 ****
--- 351,363 ----
                  panic("dosoftint_epilog: swtch returned");
          }
          it->t_link = cpu->cpu_intr_thread;
          cpu->cpu_intr_thread = it;
          it->t_state = TS_FREE;
+         ht_end_intr();
          cpu->cpu_thread = t;
+ 
          if (t->t_flag & T_INTR_THREAD)
                  t->t_intr_start = now;
          basespl = cpu->cpu_base_spl;
          pil = MAX(oldpil, basespl);
          mcpu->mcpu_pri = pil;
*** 464,473 ****
--- 469,480 ----
                          cpu->cpu_intracct[cpu->cpu_mstate] += intrtime;
                          t->t_intr_start = 0;
                  }
          }
  
+         ht_begin_intr(pil);
+ 
          /* store starting timestamp in CPu structure for this IPL */
          mcpu->pil_high_start[pil - (LOCK_LEVEL + 1)] = now;
  
          if (pil == 15) {
                  /*
*** 554,563 ****
--- 561,572 ----
  
                  if (t->t_flag & T_INTR_THREAD)
                          t->t_intr_start = now;
          }
  
+         ht_end_intr();
+ 
          mcpu->mcpu_pri = oldpil;
          if (pil < CBE_HIGH_PIL)
                  (void) (*setlvlx)(oldpil, 0);
  
          return (mask);
*** 666,675 ****
--- 675,685 ----
           * they're TS_FREE.)
           */
          it->t_state = TS_ONPROC;
  
          cpu->cpu_thread = it;
+         ht_begin_intr(pil);
  
          /*
           * Initialize thread priority level from intr_pri
           */
          it->t_pil = (uchar_t)pil;
*** 754,764 ****
--- 764,776 ----
           */
          it->t_link = cpu->cpu_intr_thread;
          cpu->cpu_intr_thread = it;
          it->t_state = TS_FREE;
  
+         ht_end_intr();
          cpu->cpu_thread = t;
+ 
          if (t->t_flag & T_INTR_THREAD)
                  t->t_intr_start = now;
          basespl = cpu->cpu_base_spl;
          mcpu->mcpu_pri = MAX(oldpil, basespl);
          (*setlvlx)(mcpu->mcpu_pri, 0);