8956 Implement KPTI
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
9208 hati_demap_func should take pagesize into account
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Tim Kordas <tim.kordas@joyent.com>
Reviewed by: Yuri Pankov <yuripv@yuripv.net>

@@ -19,10 +19,11 @@
  * CDDL HEADER END
  */
 /*
  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #ifndef _VM_HAT_PTE_H
 #define _VM_HAT_PTE_H
 

@@ -136,10 +137,11 @@
  *      while (--l >= 0)
  *              ...
  */
 #define MAX_NUM_LEVEL           4
 #define MAX_PAGE_LEVEL          2
+#define MIN_PAGE_LEVEL          0
 typedef int8_t level_t;
 #define LEVEL_SHIFT(l)  (mmu.level_shift[l])
 #define LEVEL_SIZE(l)   (mmu.level_size[l])
 #define LEVEL_OFFSET(l) (mmu.level_offset[l])
 #define LEVEL_MASK(l)   (mmu.level_mask[l])

@@ -152,13 +154,14 @@
 #define PFN_64G         (64ull * (1024 * 1024 * 1024 / MMU_PAGESIZE))
 #define PFN_ABOVE4G(pfn) ((pfn) >= PFN_4G)
 #define PFN_ABOVE64G(pfn) ((pfn) >= PFN_64G)
 
 /*
- * The CR3 register holds the physical address of the top level page table.
+ * The CR3 register holds the physical address of the top level page table,
+ * along with the current PCID if any.
  */
-#define MAKECR3(pfn)    mmu_ptob(pfn)
+#define MAKECR3(pfn, pcid)      (mmu_ptob(pfn) | pcid)
 
 /*
  * HAT/MMU parameters that depend on kernel mode and/or processor type
  */
 struct htable;

@@ -171,14 +174,20 @@
         uint_t num_level;       /* number of page table levels in use */
         uint_t max_level;       /* just num_level - 1 */
         uint_t max_page_level;  /* maximum level at which we can map a page */
         uint_t umax_page_level; /* max user page map level */
         uint_t ptes_per_table;  /* # of entries in lower level page tables */
-        uint_t top_level_count; /* # of entries in top most level page table */
+        uint_t top_level_count; /* # of entries in top-level page table */
+        uint_t top_level_uslots; /* # of user slots in top-level page table */
+        uint_t num_copied_ents; /* # of PCP-copied PTEs to create */
+        /* 32-bit versions of values */
+        uint_t top_level_uslots32;
+        uint_t max_level32;
+        uint_t num_copied_ents32;
 
         uint_t  hash_cnt;       /* cnt of entries in htable_hash_cache */
-        uint_t  vlp_hash_cnt;   /* cnt of entries in vlp htable_hash_cache */
+        uint_t hat32_hash_cnt;  /* cnt of entries in 32-bit htable_hash_cache */
 
         uint_t pae_hat;         /* either 0 or 1 */
 
         uintptr_t hole_start;   /* start of VA hole (or -1 if none) */
         uintptr_t hole_end;     /* end of VA hole (or 0 if none) */