1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
23 */
24 /*
25 * Copyright (c) 2010, Intel Corporation.
26 * All rights reserved.
27 */
28 /*
29 * Copyright 2018 Joyent, Inc.
30 */
31
32 #ifndef _SYS_RM_PLATTER_H
33 #define _SYS_RM_PLATTER_H
34
35 #include <sys/types.h>
36 #include <sys/tss.h>
37 #include <sys/segments.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 #define RM_PLATTER_CODE_SIZE 0x400
44 #define RM_PLATTER_CPU_HALT_CODE_SIZE 0x100
45
46 typedef struct rm_platter {
47 char rm_code[RM_PLATTER_CODE_SIZE];
48 char rm_cpu_halt_code[RM_PLATTER_CPU_HALT_CODE_SIZE];
49 #if defined(__amd64)
50 /*
51 * The compiler will want to 64-bit align the 64-bit rm_gdt_base
52 * pointer, so we need to add an extra four bytes of padding here to
53 * make sure rm_gdt_lim and rm_gdt_base will align to create a proper
54 * ten byte GDT pseudo-descriptor.
55 */
56 uint32_t rm_gdt_pad;
57 #endif /* __amd64 */
58 ushort_t rm_debug;
59 ushort_t rm_gdt_lim; /* stuff for lgdt */
60 user_desc_t *rm_gdt_base;
61 #if defined(__amd64)
62 /*
63 * The compiler will want to 64-bit align the 64-bit rm_idt_base
64 * pointer, so we need to add an extra four bytes of padding here to
65 * make sure rm_idt_lim and rm_idt_base will align to create a proper
66 * ten byte IDT pseudo-descriptor.
67 */
68 uint32_t rm_idt_pad;
69 #endif /* __amd64 */
70 ushort_t rm_cpu_halted; /* non-zero if CPU has been halted */
71 ushort_t rm_idt_lim; /* stuff for lidt */
72 gate_desc_t *rm_idt_base;
73 uint_t rm_pdbr; /* cr3 value */
74 uint_t rm_cpu; /* easy way to know which CPU we are */
75 uint_t rm_filler3;
76 uint_t rm_cr4; /* cr4 value on cpu0 */
77 #if defined(__amd64)
78 /*
79 * Temporary GDT for the brief transition from real mode to protected
80 * mode before a CPU continues on into long mode.
81 *
82 * Putting it here assures it will be located in identity mapped memory
83 * (va == pa, 1:1).
84 *
85 * rm_temp_gdt is sized to hold only a null descriptor in slot zero
86 * and a 64-bit code descriptor in slot one.
87 *
88 * rm_temp_[gi]dt_lim and rm_temp_[gi]dt_base are the pseudo-descriptors
89 * for the temporary GDT and IDT, respectively.
90 */
91 uint64_t rm_temp_gdt[2];
92 ushort_t rm_temp_gdtdesc_pad; /* filler to align GDT desc */
93 ushort_t rm_temp_gdt_lim;
94 uint32_t rm_temp_gdt_base;
95 ushort_t rm_temp_idtdesc_pad; /* filler to align IDT desc */
96 ushort_t rm_temp_idt_lim;
97 uint32_t rm_temp_idt_base;
98
99 /*
100 * The code executing in the rm_platter needs the offset into the
101 * platter at which the 64-bit code starts, so have mp_startup
102 * calculate it and store it here.
103 */
104 uint32_t rm_longmode64_addr;
105 #endif /* __amd64 */
106 } rm_platter_t;
107
108 /*
109 * cpu tables put within a single structure two of the tables which need to be
110 * allocated when a CPU starts up.
111 *
112 * Note: the tss should be 16 byte aligned for best performance on amd64
113 * Since DEFAULTSTKSIZE is a multiple of PAGESIZE tss will be aligned.
114 */
115 struct cpu_tables {
116 /* IST stacks */
117 char ct_stack1[DEFAULTSTKSZ]; /* dblfault */
118 #if !defined(__xpv)
119 char ct_stack2[DEFAULTSTKSZ]; /* nmi */
120 char ct_stack3[DEFAULTSTKSZ]; /* mce */
121 #endif
122 tss_t ct_tss;
123 };
124
125 /*
126 * gdt entries are 8 bytes long, ensure that we have an even no. of them.
127 */
128 #if ((NGDT / 2) * 2 != NGDT)
129 #error "rm_platter.h: tss not properly aligned"
130 #endif
131
132 #ifdef __cplusplus
133 }
134 #endif
135
136 #endif /* _SYS_RM_PLATTER_H */