7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
23 */
24 /*
25 * Copyright (c) 2010, Intel Corporation.
26 * All rights reserved.
27 */
28
29 #include <sys/asm_linkage.h>
30 #include <sys/asm_misc.h>
31 #include <sys/regset.h>
32 #include <sys/privregs.h>
33 #include <sys/x86_archext.h>
34
35 #if !defined(__lint)
36 #include <sys/segments.h>
37 #include "assym.h"
38 #endif
39
40 /*
41 * Our assumptions:
42 * - We are running in real mode.
43 * - Interrupts are disabled.
44 * - Selectors are equal (cs == ds == ss) for all real mode code
45 * - The GDT, IDT, ktss and page directory has been built for us
46 *
309 andq $~(CR0_TS|CR0_EM), %rax /* clear emulate math chip bit */
310 orq $(CR0_MP|CR0_NE), %rax
311 movq %rax, %cr0 /* set machine status word */
312
313 /*
314 * Before going any further, enable usage of page table NX bit if
315 * that's how our page tables are set up.
316 */
317 bt $X86FSET_NX, x86_featureset(%rip)
318 jnc 1f
319 movl $MSR_AMD_EFER, %ecx
320 rdmsr
321 orl $AMD_EFER_NXE, %eax
322 wrmsr
323 1:
324
325 /*
326 * Complete the rest of the setup and call mp_startup().
327 */
328 movq %gs:CPU_THREAD, %rax /* get thread ptr */
329 call *T_PC(%rax) /* call mp_startup */
330 /* not reached */
331 int $20 /* whoops, returned somehow! */
332
333 SET_SIZE(real_mode_start_cpu)
334
335 #elif defined(__i386)
336
337 ENTRY_NP(real_mode_start_cpu)
338
339 #if !defined(__GNUC_AS__)
340
341 cli
342 D16 movw %cs, %eax
343 movw %eax, %ds /* load cs into ds */
344 movw %eax, %ss /* and into ss */
345
346 /*
347 * Helps in debugging by giving us the fault address.
348 *
349 * Remember to patch a hlt (0xf4) at cmntrap to get a good stack.
485 mov %eax, %fs
486 mov $KGS_SEL, %ax
487 mov %eax, %gs
488 mov $KDS_SEL, %ax
489 mov %eax, %ds
490 mov %eax, %es
491 mov %gs:CPU_TSS, %esi
492 mov %eax, %ss
493 mov TSS_ESP0(%esi), %esp
494 mov $(KTSS_SEL), %ax
495 ltr %ax
496 xorw %ax, %ax /* clear LDTR */
497 lldt %ax
498 mov %cr0, %edx
499 and $~(CR0_TS|CR0_EM), %edx /* clear emulate math chip bit */
500 or $(CR0_MP|CR0_NE), %edx
501 mov %edx, %cr0 /* set machine status word */
502
503 /*
504 * Before going any farther, enable usage of page table NX bit if
505 * that's how our page tables are set up.
506 */
507 bt $X86FSET_NX, x86_featureset
508 jnc 1f
509 movl %cr4, %ecx
510 andl $CR4_PAE, %ecx
511 jz 1f
512 movl $MSR_AMD_EFER, %ecx
513 rdmsr
514 orl $AMD_EFER_NXE, %eax
515 wrmsr
516 1:
517 mov %gs:CPU_THREAD, %eax /* get thread ptr */
518 call *T_PC(%eax) /* call mp_startup */
519 /* not reached */
520 int $20 /* whoops, returned somehow! */
521 #endif
522
523 SET_SIZE(real_mode_start_cpu)
524
525 #endif /* __amd64 */
|
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
23 */
24 /*
25 * Copyright (c) 2010, Intel Corporation.
26 * All rights reserved.
27 *
28 * Copyright 2018 Joyent, Inc.
29 */
30
31 #include <sys/asm_linkage.h>
32 #include <sys/asm_misc.h>
33 #include <sys/regset.h>
34 #include <sys/privregs.h>
35 #include <sys/x86_archext.h>
36
37 #if !defined(__lint)
38 #include <sys/segments.h>
39 #include "assym.h"
40 #endif
41
42 /*
43 * Our assumptions:
44 * - We are running in real mode.
45 * - Interrupts are disabled.
46 * - Selectors are equal (cs == ds == ss) for all real mode code
47 * - The GDT, IDT, ktss and page directory has been built for us
48 *
311 andq $~(CR0_TS|CR0_EM), %rax /* clear emulate math chip bit */
312 orq $(CR0_MP|CR0_NE), %rax
313 movq %rax, %cr0 /* set machine status word */
314
315 /*
316 * Before going any further, enable usage of page table NX bit if
317 * that's how our page tables are set up.
318 */
319 bt $X86FSET_NX, x86_featureset(%rip)
320 jnc 1f
321 movl $MSR_AMD_EFER, %ecx
322 rdmsr
323 orl $AMD_EFER_NXE, %eax
324 wrmsr
325 1:
326
327 /*
328 * Complete the rest of the setup and call mp_startup().
329 */
330 movq %gs:CPU_THREAD, %rax /* get thread ptr */
331 call *T_PC(%rax) /* call mp_startup_boot */
332 /* not reached */
333 int $20 /* whoops, returned somehow! */
334
335 SET_SIZE(real_mode_start_cpu)
336
337 #elif defined(__i386)
338
339 ENTRY_NP(real_mode_start_cpu)
340
341 #if !defined(__GNUC_AS__)
342
343 cli
344 D16 movw %cs, %eax
345 movw %eax, %ds /* load cs into ds */
346 movw %eax, %ss /* and into ss */
347
348 /*
349 * Helps in debugging by giving us the fault address.
350 *
351 * Remember to patch a hlt (0xf4) at cmntrap to get a good stack.
487 mov %eax, %fs
488 mov $KGS_SEL, %ax
489 mov %eax, %gs
490 mov $KDS_SEL, %ax
491 mov %eax, %ds
492 mov %eax, %es
493 mov %gs:CPU_TSS, %esi
494 mov %eax, %ss
495 mov TSS_ESP0(%esi), %esp
496 mov $(KTSS_SEL), %ax
497 ltr %ax
498 xorw %ax, %ax /* clear LDTR */
499 lldt %ax
500 mov %cr0, %edx
501 and $~(CR0_TS|CR0_EM), %edx /* clear emulate math chip bit */
502 or $(CR0_MP|CR0_NE), %edx
503 mov %edx, %cr0 /* set machine status word */
504
505 /*
506 * Before going any farther, enable usage of page table NX bit if
507 * that's how our page tables are set up. (PCIDE is enabled later on).
508 */
509 bt $X86FSET_NX, x86_featureset
510 jnc 1f
511 movl %cr4, %ecx
512 andl $CR4_PAE, %ecx
513 jz 1f
514 movl $MSR_AMD_EFER, %ecx
515 rdmsr
516 orl $AMD_EFER_NXE, %eax
517 wrmsr
518 1:
519 mov %gs:CPU_THREAD, %eax /* get thread ptr */
520 call *T_PC(%eax) /* call mp_startup */
521 /* not reached */
522 int $20 /* whoops, returned somehow! */
523 #endif
524
525 SET_SIZE(real_mode_start_cpu)
526
527 #endif /* __amd64 */
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