15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
24 */
25
26 /*
27 * Hypervisor calls
28 */
29
30 #include <sys/asm_linkage.h>
31 #include <sys/machasi.h>
32 #include <sys/machparam.h>
33 #include <sys/hypervisor_api.h>
34
35 #if defined(lint) || defined(__lint)
36
37 /*ARGSUSED*/
38 uint64_t
39 hv_mach_exit(uint64_t exit_code)
40 { return (0); }
41
42 uint64_t
43 hv_mach_sir(void)
44 { return (0); }
45
46 /*ARGSUSED*/
47 uint64_t
48 hv_cpu_start(uint64_t cpuid, uint64_t pc, uint64_t rtba, uint64_t arg)
49 { return (0); }
50
51 /*ARGSUSED*/
52 uint64_t
53 hv_cpu_stop(uint64_t cpuid)
54 { return (0); }
55
56 /*ARGSUSED*/
57 uint64_t
58 hv_cpu_set_rtba(uint64_t *rtba)
59 { return (0); }
60
61 /*ARGSUSED*/
62 int64_t
63 hv_cnputchar(uint8_t ch)
64 { return (0); }
65
66 /*ARGSUSED*/
67 int64_t
68 hv_cngetchar(uint8_t *ch)
69 { return (0); }
70
71 /*ARGSUSED*/
72 uint64_t
73 hv_tod_get(uint64_t *seconds)
74 { return (0); }
75
76 /*ARGSUSED*/
77 uint64_t
78 hv_tod_set(uint64_t seconds)
79 { return (0);}
80
81 /*ARGSUSED*/
82 uint64_t
83 hv_mmu_map_perm_addr(void *vaddr, int ctx, uint64_t tte, int flags)
84 { return (0); }
85
86 /*ARGSUSED */
87 uint64_t
88 hv_mmu_fault_area_conf(void *raddr)
89 { return (0); }
90
91 /*ARGSUSED*/
92 uint64_t
93 hv_mmu_unmap_perm_addr(void *vaddr, int ctx, int flags)
94 { return (0); }
95
96 /*ARGSUSED*/
97 uint64_t
98 hv_set_ctx0(uint64_t ntsb_descriptor, uint64_t desc_ra)
99 { return (0); }
100
101 /*ARGSUSED*/
102 uint64_t
103 hv_set_ctxnon0(uint64_t ntsb_descriptor, uint64_t desc_ra)
104 { return (0); }
105
106 #ifdef SET_MMU_STATS
107 /*ARGSUSED*/
108 uint64_t
109 hv_mmu_set_stat_area(uint64_t rstatarea, uint64_t size)
110 { return (0); }
111 #endif /* SET_MMU_STATS */
112
113 /*ARGSUSED*/
114 uint64_t
115 hv_cpu_qconf(int queue, uint64_t paddr, int size)
116 { return (0); }
117
118 /*ARGSUSED*/
119 uint64_t
120 hvio_intr_devino_to_sysino(uint64_t dev_hdl, uint32_t devino, uint64_t *sysino)
121 { return (0); }
122
123 /*ARGSUSED*/
124 uint64_t
125 hvio_intr_getvalid(uint64_t sysino, int *intr_valid_state)
126 { return (0); }
127
128 /*ARGSUSED*/
129 uint64_t
130 hvio_intr_setvalid(uint64_t sysino, int intr_valid_state)
131 { return (0); }
132
133 /*ARGSUSED*/
134 uint64_t
135 hvio_intr_getstate(uint64_t sysino, int *intr_state)
136 { return (0); }
137
138 /*ARGSUSED*/
139 uint64_t
140 hvio_intr_setstate(uint64_t sysino, int intr_state)
141 { return (0); }
142
143 /*ARGSUSED*/
144 uint64_t
145 hvio_intr_gettarget(uint64_t sysino, uint32_t *cpuid)
146 { return (0); }
147
148 /*ARGSUSED*/
149 uint64_t
150 hvio_intr_settarget(uint64_t sysino, uint32_t cpuid)
151 { return (0); }
152
153 uint64_t
154 hv_cpu_yield(void)
155 { return (0); }
156
157 /*ARGSUSED*/
158 uint64_t
159 hv_cpu_state(uint64_t cpuid, uint64_t *cpu_state)
160 { return (0); }
161
162 /*ARGSUSED*/
163 uint64_t
164 hv_dump_buf_update(uint64_t paddr, uint64_t size, uint64_t *minsize)
165 { return (0); }
166
167 /*ARGSUSED*/
168 uint64_t
169 hv_mem_scrub(uint64_t real_addr, uint64_t length, uint64_t *scrubbed_len)
170 { return (0); }
171
172 /*ARGSUSED*/
173 uint64_t
174 hv_mem_sync(uint64_t real_addr, uint64_t length, uint64_t *flushed_len)
175 { return (0); }
176
177 /*ARGSUSED*/
178 uint64_t
179 hv_ttrace_buf_conf(uint64_t paddr, uint64_t size, uint64_t *size1)
180 { return (0); }
181
182 /*ARGSUSED*/
183 uint64_t
184 hv_ttrace_buf_info(uint64_t *paddr, uint64_t *size)
185 { return (0); }
186
187 /*ARGSUSED*/
188 uint64_t
189 hv_ttrace_enable(uint64_t enable, uint64_t *prev_enable)
190 { return (0); }
191
192 /*ARGSUSED*/
193 uint64_t
194 hv_ttrace_freeze(uint64_t freeze, uint64_t *prev_freeze)
195 { return (0); }
196
197 /*ARGSUSED*/
198 uint64_t
199 hv_mach_desc(uint64_t buffer_ra, uint64_t *buffer_sizep)
200 { return (0); }
201
202 /*ARGSUSED*/
203 uint64_t
204 hv_ra2pa(uint64_t ra)
205 { return (0); }
206
207 /*ARGSUSED*/
208 uint64_t
209 hv_hpriv(void *func, uint64_t arg1, uint64_t arg2, uint64_t arg3)
210 { return (0); }
211
212 /*ARGSUSED*/
213 uint64_t
214 hv_ldc_tx_qconf(uint64_t channel, uint64_t ra_base, uint64_t nentries)
215 { return (0); }
216
217 /*ARGSUSED*/
218 uint64_t
219 hv_ldc_tx_qinfo(uint64_t channel, uint64_t *ra_base, uint64_t *nentries)
220 { return (0); }
221
222 /*ARGSUSED*/
223 uint64_t
224 hv_ldc_tx_get_state(uint64_t channel,
225 uint64_t *headp, uint64_t *tailp, uint64_t *state)
226 { return (0); }
227
228 /*ARGSUSED*/
229 uint64_t
230 hv_ldc_tx_set_qtail(uint64_t channel, uint64_t tail)
231 { return (0); }
232
233 /*ARGSUSED*/
234 uint64_t
235 hv_ldc_rx_qconf(uint64_t channel, uint64_t ra_base, uint64_t nentries)
236 { return (0); }
237
238 /*ARGSUSED*/
239 uint64_t
240 hv_ldc_rx_qinfo(uint64_t channel, uint64_t *ra_base, uint64_t *nentries)
241 { return (0); }
242
243 /*ARGSUSED*/
244 uint64_t
245 hv_ldc_rx_get_state(uint64_t channel,
246 uint64_t *headp, uint64_t *tailp, uint64_t *state)
247 { return (0); }
248
249 /*ARGSUSED*/
250 uint64_t
251 hv_ldc_rx_set_qhead(uint64_t channel, uint64_t head)
252 { return (0); }
253
254 /*ARGSUSED*/
255 uint64_t
256 hv_ldc_send_msg(uint64_t channel, uint64_t msg_ra)
257 { return (0); }
258
259 /*ARGSUSED*/
260 uint64_t
261 hv_ldc_set_map_table(uint64_t channel, uint64_t tbl_ra, uint64_t tbl_entries)
262 { return (0); }
263
264 /*ARGSUSED*/
265 uint64_t
266 hv_ldc_copy(uint64_t channel, uint64_t request, uint64_t cookie,
267 uint64_t raddr, uint64_t length, uint64_t *lengthp)
268 { return (0); }
269
270 /*ARGSUSED*/
271 uint64_t
272 hvldc_intr_getcookie(uint64_t dev_hdl, uint32_t devino, uint64_t *cookie)
273 { return (0); }
274
275 /*ARGSUSED*/
276 uint64_t
277 hvldc_intr_setcookie(uint64_t dev_hdl, uint32_t devino, uint64_t cookie)
278 { return (0); }
279
280 /*ARGSUSED*/
281 uint64_t
282 hvldc_intr_getvalid(uint64_t dev_hdl, uint32_t devino, int *intr_valid_state)
283 { return (0); }
284
285 /*ARGSUSED*/
286 uint64_t
287 hvldc_intr_setvalid(uint64_t dev_hdl, uint32_t devino, int intr_valid_state)
288 { return (0); }
289
290 /*ARGSUSED*/
291 uint64_t
292 hvldc_intr_getstate(uint64_t dev_hdl, uint32_t devino, int *intr_state)
293 { return (0); }
294
295 /*ARGSUSED*/
296 uint64_t
297 hvldc_intr_setstate(uint64_t dev_hdl, uint32_t devino, int intr_state)
298 { return (0); }
299
300 /*ARGSUSED*/
301 uint64_t
302 hvldc_intr_gettarget(uint64_t dev_hdl, uint32_t devino, uint32_t *cpuid)
303 { return (0); }
304
305 /*ARGSUSED*/
306 uint64_t
307 hvldc_intr_settarget(uint64_t dev_hdl, uint32_t devino, uint32_t cpuid)
308 { return (0); }
309
310 /*ARGSUSED*/
311 uint64_t
312 hv_api_get_version(uint64_t api_group, uint64_t *majorp, uint64_t *minorp)
313 { return (0); }
314
315 /*ARGSUSED*/
316 uint64_t
317 hv_api_set_version(uint64_t api_group, uint64_t major, uint64_t minor,
318 uint64_t *supported_minor)
319 { return (0); }
320
321 /*ARGSUSED*/
322 uint64_t
323 hv_tm_enable(uint64_t enable)
324 { return (0); }
325
326 /*ARGSUSED*/
327 uint64_t
328 hv_mach_set_watchdog(uint64_t timeout, uint64_t *time_remaining)
329 { return (0); }
330
331 /*ARGSUSED*/
332 int64_t
333 hv_cnwrite(uint64_t buf_ra, uint64_t count, uint64_t *retcount)
334 { return (0); }
335
336 /*ARGSUSED*/
337 int64_t
338 hv_cnread(uint64_t buf_ra, uint64_t count, int64_t *retcount)
339 { return (0); }
340
341 /*ARGSUSED*/
342 uint64_t
343 hv_soft_state_set(uint64_t state, uint64_t string)
344 { return (0); }
345
346 /*ARGSUSED*/
347 uint64_t
348 hv_soft_state_get(uint64_t string, uint64_t *state)
349 { return (0); }uint64_t
350 hv_guest_suspend(void)
351 { return (0); }
352
353 /*ARGSUSED*/
354 uint64_t
355 hv_tick_set_npt(uint64_t npt)
356 { return (0); }
357
358 /*ARGSUSED*/
359 uint64_t
360 hv_stick_set_npt(uint64_t npt)
361 { return (0); }
362
363 /*ARGSUSED*/
364 uint64_t
365 hv_reboot_data_set(uint64_t buffer_ra, uint64_t buffer_len)
366 { return (0); }
367
368 #else /* lint || __lint */
369
370 /*
371 * int hv_mach_exit(uint64_t exit_code)
372 */
373 ENTRY(hv_mach_exit)
374 mov HV_MACH_EXIT, %o5
375 ta FAST_TRAP
376 retl
377 nop
378 SET_SIZE(hv_mach_exit)
379
380 /*
381 * uint64_t hv_mach_sir(void)
382 */
383 ENTRY(hv_mach_sir)
384 mov HV_MACH_SIR, %o5
385 ta FAST_TRAP
386 retl
387 nop
388 SET_SIZE(hv_mach_sir)
389
1281 ENTRY(hv_stick_set_npt)
1282 mov STICK_SET_NPT, %o5
1283 ta FAST_TRAP
1284 retl
1285 nop
1286 SET_SIZE(hv_stick_set_npt)
1287
1288 /*
1289 * REBOOT_DATA_SET
1290 * arg0 buffer real address
1291 * arg1 buffer length
1292 * ret0 status
1293 */
1294 ENTRY(hv_reboot_data_set)
1295 mov HV_REBOOT_DATA_SET, %o5
1296 ta FAST_TRAP
1297 retl
1298 nop
1299 SET_SIZE(hv_reboot_data_set)
1300
1301 #endif /* lint || __lint */
|
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
24 */
25
26 /*
27 * Hypervisor calls
28 */
29
30 #include <sys/asm_linkage.h>
31 #include <sys/machasi.h>
32 #include <sys/machparam.h>
33 #include <sys/hypervisor_api.h>
34
35 /*
36 * int hv_mach_exit(uint64_t exit_code)
37 */
38 ENTRY(hv_mach_exit)
39 mov HV_MACH_EXIT, %o5
40 ta FAST_TRAP
41 retl
42 nop
43 SET_SIZE(hv_mach_exit)
44
45 /*
46 * uint64_t hv_mach_sir(void)
47 */
48 ENTRY(hv_mach_sir)
49 mov HV_MACH_SIR, %o5
50 ta FAST_TRAP
51 retl
52 nop
53 SET_SIZE(hv_mach_sir)
54
946 ENTRY(hv_stick_set_npt)
947 mov STICK_SET_NPT, %o5
948 ta FAST_TRAP
949 retl
950 nop
951 SET_SIZE(hv_stick_set_npt)
952
953 /*
954 * REBOOT_DATA_SET
955 * arg0 buffer real address
956 * arg1 buffer length
957 * ret0 status
958 */
959 ENTRY(hv_reboot_data_set)
960 mov HV_REBOOT_DATA_SET, %o5
961 ta FAST_TRAP
962 retl
963 nop
964 SET_SIZE(hv_reboot_data_set)
965
|