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--- old/usr/src/uts/sun4/ml/subr_asm.s
+++ new/usr/src/uts/sun4/ml/subr_asm.s
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
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16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21 /*
22 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
23 23 * Use is subject to license terms.
24 24 */
25 25
26 -#pragma ident "%Z%%M% %I% %E% SMI"
27 -
28 26 /*
29 27 * General machine architecture & implementation specific
30 28 * assembly language routines.
31 29 */
32 -#if defined(lint)
33 -#include <sys/types.h>
34 -#include <sys/machsystm.h>
35 -#include <sys/t_lock.h>
36 -#else /* lint */
37 30 #include "assym.h"
38 -#endif /* lint */
39 31
40 32 #include <sys/asm_linkage.h>
41 33 #include <sys/async.h>
42 34 #include <sys/machthread.h>
43 35 #include <sys/vis.h>
44 36 #include <sys/machsig.h>
45 37
46 -#if defined(lint)
47 -caddr_t
48 -set_trap_table(void)
49 -{
50 - return ((caddr_t)0);
51 -}
52 -#else /* lint */
53 -
54 38 ENTRY(set_trap_table)
55 39 set trap_table, %o1
56 40 rdpr %tba, %o0
57 41 wrpr %o1, %tba
58 42 retl
59 43 wrpr %g0, WSTATE_KERN, %wstate
60 44 SET_SIZE(set_trap_table)
61 45
62 -#endif /* lint */
63 -
64 -#if defined(lint)
65 -
66 -/*ARGSUSED*/
67 -void
68 -stphys(uint64_t physaddr, int value)
69 -{}
70 -
71 -/*ARGSUSED*/
72 -int
73 -ldphys(uint64_t physaddr)
74 -{ return (0); }
75 -
76 -/*ARGSUSED*/
77 -void
78 -stdphys(uint64_t physaddr, uint64_t value)
79 -{}
80 -
81 -/*ARGSUSED*/
82 -uint64_t
83 -lddphys(uint64_t physaddr)
84 -{ return (0x0ull); }
85 -
86 -/* ARGSUSED */
87 -void
88 -stphysio(u_longlong_t physaddr, uint_t value)
89 -{}
90 -
91 -/* ARGSUSED */
92 -uint_t
93 -ldphysio(u_longlong_t physaddr)
94 -{ return(0); }
95 -
96 -/* ARGSUSED */
97 -void
98 -sthphysio(u_longlong_t physaddr, ushort_t value)
99 -{}
100 -
101 -/* ARGSUSED */
102 -ushort_t
103 -ldhphysio(u_longlong_t physaddr)
104 -{ return(0); }
105 -
106 -/* ARGSUSED */
107 -void
108 -stbphysio(u_longlong_t physaddr, uchar_t value)
109 -{}
110 -
111 -/* ARGSUSED */
112 -uchar_t
113 -ldbphysio(u_longlong_t physaddr)
114 -{ return(0); }
115 -
116 -/*ARGSUSED*/
117 -void
118 -stdphysio(u_longlong_t physaddr, u_longlong_t value)
119 -{}
120 -
121 -/*ARGSUSED*/
122 -u_longlong_t
123 -lddphysio(u_longlong_t physaddr)
124 -{ return (0ull); }
125 -
126 -#else
127 -
128 46 ! Store long word value at physical address
129 47 !
130 48 ! void stdphys(uint64_t physaddr, uint64_t value)
131 49 !
132 50 ENTRY(stdphys)
133 51 /*
134 52 * disable interrupts, clear Address Mask to access 64 bit physaddr
135 53 */
136 54 rdpr %pstate, %o4
137 55 andn %o4, PSTATE_IE | PSTATE_AM, %o5
138 56 wrpr %o5, 0, %pstate
139 57 stxa %o1, [%o0]ASI_MEM
140 58 retl
141 59 wrpr %g0, %o4, %pstate ! restore earlier pstate register value
142 60 SET_SIZE(stdphys)
143 61
144 62
145 63 ! Store long word value at physical i/o address
146 64 !
147 65 ! void stdphysio(u_longlong_t physaddr, u_longlong_t value)
148 66 !
149 67 ENTRY(stdphysio)
150 68 /*
151 69 * disable interrupts, clear Address Mask to access 64 bit physaddr
152 70 */
153 71 rdpr %pstate, %o4
154 72 andn %o4, PSTATE_IE | PSTATE_AM, %o5
155 73 wrpr %o5, 0, %pstate ! clear IE, AM bits
156 74 stxa %o1, [%o0]ASI_IO
157 75 retl
158 76 wrpr %g0, %o4, %pstate ! restore earlier pstate register value
159 77 SET_SIZE(stdphysio)
160 78
161 79
162 80 !
163 81 ! Load long word value at physical address
164 82 !
165 83 ! uint64_t lddphys(uint64_t physaddr)
166 84 !
167 85 ENTRY(lddphys)
168 86 rdpr %pstate, %o4
169 87 andn %o4, PSTATE_IE | PSTATE_AM, %o5
170 88 wrpr %o5, 0, %pstate
171 89 ldxa [%o0]ASI_MEM, %o0
172 90 retl
173 91 wrpr %g0, %o4, %pstate ! restore earlier pstate register value
174 92 SET_SIZE(lddphys)
175 93
176 94 !
177 95 ! Load long word value at physical i/o address
178 96 !
179 97 ! unsigned long long lddphysio(u_longlong_t physaddr)
180 98 !
181 99 ENTRY(lddphysio)
182 100 rdpr %pstate, %o4
183 101 andn %o4, PSTATE_IE | PSTATE_AM, %o5
184 102 wrpr %o5, 0, %pstate ! clear IE, AM bits
185 103 ldxa [%o0]ASI_IO, %o0
186 104 retl
187 105 wrpr %g0, %o4, %pstate ! restore earlier pstate register value
188 106 SET_SIZE(lddphysio)
189 107
190 108 !
191 109 ! Store value at physical address
192 110 !
193 111 ! void stphys(uint64_t physaddr, int value)
194 112 !
195 113 ENTRY(stphys)
196 114 rdpr %pstate, %o4
197 115 andn %o4, PSTATE_IE | PSTATE_AM, %o5
198 116 wrpr %o5, 0, %pstate
199 117 sta %o1, [%o0]ASI_MEM
200 118 retl
201 119 wrpr %g0, %o4, %pstate ! restore earlier pstate register value
202 120 SET_SIZE(stphys)
203 121
204 122
205 123 !
206 124 ! load value at physical address
207 125 !
208 126 ! int ldphys(uint64_t physaddr)
209 127 !
210 128 ENTRY(ldphys)
211 129 rdpr %pstate, %o4
212 130 andn %o4, PSTATE_IE | PSTATE_AM, %o5
213 131 wrpr %o5, 0, %pstate
214 132 lda [%o0]ASI_MEM, %o0
215 133 srl %o0, 0, %o0 ! clear upper 32 bits
216 134 retl
217 135 wrpr %g0, %o4, %pstate ! restore earlier pstate register value
218 136 SET_SIZE(ldphys)
219 137
220 138 !
221 139 ! Store value into physical address in I/O space
222 140 !
223 141 ! void stphysio(u_longlong_t physaddr, uint_t value)
224 142 !
225 143 ENTRY_NP(stphysio)
226 144 rdpr %pstate, %o4 /* read PSTATE reg */
227 145 andn %o4, PSTATE_IE | PSTATE_AM, %o5
228 146 wrpr %o5, 0, %pstate
229 147 stwa %o1, [%o0]ASI_IO /* store value via bypass ASI */
230 148 retl
231 149 wrpr %g0, %o4, %pstate /* restore the PSTATE */
232 150 SET_SIZE(stphysio)
233 151
234 152 !
235 153 ! Store value into physical address in I/O space
236 154 !
237 155 ! void sthphysio(u_longlong_t physaddr, ushort_t value)
238 156 !
239 157 ENTRY_NP(sthphysio)
240 158 rdpr %pstate, %o4 /* read PSTATE reg */
241 159 andn %o4, PSTATE_IE | PSTATE_AM, %o5
242 160 wrpr %o5, 0, %pstate
243 161 stha %o1, [%o0]ASI_IO /* store value via bypass ASI */
244 162 retl
245 163 wrpr %g0, %o4, %pstate /* restore the PSTATE */
246 164 SET_SIZE(sthphysio)
247 165
248 166 !
249 167 ! Store value into one byte physical address in I/O space
250 168 !
251 169 ! void stbphysio(u_longlong_t physaddr, uchar_t value)
252 170 !
253 171 ENTRY_NP(stbphysio)
254 172 rdpr %pstate, %o4 /* read PSTATE reg */
255 173 andn %o4, PSTATE_IE | PSTATE_AM, %o5
256 174 wrpr %o5, 0, %pstate
257 175 stba %o1, [%o0]ASI_IO /* store byte via bypass ASI */
258 176 retl
259 177 wrpr %g0, %o4, %pstate /* restore the PSTATE */
260 178 SET_SIZE(stbphysio)
261 179
262 180 !
263 181 ! load value at physical address in I/O space
264 182 !
265 183 ! uint_t ldphysio(u_longlong_t physaddr)
266 184 !
267 185 ENTRY_NP(ldphysio)
268 186 rdpr %pstate, %o4 /* read PSTATE reg */
269 187 andn %o4, PSTATE_IE | PSTATE_AM, %o5
270 188 wrpr %o5, 0, %pstate
271 189 lduwa [%o0]ASI_IO, %o0 /* load value via bypass ASI */
272 190 retl
273 191 wrpr %g0, %o4, %pstate /* restore pstate */
274 192 SET_SIZE(ldphysio)
275 193
276 194 !
277 195 ! load value at physical address in I/O space
278 196 !
279 197 ! ushort_t ldhphysio(u_longlong_t physaddr)
280 198 !
281 199 ENTRY_NP(ldhphysio)
282 200 rdpr %pstate, %o4 /* read PSTATE reg */
283 201 andn %o4, PSTATE_IE | PSTATE_AM, %o5
284 202 wrpr %o5, 0, %pstate
285 203 lduha [%o0]ASI_IO, %o0 /* load value via bypass ASI */
286 204 retl
287 205 wrpr %g0, %o4, %pstate /* restore pstate */
288 206 SET_SIZE(ldhphysio)
289 207
290 208 !
291 209 ! load byte value at physical address in I/O space
292 210 !
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293 211 ! uchar_t ldbphysio(u_longlong_t physaddr)
294 212 !
295 213 ENTRY_NP(ldbphysio)
296 214 rdpr %pstate, %o4 /* read PSTATE reg */
297 215 andn %o4, PSTATE_IE | PSTATE_AM, %o5
298 216 wrpr %o5, 0, %pstate
299 217 lduba [%o0]ASI_IO, %o0 /* load value via bypass ASI */
300 218 retl
301 219 wrpr %g0, %o4, %pstate /* restore pstate */
302 220 SET_SIZE(ldbphysio)
303 -#endif /* lint */
304 221
305 222 /*
306 223 * save_gsr(kfpu_t *fp)
307 224 * Store the graphics status register
308 225 */
309 226
310 -#if defined(lint) || defined(__lint)
311 -
312 -/* ARGSUSED */
313 -void
314 -save_gsr(kfpu_t *fp)
315 -{}
316 -
317 -#else /* lint */
318 -
319 227 ENTRY_NP(save_gsr)
320 228 rd %gsr, %g2 ! save gsr
321 229 retl
322 230 stx %g2, [%o0 + FPU_GSR]
323 231 SET_SIZE(save_gsr)
324 232
325 -#endif /* lint */
326 -
327 -#if defined(lint) || defined(__lint)
328 -
329 -/* ARGSUSED */
330 -void
331 -restore_gsr(kfpu_t *fp)
332 -{}
333 -
334 -#else /* lint */
335 -
336 233 ENTRY_NP(restore_gsr)
337 234 ldx [%o0 + FPU_GSR], %g2
338 235 wr %g2, %g0, %gsr
339 236 retl
340 237 nop
341 238 SET_SIZE(restore_gsr)
342 239
343 -#endif /* lint */
344 -
345 240 /*
346 241 * uint64_t
347 242 * _fp_read_pgsr()
348 243 * Get the graphics status register info from fp and return it
349 244 */
350 245
351 -#if defined(lint) || defined(__lint)
352 -
353 -/* ARGSUSED */
354 -uint64_t
355 -_fp_read_pgsr(kfpu_t *fp)
356 -{ return 0; }
357 -
358 -#else /* lint */
359 -
360 246 ENTRY_NP(_fp_read_pgsr)
361 247 retl
362 248 rd %gsr, %o0
363 249 SET_SIZE(_fp_read_pgsr)
364 250
365 -#endif /* lint */
366 251
367 -
368 252 /*
369 253 * uint64_t
370 254 * get_gsr(kfpu_t *fp)
371 255 * Get the graphics status register info from fp and return it
372 256 */
373 257
374 -#if defined(lint) || defined(__lint)
375 -
376 -/* ARGSUSED */
377 -uint64_t
378 -get_gsr(kfpu_t *fp)
379 -{ return 0; }
380 -
381 -#else /* lint */
382 -
383 258 ENTRY_NP(get_gsr)
384 259 retl
385 260 ldx [%o0 + FPU_GSR], %o0
386 261 SET_SIZE(get_gsr)
387 262
388 -#endif
389 -
390 263 /*
391 264 * _fp_write_pgsr(uint64_t *buf, kfpu_t *fp)
392 265 * Set the graphics status register info to fp from buf
393 266 */
394 267
395 -#if defined(lint) || defined(__lint)
396 -
397 -/* ARGSUSED */
398 -void
399 -_fp_write_pgsr(uint64_t buf, kfpu_t *fp)
400 -{}
401 -
402 -#else /* lint */
403 -
404 268 ENTRY_NP(_fp_write_pgsr)
405 269 retl
406 270 mov %o0, %gsr
407 271 SET_SIZE(_fp_write_pgsr)
408 272
409 -#endif /* lint */
410 -
411 273 /*
412 274 * set_gsr(uint64_t buf, kfpu_t *fp)
413 275 * Set the graphics status register info to fp from buf
414 276 */
415 277
416 -#if defined(lint) || defined(__lint)
417 -
418 -/* ARGSUSED */
419 -void
420 -set_gsr(uint64_t buf, kfpu_t *fp)
421 -{}
422 -
423 -#else /* lint */
424 -
425 278 ENTRY_NP(set_gsr)
426 279 retl
427 280 stx %o0, [%o1 + FPU_GSR]
428 281 SET_SIZE(set_gsr)
429 282
430 -#endif /* lint */
431 -
432 -#if defined(lint) || defined(__lint)
433 -void
434 -kdi_cpu_index(void)
435 -{
436 -}
437 -
438 -#else /* lint */
439 -
440 283 ENTRY_NP(kdi_cpu_index)
441 284 CPU_INDEX(%g1, %g2)
442 285 jmp %g7
443 286 nop
444 287 SET_SIZE(kdi_cpu_index)
445 288
446 -#endif /* lint */
447 -
448 -#if defined(lint) || defined(__lint)
449 -void
450 -kmdb_enter(void)
451 -{
452 -}
453 -
454 -#else /* lint */
455 -
456 289 ENTRY_NP(kmdb_enter)
457 290 t ST_KMDB_TRAP
458 291 retl
459 292 nop
460 293 SET_SIZE(kmdb_enter)
461 294
462 -#endif /* lint */
463 -
464 295 /*
465 296 * The Spitfire floating point code has been changed not to use install/
466 297 * save/restore/fork/freectx() because of the special memcpy library
467 298 * routines, which will lose too much performance if they have to go
468 299 * through the fp_disabled trap (which used to call installctx()). So
469 300 * now fp_save/fp_restore are called from resume, and they don't care
470 301 * whether floating point was enabled from the user program via the
471 302 * fp_enabled trap or from the memcpy library, which just turns on floating
472 303 * point in the fprs register itself. The new routine lwp_freeregs is
473 304 * called everywhere freectx is called, and code was added to the sun4u-
474 305 * specific version of lwp_forkregs (which is called everywhere forkctx
475 306 * is called) to handle forking the floating point registers.
476 307 *
477 308 * Note that for the fprs dirty upper/lower bits are not used for now,
478 309 * because the #instructions to determine if we need to use them is probably
479 310 * greater than the #insructions just using them. This is a possible future
480 311 * optimization, only do it with very careful benchmarking!
481 312 *
482 313 * The fp_fksave and and fp_load were split into two routines for the
483 314 * sake of efficiency between the getfpregs/xregs_getfpregs and
484 315 * setfpregs/xregs_setfpregs. But note that for saving and restoring
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485 316 * context, both *must* happen. For prmachdep, aka access from [k]adb,
486 317 * it's OK if only one part happens.
487 318 */
488 319
489 320 /*
490 321 * fp_save(kfpu_t *fp)
491 322 * fp_fksave(kfpu_t *fp)
492 323 * Store the floating point registers.
493 324 */
494 325
495 -#if defined(lint) || defined(__lint)
496 -
497 -/* ARGSUSED */
498 -void
499 -fp_save(kfpu_t *fp)
500 -{}
501 -
502 -/* ARGSUSED */
503 -void
504 -fp_fksave(kfpu_t *fp)
505 -{}
506 -
507 -#else /* lint */
508 -
509 326 ENTRY_NP(fp_save)
510 327 ALTENTRY(fp_fksave)
511 328 BSTORE_FPREGS(%o0, %o1) ! store V9 regs
512 329 retl
513 330 stx %fsr, [%o0 + FPU_FSR] ! store fsr
514 331 SET_SIZE(fp_fksave)
515 332 SET_SIZE(fp_save)
516 333
517 -#endif /* lint */
518 -
519 334 /*
520 335 * fp_v8_fksave(kfpu_t *fp)
521 336 *
522 337 * This is like the above routine but only saves the lower half.
523 338 */
524 339
525 -#if defined(lint) || defined(__lint)
526 -
527 -/* ARGSUSED */
528 -void
529 -fp_v8_fksave(kfpu_t *fp)
530 -{}
531 -
532 -#else /* lint */
533 -
534 340 ENTRY_NP(fp_v8_fksave)
535 341 BSTORE_V8_FPREGS(%o0, %o1) ! store V8 regs
536 342 retl
537 343 stx %fsr, [%o0 + FPU_FSR] ! store fsr
538 344 SET_SIZE(fp_v8_fksave)
539 345
540 -#endif /* lint */
541 -
542 346 /*
543 347 * fp_v8p_fksave(kfpu_t *fp)
544 348 *
545 349 * This is like the above routine but only saves the upper half.
546 350 */
547 351
548 -#if defined(lint) || defined(__lint)
549 -
550 -/* ARGSUSED */
551 -void
552 -fp_v8p_fksave(kfpu_t *fp)
553 -{}
554 -
555 -#else /* lint */
556 -
557 352 ENTRY_NP(fp_v8p_fksave)
558 353 BSTORE_V8P_FPREGS(%o0, %o1) ! store V9 extra regs
559 354 retl
560 355 stx %fsr, [%o0 + FPU_FSR] ! store fsr
561 356 SET_SIZE(fp_v8p_fksave)
562 357
563 -#endif /* lint */
564 -
565 358 /*
566 359 * fp_restore(kfpu_t *fp)
567 360 */
568 361
569 -#if defined(lint) || defined(__lint)
570 -
571 -/* ARGSUSED */
572 -void
573 -fp_restore(kfpu_t *fp)
574 -{}
575 -
576 -#else /* lint */
577 -
578 362 ENTRY_NP(fp_restore)
579 363 BLOAD_FPREGS(%o0, %o1) ! load V9 regs
580 364 retl
581 365 ldx [%o0 + FPU_FSR], %fsr ! restore fsr
582 366 SET_SIZE(fp_restore)
583 367
584 -#endif /* lint */
585 -
586 368 /*
587 369 * fp_v8_load(kfpu_t *fp)
588 370 */
589 371
590 -#if defined(lint) || defined(__lint)
591 -
592 -/* ARGSUSED */
593 -void
594 -fp_v8_load(kfpu_t *fp)
595 -{}
596 -
597 -#else /* lint */
598 -
599 372 ENTRY_NP(fp_v8_load)
600 373 BLOAD_V8_FPREGS(%o0, %o1) ! load V8 regs
601 374 retl
602 375 ldx [%o0 + FPU_FSR], %fsr ! restore fsr
603 376 SET_SIZE(fp_v8_load)
604 377
605 -#endif /* lint */
606 -
607 378 /*
608 379 * fp_v8p_load(kfpu_t *fp)
609 380 */
610 381
611 -#if defined(lint) || defined(__lint)
612 -
613 -/* ARGSUSED */
614 -void
615 -fp_v8p_load(kfpu_t *fp)
616 -{}
617 -
618 -#else /* lint */
619 -
620 382 ENTRY_NP(fp_v8p_load)
621 383 BLOAD_V8P_FPREGS(%o0, %o1) ! load V9 extra regs
622 384 retl
623 385 ldx [%o0 + FPU_FSR], %fsr ! restore fsr
624 386 SET_SIZE(fp_v8p_load)
625 387
626 -#endif /* lint */
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