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--- old/usr/src/uts/intel/ia32/ml/hypersubr.s
+++ new/usr/src/uts/intel/ia32/ml/hypersubr.s
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26
27 27 /*
28 28 * Copyright 2019 Joyent, Inc.
29 29 */
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29 lines elided |
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30 30
31 31 #include <sys/asm_linkage.h>
32 32 #ifndef __xpv
33 33 #include <sys/xpv_support.h>
34 34 #endif
35 35 #include <sys/hypervisor.h>
36 36
37 37 /*
38 38 * Hypervisor "system calls"
39 39 *
40 - * i386
41 - * %eax == call number
42 - * args in registers (%ebx, %ecx, %edx, %esi, %edi)
43 - *
44 40 * amd64
45 41 * %rax == call number
46 42 * args in registers (%rdi, %rsi, %rdx, %r10, %r8, %r9)
47 43 *
48 - * Note that for amd64 we use %r10 instead of %rcx for passing 4th argument
49 - * as in C calling convention since the "syscall" instruction clobbers %rcx.
44 + * Note that we use %r10 instead of %rcx for passing 4th argument as in
45 + * C calling convention since the "syscall" instruction clobbers %rcx.
50 46 *
51 47 * (These calls can be done more efficiently as gcc-style inlines, but
52 48 * for simplicity and help with initial debugging, we use these primitives
53 49 * to build the hypervisor calls up from C wrappers.)
54 50 */
55 51
56 -#if defined(__lint)
57 -
58 -/*ARGSUSED*/
59 -long
60 -__hypercall0(int callnum)
61 -{ return (0); }
62 -
63 -/*ARGSUSED*/
64 -long
65 -__hypercall1(int callnum, ulong_t a1)
66 -{ return (0); }
67 -
68 -/*ARGSUSED*/
69 -long
70 -__hypercall2(int callnum, ulong_t a1, ulong_t a2)
71 -{ return (0); }
72 -
73 -/*ARGSUSED*/
74 -long
75 -__hypercall3(int callnum, ulong_t a1, ulong_t a2, ulong_t a3)
76 -{ return (0); }
77 -
78 -/*ARGSUSED*/
79 -long
80 -__hypercall4(int callnum, ulong_t a1, ulong_t a2, ulong_t a3, ulong_t a4)
81 -{ return (0); }
82 -
83 -/*ARGSUSED*/
84 -long
85 -__hypercall5(int callnum,
86 - ulong_t a1, ulong_t a2, ulong_t a3, ulong_t a4, ulong_t a5)
87 -{ return (0); }
88 -
89 -/*ARGSUSED*/
90 -int
91 -__hypercall0_int(int callnum)
92 -{ return (0); }
93 -
94 -/*ARGSUSED*/
95 -int
96 -__hypercall1_int(int callnum, ulong_t a1)
97 -{ return (0); }
98 -
99 -/*ARGSUSED*/
100 -int
101 -__hypercall2_int(int callnum, ulong_t a1, ulong_t a2)
102 -{ return (0); }
103 -
104 -/*ARGSUSED*/
105 -int
106 -__hypercall3_int(int callnum, ulong_t a1, ulong_t a2, ulong_t a3)
107 -{ return (0); }
108 -
109 -/*ARGSUSED*/
110 -int
111 -__hypercall4_int(int callnum, ulong_t a1, ulong_t a2, ulong_t a3, ulong_t a4)
112 -{ return (0); }
113 -
114 -/*ARGSUSED*/
115 -int
116 -__hypercall5_int(int callnum,
117 - ulong_t a1, ulong_t a2, ulong_t a3, ulong_t a4, ulong_t a5)
118 -{ return (0); }
119 -
120 -#else /* __lint */
121 -
122 52 /*
123 53 * XXPV grr - assembler can't deal with an instruction in a quoted string
124 54 */
125 55 #undef TRAP_INSTR /* cause it's currently "int $0x82" */
126 56
127 57 /*
128 58 * The method for issuing a hypercall (i.e. a system call to the
129 59 * hypervisor) varies from platform to platform. In 32-bit PV domains, an
130 60 * 'int 82' triggers the call. In 64-bit PV domains, a 'syscall' does the
131 61 * trick.
132 62 *
133 63 * HVM domains are more complicated. In all cases, we want to issue a
134 64 * VMEXIT instruction, but AMD and Intel use different opcodes to represent
135 65 * that instruction. Rather than build CPU-specific modules with the
136 66 * different opcodes, we use the 'hypercall page' provided by Xen. This
137 67 * page contains a collection of code stubs that do nothing except issue
138 68 * hypercalls using the proper instructions for this machine. To keep the
139 69 * wrapper code as simple and efficient as possible, we preallocate that
140 70 * page below. When the module is loaded, we ask Xen to remap the
141 71 * underlying PFN to that of the hypercall page.
142 72 *
143 73 * Note: this same mechanism could be used in PV domains, but using
144 74 * hypercall page requires a call and several more instructions than simply
145 75 * issuing the proper trap.
146 76 */
147 77 #if !defined(__xpv)
148 78
149 79 #define HYPERCALL_PAGESIZE 0x1000
150 80 #define HYPERCALL_SHINFO_PAGESIZE 0x1000
151 81
152 82 .data
153 83 .align HYPERCALL_SHINFO_PAGESIZE
154 84 .globl hypercall_shared_info_page
155 85 .type hypercall_shared_info_page, @object
156 86 .size hypercall_shared_info_page, HYPERCALL_SHINFO_PAGESIZE
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157 87 hypercall_shared_info_page:
158 88 .skip HYPERCALL_SHINFO_PAGESIZE
159 89
160 90 .text
161 91 .align HYPERCALL_PAGESIZE
162 92 .globl hypercall_page
163 93 .type hypercall_page, @function
164 94 hypercall_page:
165 95 .skip HYPERCALL_PAGESIZE
166 96 .size hypercall_page, HYPERCALL_PAGESIZE
167 -#if defined(__amd64)
168 97 #define TRAP_INSTR \
169 98 shll $5, %eax; \
170 99 addq $hypercall_page, %rax; \
171 100 INDIRECT_JMP_REG(rax);
172 -#else
173 -#define TRAP_INSTR \
174 - shll $5, %eax; \
175 - addl $hypercall_page, %eax; \
176 - call *%eax
177 -#endif
178 101
179 102 #else /* !_xpv */
180 103
181 -#if defined(__amd64)
182 104 #define TRAP_INSTR syscall
183 -#elif defined(__i386)
184 -#define TRAP_INSTR int $0x82
185 -#endif
186 105 #endif /* !__xpv */
187 106
188 107
189 -#if defined(__amd64)
190 -
191 108 ENTRY_NP(__hypercall0)
192 109 ALTENTRY(__hypercall0_int)
193 110 movl %edi, %eax
194 111 TRAP_INSTR
195 112 ret
196 113 SET_SIZE(__hypercall0)
197 114
198 115 ENTRY_NP(__hypercall1)
199 116 ALTENTRY(__hypercall1_int)
200 117 movl %edi, %eax
201 118 movq %rsi, %rdi /* arg 1 */
202 119 TRAP_INSTR
203 120 ret
204 121 SET_SIZE(__hypercall1)
205 122
206 123 ENTRY_NP(__hypercall2)
207 124 ALTENTRY(__hypercall2_int)
208 125 movl %edi, %eax
209 126 movq %rsi, %rdi /* arg 1 */
210 127 movq %rdx, %rsi /* arg 2 */
211 128 TRAP_INSTR
212 129 ret
213 130 SET_SIZE(__hypercall2)
214 131
215 132 ENTRY_NP(__hypercall3)
216 133 ALTENTRY(__hypercall3_int)
217 134 movl %edi, %eax
218 135 movq %rsi, %rdi /* arg 1 */
219 136 movq %rdx, %rsi /* arg 2 */
220 137 movq %rcx, %rdx /* arg 3 */
221 138 TRAP_INSTR
222 139 ret
223 140 SET_SIZE(__hypercall3)
224 141
225 142 ENTRY_NP(__hypercall4)
226 143 ALTENTRY(__hypercall4_int)
227 144 movl %edi, %eax
228 145 movq %rsi, %rdi /* arg 1 */
229 146 movq %rdx, %rsi /* arg 2 */
230 147 movq %rcx, %rdx /* arg 3 */
231 148 movq %r8, %r10 /* r10 = 4th arg */
232 149 TRAP_INSTR
233 150 ret
234 151 SET_SIZE(__hypercall4)
235 152
236 153 ENTRY_NP(__hypercall5)
237 154 ALTENTRY(__hypercall5_int)
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238 155 movl %edi, %eax
239 156 movq %rsi, %rdi /* arg 1 */
240 157 movq %rdx, %rsi /* arg 2 */
241 158 movq %rcx, %rdx /* arg 3 */
242 159 movq %r8, %r10 /* r10 = 4th arg */
243 160 movq %r9, %r8 /* arg 5 */
244 161 TRAP_INSTR
245 162 ret
246 163 SET_SIZE(__hypercall5)
247 164
248 -#elif defined(__i386)
249 -
250 - ENTRY_NP(__hypercall0)
251 - ALTENTRY(__hypercall0_int)
252 - movl 4(%esp), %eax
253 - TRAP_INSTR
254 - ret
255 - SET_SIZE(__hypercall0)
256 -
257 - ENTRY_NP(__hypercall1)
258 - ALTENTRY(__hypercall1_int)
259 - pushl %ebx
260 - movl 8(%esp), %eax
261 - movl 12(%esp), %ebx
262 - TRAP_INSTR
263 - popl %ebx
264 - ret
265 - SET_SIZE(__hypercall1)
266 -
267 - ENTRY_NP(__hypercall2)
268 - ALTENTRY(__hypercall2_int)
269 - pushl %ebx
270 - movl 8(%esp), %eax
271 - movl 12(%esp), %ebx
272 - movl 16(%esp), %ecx
273 - TRAP_INSTR
274 - popl %ebx
275 - ret
276 - SET_SIZE(__hypercall2)
277 -
278 - ENTRY_NP(__hypercall3)
279 - ALTENTRY(__hypercall3_int)
280 - pushl %ebx
281 - movl 8(%esp), %eax
282 - movl 12(%esp), %ebx
283 - movl 16(%esp), %ecx
284 - movl 20(%esp), %edx
285 - TRAP_INSTR
286 - popl %ebx
287 - ret
288 - SET_SIZE(__hypercall3)
289 -
290 - ENTRY_NP(__hypercall4)
291 - ALTENTRY(__hypercall4_int)
292 - pushl %ebx
293 - pushl %esi
294 - movl 12(%esp), %eax
295 - movl 16(%esp), %ebx
296 - movl 20(%esp), %ecx
297 - movl 24(%esp), %edx
298 - movl 28(%esp), %esi
299 - TRAP_INSTR
300 - popl %esi
301 - popl %ebx
302 - ret
303 - SET_SIZE(__hypercall4)
304 -
305 - ENTRY_NP(__hypercall5)
306 - ALTENTRY(__hypercall5_int)
307 - pushl %ebx
308 - pushl %esi
309 - pushl %edi
310 - movl 16(%esp), %eax
311 - movl 20(%esp), %ebx
312 - movl 24(%esp), %ecx
313 - movl 28(%esp), %edx
314 - movl 32(%esp), %esi
315 - movl 36(%esp), %edi
316 - TRAP_INSTR
317 - popl %edi
318 - popl %esi
319 - popl %ebx
320 - ret
321 - SET_SIZE(__hypercall5)
322 -
323 -#endif /* __i386 */
324 -
325 -#endif /* lint */
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