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--- old/usr/src/uts/sun4u/ml/cpr_resume_setup.s
+++ new/usr/src/uts/sun4u/ml/cpr_resume_setup.s
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License, Version 1.0 only
6 6 * (the "License"). You may not use this file except in compliance
7 7 * with the License.
8 8 *
9 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 10 * or http://www.opensolaris.org/os/licensing.
11 11 * See the License for the specific language governing permissions
12 12 * and limitations under the License.
13 13 *
14 14 * When distributing Covered Code, include this CDDL HEADER in each
15 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 16 * If applicable, add the following below this CDDL HEADER, with the
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17 17 * fields enclosed by brackets "[]" replaced with your own identifying
18 18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 19 *
20 20 * CDDL HEADER END
21 21 */
22 22 /*
23 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26
27 -#pragma ident "%Z%%M% %I% %E% SMI"
28 -
29 -#if defined(lint)
30 -#include <sys/types.h>
31 -#else /* lint */
32 27 #include "assym.h"
33 -#endif /* lint */
34 28
35 29 #include <sys/asm_linkage.h>
36 30 #include <sys/machthread.h> /* for reg definition */
37 31
38 32 #include <sys/machasi.h> /* sun4u ASI */
39 33 #include <sys/mmu.h>
40 34 #include <sys/privregs.h>
41 35 #include <sys/machparam.h>
42 36 #include <vm/hat_sfmmu.h>
43 37 #include <sys/cpr_impl.h>
44 38 #include <sys/intreg.h>
45 39 #include <sys/clock.h>
46 40
47 41 /*
48 42 * resume kernel entry point from cprboot
49 43 * 1. restore I/D TSB registers
50 44 * 2. restore primary and secondary context registers
51 45 * 3. initialize cpu state registers
52 46 * 4. set up the thread and lwp registers for the cpr process
53 47 * 5. switch to kernel trap
54 48 * 6. restore checkpoint pc and stack pointer
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55 49 * 7. longjmp back to kernel
56 50 *
57 51 * registers from cprboot:exit_to_kernel()
58 52 * %o0 prom cookie
59 53 * %o1 struct sun4u_machdep *mdp
60 54 *
61 55 * Any change to this register assignment
62 56 * require changes to cprboot_srt0.s
63 57 */
64 58
65 -#if defined(lint)
66 -
67 -/* ARGSUSED */
68 -void
69 -i_cpr_resume_setup(void *cookie, csu_md_t *mdp)
70 -{}
71 -
72 -/* ARGSUSED */
73 -int
74 -i_cpr_cif_wrapper(void *args)
75 -{ return (0); }
76 -
77 -/* ARGSUSED */
78 -void
79 -dtlb_wr_entry(uint_t index, tte_t *tte, uint64_t *va_tag)
80 -{}
81 -
82 -/* ARGSUSED */
83 -void
84 -itlb_wr_entry(uint_t index, tte_t *tte, uint64_t *va_tag)
85 -{}
86 -
87 -#else /* lint */
88 -
89 59 !
90 60 ! reserve 4k for cpr tmp stack; tstack should be first,
91 61 ! any new data symbols should be added after tstack.
92 62 !
93 63 .seg ".data"
94 64 .global i_cpr_data_page, i_cpr_tstack_size
95 65 .global i_cpr_orig_cif
96 66
97 67 .align MMU_PAGESIZE
98 68 i_cpr_data_page:
99 69 .skip 4096
100 70 i_cpr_tstack:
101 71 .word 0
102 72 i_cpr_tstack_size:
103 73 .word 4096
104 74
105 75 .align 8
106 76 prom_tba:
107 77 .word 0, 0
108 78 i_cpr_orig_cif:
109 79 .nword 0
110 80 i_cpr_tmp_cif:
111 81 .nword 0
112 82
113 83
114 84 !
115 85 ! set text to begin at a page boundary so we can
116 86 ! map this one page and jump to it from cprboot
117 87 !
118 88 .seg ".text"
119 89 .align MMU_PAGESIZE
120 90
121 91 ENTRY(i_cpr_resume_setup)
122 92 !
123 93 ! save %o args to locals
124 94 !
125 95 mov %o0, %l4
126 96 mov %o1, %l5
127 97
128 98 !
129 99 ! Restore PCONTEXT
130 100 !
131 101 sethi %hi(FLUSH_ADDR), %g3
132 102 ld [%l5 + CPR_MD_PRI], %g1 ! mdp->mmu_ctx_pri
133 103 set MMU_PCONTEXT, %g2
134 104 stxa %g1, [%g2]ASI_DMMU
135 105 flush %g3
136 106
137 107 !
138 108 ! Restore SCONTEXT. We do not need to set up the TSB
139 109 ! registers. Since we are restoring INVALID_CONTEXT into
140 110 ! the secondary context the HAT will do that for us.
141 111 !
142 112 ld [%l5 + CPR_MD_SEC], %g1 ! mdp->mmu_ctx_sec
143 113 set MMU_SCONTEXT, %g2
144 114 stxa %g1, [%g2]ASI_DMMU
145 115 flush %g3
146 116
147 117 !
148 118 ! Allow user rdtick, and rdstick if applicable
149 119 !
150 120 CLEARTICKNPT
151 121
152 122 !
153 123 ! copy saved thread pointer to %g7
154 124 !
155 125 ldx [%l5 + CPR_MD_THRP], THREAD_REG ! mdp->thrp
156 126
157 127 !
158 128 ! since csu_md_t lives in a cprboot data page,
159 129 ! copy select data to registers for later use
160 130 ! before freeing cprboot text/data pages
161 131 !
162 132 ldx [%l5 + CPR_MD_QSAV_PC], %l7 ! l7 = mdp->qsav_pc
163 133 ldx [%l5 + CPR_MD_QSAV_SP], %l6 ! l6 = mdp->qsav_sp
164 134
165 135 !
166 136 ! save cookie from the new/tmp prom
167 137 !
168 138 set i_cpr_tmp_cif, %g1
169 139 stn %l4, [%g1]
170 140
171 141 !
172 142 ! save prom tba
173 143 !
174 144 set prom_tba, %g1
175 145 rdpr %tba, %g2
176 146 stx %g2, [%g1]
177 147
178 148 !
179 149 ! start slave cpus, pause them within kernel text,
180 150 ! and restore the original prom pages
181 151 !
182 152 call i_cpr_mp_setup
183 153 nop
184 154
185 155 !
186 156 ! since this routine is entered only by a jmp from cprboot,
187 157 ! we can set cpr_suspend_succeeded here
188 158 !
189 159 set cpr_suspend_succeeded, %l0
190 160 mov 1, %l1
191 161 st %l1, [%l0]
192 162
193 163 !
194 164 ! special shortened version of longjmp
195 165 ! Don't need to flushw
196 166 !
197 167 mov %l7, %i7 ! i7 = saved pc
198 168 mov %l6, %fp ! i6 = saved sp
199 169 ret ! return 1
200 170 restore %g0, 1, %o0 ! takes underflow, switches stack
201 171 SET_SIZE(i_cpr_resume_setup)
202 172
203 173
204 174 !
205 175 ! while running on the new/tmp prom, the prom's trap table
206 176 ! must be used to handle translations within prom space
207 177 ! since the kernel's mappings may not match this prom.
208 178 !
209 179 ! always set %tba to the prom's trap table before calling
210 180 ! any prom service; after returning, read %tba again;
211 181 ! if the %tba wasn't changed by the prom service,
212 182 ! restore the original %tba.
213 183 !
214 184 ! a call stack looks like this:
215 185 !
216 186 ! current prom cookie
217 187 ! [i_cpr_cif_wrapper]
218 188 ! client_handler
219 189 ! p1275_sparc_cif_handler
220 190 ! prom_xxx
221 191 !
222 192 ENTRY(i_cpr_cif_wrapper)
223 193 save %sp, -SA64(MINFRAME64 + 8), %sp
224 194 rdpr %tba, %o5 ! read original %tba
225 195 stx %o5, [%fp + V9BIAS64 - 8]
226 196 set prom_tba, %l4
227 197 ldx [%l4], %o4 ! read prom_tba
228 198 wrpr %o4, %tba ! switch to prom trap table
229 199
230 200 set i_cpr_tmp_cif, %g3 ! cookie for new/tmp prom
231 201 ldn [%g3], %g4
232 202 jmpl %g4, %o7 ! call prom service
233 203 mov %i0, %o0
234 204
235 205 ldx [%l4], %o4 ! read prom_tba
236 206 rdpr %tba, %o3 ! read current %tba
237 207 cmp %o3, %o4 ! did prom change %tba ?
238 208 bne,pn %xcc, 1f ! yes, dont reset %tba
239 209 nop
240 210 ldx [%fp + V9BIAS64 - 8], %o5
241 211 wrpr %o5, %tba ! no change, restore orignal
242 212 1:
243 213 ret
244 214 restore %g0, %o0, %o0
245 215 SET_SIZE(i_cpr_cif_wrapper)
246 216
247 217
248 218 !
249 219 ! write dtlb entry at index
250 220 !
251 221 ENTRY(dtlb_wr_entry)
252 222 sllx %o0, 3, %o0 ! index << 3
253 223 ldx [%o1], %o5 ! o5 = tte.ll
254 224 ldx [%o2], %o4 ! o4 = va_tag
255 225 srlx %o4, MMU_PAGESHIFT, %o4 ! clear any page offset
256 226 sllx %o4, MMU_PAGESHIFT, %o4 ! o4 = va_tag & PAGEMASK
257 227 set MMU_TAG_ACCESS, %o3
258 228 stxa %o4, [%o3]ASI_DMMU
259 229 stxa %o5, [%o0]ASI_DTLB_ACCESS
260 230 membar #Sync
261 231 retl
262 232 nop
263 233 SET_SIZE(dtlb_wr_entry)
264 234
265 235
266 236 !
267 237 ! write itlb entry at index
268 238 !
269 239 ENTRY(itlb_wr_entry)
270 240 sllx %o0, 3, %o0 ! index << 3
271 241 ldx [%o1], %o5 ! o5 = tte.ll
272 242 ldx [%o2], %o4 ! o4 = va_tag
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273 243 srlx %o4, MMU_PAGESHIFT, %o4 ! clear any page offset
274 244 sllx %o4, MMU_PAGESHIFT, %o4 ! o4 = va_tag & PAGEMASK
275 245 set MMU_TAG_ACCESS, %o3
276 246 stxa %o4, [%o3]ASI_IMMU
277 247 stxa %o5, [%o0]ASI_ITLB_ACCESS
278 248 membar #Sync
279 249 retl
280 250 nop
281 251 SET_SIZE(itlb_wr_entry)
282 252
283 -#endif /* !lint */
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