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restore sparc comments
de-linting of .s files
*** 24,38 ****
* Use is subject to license terms.
*
* Assembly code support for the jalapeno module
*/
- #pragma ident "%Z%%M% %I% %E% SMI"
-
- #if !defined(lint)
#include "assym.h"
- #endif /* lint */
#include <sys/asm_linkage.h>
#include <sys/mmu.h>
#include <vm/hat_sfmmu.h>
#include <sys/machparam.h>
--- 24,34 ----
*** 52,63 ****
#ifdef TRAPTRACE
#include <sys/traptrace.h>
#endif /* TRAPTRACE */
- #if !defined(lint)
-
/* BEGIN CSTYLED */
#if defined(JALAPENO) && defined(JALAPENO_ERRATA_85)
#define CHK_JP_ERRATA85_ENABLED(scr, label) \
--- 48,57 ----
*** 322,342 ****
set cpunodes + ECACHE_SIZE, scr2; \
ld [scr1 + scr2], scr1
/* END CSTYLED */
- #endif /* !lint */
-
- #if defined(lint)
-
- /* ARGSUSED */
- void
- shipit(int upaid, int bn)
- { return; }
-
- #else /* lint */
-
/*
* Ship mondo to aid using implicit busy/nack pair (bn ignored)
*/
ENTRY_NP(shipit)
sll %o0, IDCR_PID_SHIFT, %g1 ! IDCR<18:14> = agent id
--- 316,325 ----
*** 345,372 ****
membar #Sync
retl
nop
SET_SIZE(shipit)
- #endif /* lint */
-
/*
* flush_ecache:
* %o0 - 64 bit physical address
* %o1 - ecache size
* %o2 - ecache linesize
*/
- #if defined(lint)
- /*ARGSUSED*/
- void
- flush_ecache(uint64_t physaddr, size_t ecache_size, size_t ecache_linesize)
- {}
-
- #else /* !lint */
-
ENTRY(flush_ecache)
#if defined(JALAPENO) && defined(JALAPENO_ERRATA_85)
CHK_JP_ERRATA85_ENABLED(%g1, flush_ecache_1);
JP_FORCE_FULL_SPEED(%o3, %g1, %g2, %g3); /* %o3: saved speed */
flush_ecache_1:
--- 328,345 ----
*** 385,405 ****
retl
nop
SET_SIZE(flush_ecache)
- #endif /* lint */
-
- #if defined(lint)
-
- void
- fast_ecc_err(void)
- {}
-
- #else /* lint */
-
.section ".text"
.align 64
ENTRY_NP(fast_ecc_err)
/*
--- 358,368 ----
*** 526,554 ****
ba sys_trap
movl %icc, PIL_14, %g4
SET_SIZE(fast_ecc_err)
- #endif /* lint */
-
/*
* Fast ECC error at TL>0 handler
* We get here via trap 70 at TL>0->Software trap 0 at TL>0. We enter
* this routine with %g1 and %g2 already saved in %tpc, %tnpc and %tstate.
* For a complete description of the Fast ECC at TL>0 handling see the
* comment block "Cheetah/Cheetah+ Fast ECC at TL>0 trap strategy" in
* us3_common_asm.s
*/
- #if defined(lint)
- void
- fast_ecc_tl1_err(void)
- {}
-
- #else /* lint */
-
.section ".text"
.align 64
ENTRY_NP(fast_ecc_tl1_err)
/*
--- 489,508 ----
*** 768,802 ****
*/
CH_ERR_TL1_PANIC_EXIT(fecc_tl1_err);
SET_SIZE(fast_ecc_tl1_err)
- #endif /* lint */
-
- #if defined(lint)
-
- uint64_t
- get_jbus_config(void)
- { return (0); }
-
- /* ARGSUSED */
- void
- set_jbus_config(uint64_t jbus_config)
- {}
-
- /* ARGSUSED */
- void
- set_mcu_ctl_reg1(uint64_t mcu_ctl)
- {}
-
- uint64_t
- get_mcu_ctl_reg1(void)
- { return (0); }
-
- #else /* lint */
-
ENTRY(get_jbus_config)
ldxa [%g0]ASI_JBUS_CONFIG, %o0
retl
nop
SET_SIZE(get_jbus_config)
--- 722,732 ----
*** 821,834 ****
membar #Sync
retl
nop
SET_SIZE(set_mcu_ctl_reg1)
- #endif /* lint */
-
- #if defined(lint)
/*
* scrubphys - Pass in the aligned physical memory address
* that you want to scrub, along with the ecache set size.
*
* 1) Displacement flush the E$ line corresponding to %addr.
--- 751,761 ----
*** 847,862 ****
* as modified, but then we found out that for spitfire, if it misses in the
* E$ it will probably install as an M, but if it hits in the E$, then it
* will stay E, if the store doesn't happen. So the first displacement flush
* should ensure that the CAS will miss in the E$. Arrgh.
*/
- /* ARGSUSED */
- void
- scrubphys(uint64_t paddr, int ecache_set_size)
- {}
-
- #else /* lint */
ENTRY(scrubphys)
rdpr %pstate, %o4
andn %o4, PSTATE_IE | PSTATE_AM, %o5
wrpr %o5, %g0, %pstate ! clear IE, AM bits
--- 774,783 ----
*** 880,893 ****
retl
membar #Sync ! move the data out of the load buffer
SET_SIZE(scrubphys)
- #endif /* lint */
-
-
- #if defined(lint)
/*
* clearphys - Pass in the physical memory address of the checkblock
* that you want to push out, cleared with a recognizable pattern,
* from the ecache.
*
--- 801,810 ----
*** 894,910 ****
* To ensure that the ecc gets recalculated after the bad data is cleared,
* we must write out enough data to fill the w$ line (64 bytes). So we read
* in an entire ecache subblock's worth of data, and write it back out.
* Then we overwrite the 16 bytes of bad data with the pattern.
*/
- /* ARGSUSED */
- void
- clearphys(uint64_t paddr, int ecache_set_size, int ecache_linesize)
- {
- }
-
- #else /* lint */
ENTRY(clearphys)
/* turn off IE, AM bits */
rdpr %pstate, %o4
andn %o4, PSTATE_IE | PSTATE_AM, %o5
wrpr %o5, %g0, %pstate
--- 811,820 ----
*** 960,986 ****
/* return and re-enable IE and AM */
retl
wrpr %g0, %o4, %pstate
SET_SIZE(clearphys)
- #endif /* lint */
-
- #if defined(lint)
/*
* Jalapeno Ecache displacement flush the specified line from the E$
*
* Register usage:
* %o0 - 64 bit physical address for flushing
* %o1 - Ecache set size
*/
- /*ARGSUSED*/
- void
- ecache_flush_line(uint64_t flushaddr, int ec_set_size)
- {
- }
- #else /* lint */
ENTRY(ecache_flush_line)
#if defined(JALAPENO) && defined(JALAPENO_ERRATA_85)
CHK_JP_ERRATA85_ENABLED(%g1, ecache_flush_line_1);
JP_FORCE_FULL_SPEED(%o5, %g1, %g2, %g3) /* %o5: saved speed */
--- 870,887 ----
*** 996,1020 ****
#endif /* JALAPENO && JALAPENO_ERRATA_85 */
retl
nop
SET_SIZE(ecache_flush_line)
- #endif /* lint */
/*
* Perform necessary cpu workaround to ensure jbus ordering.
* Called only from Fire systems.
* CPU's internal "invalidate FIFOs" are flushed.
*/
- #if defined(lint)
- void
- jbus_stst_order()
- {}
- #else /* lint */
-
#define VIS_BLOCKSIZE 64
.seg ".data"
.align VIS_BLOCKSIZE
.type sync_buf, #object
--- 897,914 ----
*** 1033,1055 ****
retl
membar #Sync
SET_SIZE(jbus_stst_order)
- #endif /* lint */
-
- #if defined(lint)
/*
* This routine will not be called in Jalapeno systems.
*/
- void
- flush_ipb(void)
- { return; }
-
- #else /* lint */
-
ENTRY(flush_ipb)
retl
nop
SET_SIZE(flush_ipb)
- #endif /* lint */
--- 927,939 ----