1 #ifndef MACHINE_H 2 #define MACHINE_H 3 4 #if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) 5 #define ARCH_BIG_ENDIAN 1 6 #else 7 #define ARCH_BIG_ENDIAN 0 8 #endif 9 10 11 enum { 12 ARCH_LP32, 13 ARCH_X32, 14 ARCH_LP64, 15 ARCH_LLP64, 16 }; 17 18 #ifdef __LP64__ 19 #define ARCH_M64_DEFAULT ARCH_LP64 20 #elif defined(__x86_64__) || defined(__x86_64) 21 #define ARCH_M64_DEFAULT ARCH_X32 22 #else 23 #define ARCH_M64_DEFAULT ARCH_LP32 24 #endif 25 26 27 enum machine { 28 MACH_ARM, 29 MACH_ARM64, 30 MACH_I386, 31 MACH_X86_64, 32 MACH_MIPS32, 33 MACH_MIPS64, 34 MACH_PPC32, 35 MACH_PPC64, 36 MACH_RISCV32, 37 MACH_RISCV64, 38 MACH_SPARC32, 39 MACH_SPARC64, 40 MACH_M68K, 41 MACH_S390X, 42 MACH_UNKNOWN 43 }; 44 45 #if defined(__aarch64__) 46 #define MACH_NATIVE MACH_ARM64 47 #elif defined(__arm__) 48 #define MACH_NATIVE MACH_ARM 49 #elif defined(__x86_64__) || defined(__x86_64) 50 #define MACH_NATIVE MACH_X86_64 51 #elif defined(__i386__) || defined(__i386) 52 #define MACH_NATIVE MACH_I386 53 #elif defined(__mips64__) || (defined(__mips) && __mips == 64) 54 #define MACH_NATIVE MACH_MIPS64 55 #elif defined(__mips__) || defined(__mips) 56 #define MACH_NATIVE MACH_MIPS32 57 #elif defined(__powerpc64__) || defined(__ppc64__) 58 #define MACH_NATIVE MACH_PPC64 59 #elif defined(__powerpc__) || defined(__powerpc) || defined(__ppc__) 60 #define MACH_NATIVE MACH_PPC32 61 #elif defined(__riscv) && (__riscv_xlen == 64) 62 #define MACH_NATIVE MACH_RISCV64 63 #elif defined(__riscv) && (__riscv_xlen == 32) 64 #define MACH_NATIVE MACH_RISCV32 65 #elif defined(__sparc_v9__) 66 #define MACH_NATIVE MACH_SPARC64 67 #elif defined(__sparc__) || defined(__sparc) 68 #define MACH_NATIVE MACH_SPARC32 69 #elif defined(__m68k__) 70 #define MACH_NATIVE MACH_M68K 71 #elif defined(__s390x__) || defined(__zarch__) 72 #define MACH_NATIVE MACH_S390X 73 #else 74 #define MACH_NATIVE MACH_UNKNOWN 75 #endif 76 77 #if defined(__CHAR_UNSIGNED__) 78 #define UNSIGNED_CHAR 1 79 #else 80 #define UNSIGNED_CHAR 0 81 #endif 82 83 #endif