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11859 need swapgs mitigation
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
Reviewed by: Dan McDonald <danmcd@joyent.com>
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Robert Mustacchi <rm@fingolfin.org>
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--- old/usr/src/uts/intel/asm/cpu.h
+++ new/usr/src/uts/intel/asm/cpu.h
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21 /*
22 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
23 23 * Use is subject to license terms.
24 24 */
25 25 /*
26 26 * Copyright 2019 Joyent, Inc.
27 27 */
28 28
29 29 #ifndef _ASM_CPU_H
30 30 #define _ASM_CPU_H
31 31
32 32 #include <sys/ccompile.h>
33 33
34 34 #ifdef __cplusplus
35 35 extern "C" {
36 36 #endif
37 37
38 38 #if !defined(__lint) && defined(__GNUC__)
39 39
40 40 #if defined(__i386) || defined(__amd64)
41 41
42 42 extern __GNU_INLINE void
43 43 ht_pause(void)
44 44 {
45 45 __asm__ __volatile__(
46 46 "pause");
47 47 }
48 48
49 49 /*
50 50 * prefetch 64 bytes
51 51 *
52 52 * prefetch is an SSE extension which is not supported on
53 53 * older 32-bit processors, so define this as a no-op for now
54 54 */
55 55
56 56 extern __GNU_INLINE void
57 57 prefetch_read_many(void *addr)
58 58 {
59 59 #if defined(__amd64)
60 60 __asm__(
61 61 "prefetcht0 (%0);"
62 62 "prefetcht0 32(%0);"
63 63 : /* no output */
64 64 : "r" (addr));
65 65 #endif /* __amd64 */
66 66 }
67 67
68 68 extern __GNU_INLINE void
69 69 prefetch_read_once(void *addr)
70 70 {
71 71 #if defined(__amd64)
72 72 __asm__(
73 73 "prefetchnta (%0);"
74 74 "prefetchnta 32(%0);"
75 75 : /* no output */
76 76 : "r" (addr));
77 77 #endif /* __amd64 */
78 78 }
79 79
80 80 extern __GNU_INLINE void
81 81 prefetch_write_many(void *addr)
82 82 {
83 83 #if defined(__amd64)
84 84 __asm__(
85 85 "prefetcht0 (%0);"
86 86 "prefetcht0 32(%0);"
87 87 : /* no output */
88 88 : "r" (addr));
89 89 #endif /* __amd64 */
90 90 }
91 91
92 92 extern __GNU_INLINE void
93 93 prefetch_write_once(void *addr)
94 94 {
95 95 #if defined(__amd64)
96 96 __asm__(
97 97 "prefetcht0 (%0);"
98 98 "prefetcht0 32(%0);"
99 99 : /* no output */
100 100 : "r" (addr));
101 101 #endif /* __amd64 */
102 102 }
103 103
104 104 #if !defined(__xpv)
105 105
106 106 extern __GNU_INLINE void
107 107 cli(void)
108 108 {
109 109 __asm__ __volatile__(
110 110 "cli" : : : "memory");
111 111 }
112 112
113 113 extern __GNU_INLINE void
114 114 sti(void)
115 115 {
116 116 __asm__ __volatile__(
117 117 "sti");
118 118 }
119 119
120 120 /*
121 121 * Any newer callers of halt need to make sure that they consider calling
122 122 * x86_md_clear() before calling this to deal with any potential issues with
123 123 * MDS. Because this version of hlt is also used in panic context, we do not
124 124 * unconditionally call x86_md_clear() here and require callers to do so.
125 125 */
126 126 extern __GNU_INLINE void
127 127 i86_halt(void)
128 128 {
129 129 __asm__ __volatile__(
130 130 "sti; hlt");
131 131 }
132 132
133 133 #endif /* !__xpv */
134 134
135 135 #endif /* __i386 || defined(__amd64) */
136 136
137 137 #if defined(__amd64)
138 138
139 139 extern __GNU_INLINE void
140 140 __set_ds(selector_t value)
141 141 {
142 142 __asm__ __volatile__(
143 143 "movw %0, %%ds"
144 144 : /* no output */
145 145 : "r" (value));
146 146 }
147 147
148 148 extern __GNU_INLINE void
149 149 __set_es(selector_t value)
150 150 {
151 151 __asm__ __volatile__(
152 152 "movw %0, %%es"
153 153 : /* no output */
154 154 : "r" (value));
155 155 }
156 156
157 157 extern __GNU_INLINE void
158 158 __set_fs(selector_t value)
159 159 {
160 160 __asm__ __volatile__(
161 161 "movw %0, %%fs"
162 162 : /* no output */
163 163 : "r" (value));
164 164 }
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165 165
166 166 extern __GNU_INLINE void
167 167 __set_gs(selector_t value)
168 168 {
169 169 __asm__ __volatile__(
170 170 "movw %0, %%gs"
171 171 : /* no output */
172 172 : "r" (value));
173 173 }
174 174
175 -#if !defined(__xpv)
176 -
177 -extern __GNU_INLINE void
178 -__swapgs(void)
179 -{
180 - __asm__ __volatile__(
181 - "mfence; swapgs");
182 -}
183 -
184 -#endif /* !__xpv */
185 -
186 175 #endif /* __amd64 */
187 176
188 177 #endif /* !__lint && __GNUC__ */
189 178
190 179 #ifdef __cplusplus
191 180 }
192 181 #endif
193 182
194 183 #endif /* _ASM_CPU_H */
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