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11787 Kernel needs to be built with retpolines
11788 Kernel needs to generally use RSB stuffing
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: John Levon <john.levon@joyent.com>
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--- old/usr/src/uts/i86pc/ml/interrupt.s
+++ new/usr/src/uts/i86pc/ml/interrupt.s
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
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13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21 /*
22 22 * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
23 + * Copyright 2019 Joyent, Inc.
23 24 */
24 25
25 26 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
26 27 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */
27 28 /* All Rights Reserved */
28 29
29 30 /* Copyright (c) 1987, 1988 Microsoft Corporation */
30 31 /* All Rights Reserved */
31 32
32 33 #include <sys/asm_linkage.h>
33 34 #include <sys/asm_misc.h>
34 35 #include <sys/regset.h>
35 36 #include <sys/psw.h>
36 37 #include <sys/x86_archext.h>
37 38
38 39 #if defined(__lint)
39 40
40 41 #include <sys/types.h>
41 42 #include <sys/thread.h>
42 43 #include <sys/systm.h>
43 44
44 45 #else /* __lint */
45 46
46 47 #include <sys/segments.h>
47 48 #include <sys/pcb.h>
48 49 #include <sys/trap.h>
49 50 #include <sys/ftrace.h>
50 51 #include <sys/traptrace.h>
51 52 #include <sys/clock.h>
52 53 #include <sys/panic.h>
53 54 #include "assym.h"
54 55
55 56 #endif /* lint */
56 57
57 58 #if defined(__lint)
58 59
59 60 void
60 61 _interrupt(void)
61 62 {}
62 63
63 64 #else /* __lint */
64 65
65 66 #if defined(__amd64)
66 67
67 68 /*
68 69 * Common register usage:
69 70 *
70 71 * %r12 trap trace pointer
71 72 */
72 73 ENTRY_NP2(cmnint, _interrupt)
73 74
74 75 INTR_PUSH
75 76 INTGATE_INIT_KERNEL_FLAGS /* (set kernel rflags values) */
76 77
77 78 /*
78 79 * At the end of TRACE_PTR %r12 points to the current TRAPTRACE entry
79 80 */
80 81 TRACE_PTR(%r12, %rax, %eax, %rdx, $TT_INTERRUPT)
81 82 /* Uses labels 8 and 9 */
82 83 TRACE_REGS(%r12, %rsp, %rax, %rbx) /* Uses label 9 */
83 84 TRACE_STAMP(%r12) /* Clobbers %eax, %edx, uses 9 */
84 85
85 86 movq %rsp, %rbp
86 87
87 88 TRACE_STACK(%r12)
88 89
89 90 #ifdef TRAPTRACE
90 91 LOADCPU(%rbx) /* &cpu */
91 92 movl CPU_PRI(%rbx), %r14d /* old ipl */
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92 93 movl $255, TTR_IPL(%r12)
93 94 movl %r14d, %edi
94 95 movb %dil, TTR_PRI(%r12)
95 96 movl CPU_BASE_SPL(%rbx), %edi
96 97 movb %dil, TTR_SPL(%r12)
97 98 movb $255, TTR_VECTOR(%r12)
98 99 movq %r12, %rsi /* pass traptrace record pointer */
99 100 #endif
100 101
101 102 movq %rsp, %rdi /* pass struct regs pointer */
102 - call *do_interrupt_common
103 + movq do_interrupt_common, %rax
104 + INDIRECT_CALL_REG(rax)
103 105
104 106 jmp _sys_rtt_ints_disabled
105 107 /*NOTREACHED*/
106 108
107 109 SET_SIZE(cmnint)
108 110 SET_SIZE(_interrupt)
109 111
110 112 #elif defined(__i386)
111 113
112 114 ENTRY_NP2(cmnint, _interrupt)
113 115
114 116 INTR_PUSH
115 117 INTGATE_INIT_KERNEL_FLAGS
116 118
117 119 /*
118 120 * At the end of TRACE_PTR %esi points to the current TRAPTRACE entry
119 121 */
120 122 TRACE_PTR(%esi, %eax, %eax, %edx, $TT_INTERRUPT)
121 123 /* Uses labels 8 and 9 */
122 124 TRACE_REGS(%esi, %esp, %eax, %ebx) /* Uses label 9 */
123 125 TRACE_STAMP(%esi) /* Clobbers %eax, %edx, uses 9 */
124 126
125 127 movl %esp, %ebp
126 128
127 129 TRACE_STACK(%esi)
128 130
129 131 pushl %esi /* pass traptrace record pointer */
130 132 pushl %ebp /* pass struct regs pointer */
131 133 call *do_interrupt_common /* interrupt service routine */
132 134 addl $8, %esp /* pop args off of stack */
133 135
134 136 jmp _sys_rtt_ints_disabled
135 137 /*NOTREACHED*/
136 138
137 139 SET_SIZE(cmnint)
138 140 SET_SIZE(_interrupt)
139 141
140 142 #endif /* __i386 */
141 143
142 144 /*
143 145 * Declare a uintptr_t which has the size of _interrupt to enable stack
144 146 * traceback code to know when a regs structure is on the stack.
145 147 */
146 148 .globl _interrupt_size
147 149 .align CLONGSIZE
148 150 _interrupt_size:
149 151 .NWORD . - _interrupt
150 152 .type _interrupt_size, @object
151 153
152 154 #endif /* __lint */
153 155
154 156 #if defined(__lint)
155 157
156 158 void
157 159 fakesoftint(void)
158 160 {}
159 161
160 162 #else /* __lint */
161 163
162 164 /
163 165 / If we're here, we're being called from splx() to fake a soft
164 166 / interrupt (note that interrupts are still disabled from splx()).
165 167 / We execute this code when a soft interrupt is posted at
166 168 / level higher than the CPU's current spl; when spl is lowered in
167 169 / splx(), it will see the softint and jump here. We'll do exactly
168 170 / what a trap would do: push our flags, %cs, %eip, error code
169 171 / and trap number (T_SOFTINT). The cmnint() code will see T_SOFTINT
170 172 / and branch to the dosoftint() code.
171 173 /
172 174 #if defined(__amd64)
173 175
174 176 /*
175 177 * In 64-bit mode, iretq -always- pops all five regs
176 178 * Imitate the 16-byte auto-align of the stack, and the
177 179 * zero-ed out %ss value.
178 180 */
179 181 ENTRY_NP(fakesoftint)
180 182 movq %rsp, %r11
181 183 andq $-16, %rsp
182 184 pushq $KDS_SEL /* %ss */
183 185 pushq %r11 /* %rsp */
184 186 pushf /* rflags */
185 187 #if defined(__xpv)
186 188 popq %r11
187 189 EVENT_MASK_TO_IE(%rdi, %r11)
188 190 pushq %r11
189 191 #endif
190 192 pushq $KCS_SEL /* %cs */
191 193 leaq fakesoftint_return(%rip), %r11
192 194 pushq %r11 /* %rip */
193 195 pushq $0 /* err */
194 196 pushq $T_SOFTINT /* trap */
195 197 jmp cmnint
196 198 ALTENTRY(fakesoftint_return)
197 199 ret
198 200 SET_SIZE(fakesoftint_return)
199 201 SET_SIZE(fakesoftint)
200 202
201 203 #elif defined(__i386)
202 204
203 205 ENTRY_NP(fakesoftint)
204 206 pushfl
205 207 #if defined(__xpv)
206 208 popl %eax
207 209 EVENT_MASK_TO_IE(%edx, %eax)
208 210 pushl %eax
209 211 #endif
210 212 pushl %cs
211 213 pushl $fakesoftint_return
212 214 pushl $0
213 215 pushl $T_SOFTINT
214 216 jmp cmnint
215 217 ALTENTRY(fakesoftint_return)
216 218 ret
217 219 SET_SIZE(fakesoftint_return)
218 220 SET_SIZE(fakesoftint)
219 221
220 222 #endif /* __i386 */
221 223 #endif /* __lint */
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