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11528 Makefile.noget can get gone
11529 Use -Wno-maybe-initialized
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--- old/usr/src/uts/intel/core_pcbe/Makefile
+++ new/usr/src/uts/intel/core_pcbe/Makefile
1 1 #
2 2 # CDDL HEADER START
3 3 #
4 4 # The contents of this file are subject to the terms of the
5 5 # Common Development and Distribution License (the "License").
6 6 # You may not use this file except in compliance with the License.
7 7 #
8 8 # You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 # or http://www.opensolaris.org/os/licensing.
10 10 # See the License for the specific language governing permissions
11 11 # and limitations under the License.
12 12 #
13 13 # When distributing Covered Code, include this CDDL HEADER in each
14 14 # file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 # If applicable, add the following below this CDDL HEADER, with the
16 16 # fields enclosed by brackets "[]" replaced with your own identifying
17 17 # information: Portions Copyright [yyyy] [name of copyright owner]
18 18 #
19 19 # CDDL HEADER END
20 20 #
21 21 #
22 22 # Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
23 23 #
24 24 # Copyright 2019, Joyent, Inc.
25 25 #
26 26 # This Makefile builds
27 27 # the Intel Core Architecture Performance Counter BackEnd (PCBE).
28 28 #
29 29
30 30 UTSBASE = ../..
31 31
32 32 #
33 33 # The following objects are autogenerated by cpcgen.
34 34 #
35 35 CPCGEN_OBJS = \
36 36 core_pcbe_cpcgen.o \
37 37 core_pcbe_bdw_de.o \
38 38 core_pcbe_bdw.o \
39 39 core_pcbe_bdx.o \
40 40 core_pcbe_bnl.o \
41 41 core_pcbe_clx.o \
42 42 core_pcbe_glm.o \
43 43 core_pcbe_glp.o \
44 44 core_pcbe_hsw.o \
45 45 core_pcbe_hsx.o \
46 46 core_pcbe_ivb.o \
47 47 core_pcbe_ivt.o \
48 48 core_pcbe_jkt.o \
49 49 core_pcbe_nhm_ep.o \
50 50 core_pcbe_nhm_ex.o \
51 51 core_pcbe_skl.o \
52 52 core_pcbe_skx.o \
53 53 core_pcbe_slm.o \
54 54 core_pcbe_snb.o \
55 55 core_pcbe_wsm_ep_dp.o \
56 56 core_pcbe_wsm_ep_sp.o \
57 57 core_pcbe_wsm_ex.o
58 58
59 59 CPCGEN_COMMON = core_pcbe_cpcgen.c
60 60 CPCGEN_CMD = $(CPCGEN) -d $(SRC)/data/perfmon -o .
61 61 CPCGEN_SRCS = $(CPCGEN_OBJS:%.o=%.c) core_pcbe_cpcgen.h
62 62
63 63 #
64 64 # Define module and object file sets.
65 65 #
66 66 MODULE = pcbe.GenuineIntel.6.15
67 67 OBJECTS = $(CORE_PCBE_OBJS:%=$(OBJS_DIR)/%)
68 68 OBJECTS += $(CPCGEN_OBJS:%=$(OBJS_DIR)/%)
69 69 LINTS = $(CORE_PCBE_OBJS:%.o=$(LINTS_DIR)/%.ln)
70 70 ROOTMODULE = $(USR_PCBE_DIR)/$(MODULE)
71 71
72 72 #
73 73 # This order matches the families declared in uts/intel/sys/x86_archext.h.
74 74 #
75 75 SOFTLINKS = \
76 76 pcbe.GenuineIntel.6.23 \
77 77 pcbe.GenuineIntel.6.29 \
78 78 pcbe.GenuineIntel.6.30 \
79 79 pcbe.GenuineIntel.6.31 \
80 80 pcbe.GenuineIntel.6.26 \
81 81 pcbe.GenuineIntel.6.46 \
82 82 pcbe.GenuineIntel.6.37 \
83 83 pcbe.GenuineIntel.6.44 \
84 84 pcbe.GenuineIntel.6.47 \
85 85 pcbe.GenuineIntel.6.42 \
86 86 pcbe.GenuineIntel.6.45 \
87 87 pcbe.GenuineIntel.6.58 \
88 88 pcbe.GenuineIntel.6.62 \
89 89 pcbe.GenuineIntel.6.60 \
90 90 pcbe.GenuineIntel.6.69 \
91 91 pcbe.GenuineIntel.6.70 \
92 92 pcbe.GenuineIntel.6.63 \
93 93 pcbe.GenuineIntel.6.61 \
94 94 pcbe.GenuineIntel.6.71 \
95 95 pcbe.GenuineIntel.6.79 \
96 96 pcbe.GenuineIntel.6.86 \
97 97 pcbe.GenuineIntel.6.78 \
98 98 pcbe.GenuineIntel.6.85 \
99 99 pcbe.GenuineIntel.6.94 \
100 100 pcbe.GenuineIntel.6.142 \
101 101 pcbe.GenuineIntel.6.158 \
102 102 pcbe.GenuineIntel.6.28 \
103 103 pcbe.GenuineIntel.6.38 \
104 104 pcbe.GenuineIntel.6.39 \
105 105 pcbe.GenuineIntel.6.53 \
106 106 pcbe.GenuineIntel.6.54 \
107 107 pcbe.GenuineIntel.6.55 \
108 108 pcbe.GenuineIntel.6.77 \
109 109 pcbe.GenuineIntel.6.76 \
110 110 pcbe.GenuineIntel.6.92 \
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111 111 pcbe.GenuineIntel.6.95 \
112 112 pcbe.GenuineIntel.6.122
113 113
114 114 ROOTSOFTLINKS = $(SOFTLINKS:%=$(USR_PCBE_DIR)/%)
115 115
116 116 #
117 117 # Include common rules.
118 118 #
119 119 include $(UTSBASE)/intel/Makefile.intel
120 120
121 -CERRWARN += -_gcc=-Wno-uninitialized
121 +CERRWARN += $(CNOWARN_UNINIT)
122 122 CERRWARN += -_gcc=-Wno-unused-variable
123 123
124 124 CPPFLAGS += -I$(UTSBASE)/intel/core_pcbe
125 125 CLEANFILES += $(CPCGEN_SRCS)
126 126
127 127 #
128 128 # Define targets.
129 129 #
130 130 ALL_TARGET = $(CPCGEN_COMMON) .WAIT $(BINARY)
131 131 LINT_MODULE = core_pcbe
132 132 LINT_TARGET = $(LINT_MODULE).lint
133 133 INSTALL_TARGET = $(CPCGEN_COMMON) .WAIT $(BINARY) $(ROOTMODULE) $(ROOTSOFTLINKS)
134 134
135 135 #
136 136 # Default build targets.
137 137 #
138 138 .KEEP_STATE:
139 139
140 140 def: $(DEF_DEPS)
141 141
142 142 all: $(ALL_DEPS)
143 143
144 144 clean: $(CLEAN_DEPS)
145 145
146 146 clobber: $(CLOBBER_DEPS)
147 147
148 148 lint: $(LINT_DEPS)
149 149
150 150 modlintlib: $(MODLINTLIB_DEPS)
151 151
152 152 clean.lint: $(CLEAN_LINT_DEPS)
153 153
154 154 install: $(INSTALL_DEPS)
155 155
156 156 $(ROOTSOFTLINKS): $(ROOTMODULE)
157 157 -$(RM) $@; $(SYMLINK) $(MODULE) $@
158 158
159 159 core_pcbe_cpcgen.c:
160 160 $(CPCGEN_CMD) -a -H
161 161
162 162 core_pcbe_%.c: $(CPCGEN_COMMON)
163 163 $(CPCGEN_CMD) -c -p \
164 164 $$(echo $@ | \
165 165 $(SED) -e 's/core_pcbe_//g' -e 's/_/-/g' -e 's/.c$$//g')
166 166
167 167 $(OBJS_DIR)/%.o: %.c
168 168 $(COMPILE.c) -I$(SRC)/uts/intel/pcbe/ -o $@ $<
169 169 $(CTFCONVERT_O)
170 170
171 171 #
172 172 # Include common targets.
173 173 #
174 174 include $(UTSBASE)/intel/Makefile.targ
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