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11200 cpcgen needs smatch fixes again
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--- old/usr/src/tools/cpcgen/cpcgen.c
+++ new/usr/src/tools/cpcgen/cpcgen.c
1 1 /*
2 2 * This file and its contents are supplied under the terms of the
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3 3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 4 * You may only use this file in accordance with the terms of version
5 5 * 1.0 of the CDDL.
6 6 *
7 7 * A full copy of the text of the CDDL should have accompanied this
8 8 * source. A copy of the CDDL is also available via the Internet at
9 9 * http://www.illumos.org/license/CDDL.
10 10 */
11 11
12 12 /*
13 - * Copyright (c) 2019, Joyent, Inc.
13 + * Copyright 2019, Joyent, Inc.
14 14 */
15 15
16 16 /*
17 17 * This program transforms Intel perfmon and AMD PMC data files into C files and
18 18 * manual pages.
19 19 */
20 20
21 21 #include <stdio.h>
22 22 #include <stdarg.h>
23 23 #include <unistd.h>
24 24 #include <err.h>
25 25 #include <libgen.h>
26 26 #include <libnvpair.h>
27 27 #include <strings.h>
28 28 #include <errno.h>
29 29 #include <limits.h>
30 30 #include <sys/mman.h>
31 31 #include <sys/param.h>
32 32 #include <assert.h>
33 33 #include <ctype.h>
34 34 #include <sys/types.h>
35 35 #include <sys/stat.h>
36 36 #include <fcntl.h>
37 37 #include <dirent.h>
38 38
39 39 #include <json_nvlist.h>
40 40
41 41 #define EXIT_USAGE 2
42 42 #define CPROC_MAX_STEPPINGS 16
43 43
44 44 typedef enum {
45 45 CPCGEN_MODE_UNKNOWN = 0,
46 46 CPCGEN_MODE_INTEL,
47 47 CPCGEN_MODE_AMD
48 48 } cpc_mode_t;
49 49
50 50 typedef struct cpc_proc {
51 51 struct cpc_proc *cproc_next;
52 52 uint_t cproc_family;
53 53 uint_t cproc_model;
54 54 uint_t cproc_nsteps;
55 55 uint_t cproc_steppings[CPROC_MAX_STEPPINGS];
56 56 } cpc_proc_t;
57 57
58 58 typedef enum cpc_file_type {
59 59 CPC_FILE_CORE = 1 << 0,
60 60 CPC_FILE_OFF_CORE = 1 << 1,
61 61 CPC_FILE_UNCORE = 1 << 2,
62 62 CPC_FILE_FP_MATH = 1 << 3,
63 63 CPC_FILE_UNCORE_EXP = 1 << 4
64 64 } cpc_type_t;
65 65
66 66 typedef struct cpc_map {
67 67 struct cpc_map *cmap_next;
68 68 cpc_type_t cmap_type;
69 69 nvlist_t *cmap_data;
70 70 char *cmap_path;
71 71 const char *cmap_name;
72 72 cpc_proc_t *cmap_procs;
73 73 } cpc_map_t;
74 74
75 75 typedef struct cpc_whitelist {
76 76 const char *cwhite_short;
77 77 const char *cwhite_human;
78 78 uint_t cwhite_mask;
79 79 } cpc_whitelist_t;
80 80
81 81 /*
82 82 * List of architectures that we support generating this data for. This is done
83 83 * so that processors that illumos doesn't support or run on aren't generated
84 84 * (generally the Xeon Phi).
85 85 */
86 86 static cpc_whitelist_t cpcgen_intel_whitelist[] = {
87 87 /* Nehalem */
88 88 { "NHM-EP", "nhm_ep", CPC_FILE_CORE },
89 89 { "NHM-EX", "nhm_ex", CPC_FILE_CORE },
90 90 /* Westmere */
91 91 { "WSM-EP-DP", "wsm_ep_dp", CPC_FILE_CORE },
92 92 { "WSM-EP-SP", "wsm_ep_sp", CPC_FILE_CORE },
93 93 { "WSM-EX", "wsm_ex", CPC_FILE_CORE },
94 94 /* Sandy Bridge */
95 95 { "SNB", "snb", CPC_FILE_CORE },
96 96 { "JKT", "jkt", CPC_FILE_CORE },
97 97 /* Ivy Bridge */
98 98 { "IVB", "ivb", CPC_FILE_CORE },
99 99 { "IVT", "ivt", CPC_FILE_CORE },
100 100 /* Haswell */
101 101 { "HSW", "hsw", CPC_FILE_CORE },
102 102 { "HSX", "hsx", CPC_FILE_CORE },
103 103 /* Broadwell */
104 104 { "BDW", "bdw", CPC_FILE_CORE },
105 105 { "BDW-DE", "bdw_de", CPC_FILE_CORE },
106 106 { "BDX", "bdx", CPC_FILE_CORE },
107 107 /* Skylake */
108 108 { "SKL", "skl", CPC_FILE_CORE },
109 109 { "SKX", "skx", CPC_FILE_CORE },
110 110 /* Cascade Lake */
111 111 { "CLX", "clx", CPC_FILE_CORE },
112 112 /* Atom */
113 113 { "BNL", "bnl", CPC_FILE_CORE },
114 114 { "SLM", "slm", CPC_FILE_CORE },
115 115 { "GLM", "glm", CPC_FILE_CORE },
116 116 { "GLP", "glp", CPC_FILE_CORE },
117 117 { NULL }
118 118 };
119 119
120 120 typedef struct cpc_papi {
121 121 const char *cpapi_intc;
122 122 const char *cpapi_papi;
123 123 } cpc_papi_t;
124 124
125 125 /*
126 126 * This table maps events with an Intel specific name to the corresponding PAPI
127 127 * name. There may be multiple Intel events which map to the same PAPI event.
128 128 * This is usually because different processors have different names for an
129 129 * event. We use the title as opposed to the event codes because those can
130 130 * change somewhat arbitrarily between processor generations.
131 131 */
132 132 static cpc_papi_t cpcgen_intel_papi_map[] = {
133 133 { "CPU_CLK_UNHALTED.THREAD_P", "PAPI_tot_cyc" },
134 134 { "INST_RETIRED.ANY_P", "PAPI_tot_ins" },
135 135 { "BR_INST_RETIRED.ALL_BRANCHES", "PAPI_br_ins" },
136 136 { "BR_MISP_RETIRED.ALL_BRANCHES", "PAPI_br_msp" },
137 137 { "BR_INST_RETIRED.CONDITIONAL", "PAPI_br_cn" },
138 138 { "CYCLE_ACTIVITY.CYCLES_L1D_MISS", "PAPI_l1_dcm" },
139 139 { "L1I.HITS", "PAPI_l1_ich" },
140 140 { "ICACHE.HIT", "PAPI_l1_ich" },
141 141 { "L1I.MISS", "PAPI_L1_icm" },
142 142 { "ICACHE.MISSES", "PAPI_l1_icm" },
143 143 { "L1I.READS", "PAPI_l1_ica" },
144 144 { "ICACHE.ACCESSES", "PAPI_l1_ica" },
145 145 { "L1I.READS", "PAPI_l1_icr" },
146 146 { "ICACHE.ACCESSES", "PAPI_l1_icr" },
147 147 { "L2_RQSTS.CODE_RD_MISS", "PAPI_l2_icm" },
148 148 { "L2_RQSTS.MISS", "PAPI_l2_tcm" },
149 149 { "ITLB_MISSES.MISS_CAUSES_A_WALK", "PAPI_tlb_im" },
150 150 { "DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", "PAPI_tlb_dm" },
151 151 { "PAGE_WALKS.D_SIDE_WALKS", "PAPI_tlb_dm" },
152 152 { "PAGE_WALKS.I_SIDE_WALKS", "PAPI_tlb_im" },
153 153 { "PAGE_WALKS.WALKS", "PAPI_tlb_tl" },
154 154 { "INST_QUEUE_WRITES", "PAPI_tot_iis" },
155 155 { "MEM_INST_RETIRED.STORES" "PAPI_sr_ins" },
156 156 { "MEM_INST_RETIRED.LOADS" "PAPI_ld_ins" },
157 157 { NULL, NULL }
158 158 };
159 159
160 160 typedef struct cpcgen_ops {
161 161 void (*cgen_op_gather)(const char *, const char *);
162 162 void (*cgen_op_common)(int);
163 163 char *(*cgen_op_name)(cpc_map_t *);
164 164 boolean_t (*cgen_op_skip)(nvlist_t *, const char *, uint_t);
165 165 boolean_t (*cgen_op_file_before)(FILE *, cpc_map_t *);
166 166 boolean_t (*cgen_op_file_after)(FILE *, cpc_map_t *);
167 167 boolean_t (*cgen_op_event)(FILE *, nvlist_t *, const char *, uint32_t);
168 168 } cpcgen_ops_t;
169 169
170 170 static cpcgen_ops_t cpcgen_ops;
171 171 static const char *cpcgen_intel_mapfile = "/mapfile.csv";
172 172 static const char *cpcgen_progname;
173 173 static cpc_map_t *cpcgen_maps;
174 174 static cpc_mode_t cpcgen_mode = CPCGEN_MODE_UNKNOWN;
175 175
176 176 /*
177 177 * Constants used for generating data.
178 178 */
179 179 /* BEGIN CSTYLED */
180 180 static const char *cpcgen_cfile_intel_header = ""
181 181 "/*\n"
182 182 " * Copyright (c) 2018, Intel Corporation\n"
183 183 " * Copyright (c) 2018, Joyent, Inc\n"
184 184 " * All rights reserved.\n"
185 185 " *\n"
186 186 " * Redistribution and use in source and binary forms, with or without\n"
187 187 " * modification, are permitted provided that the following conditions are met:\n"
188 188 " * \n"
189 189 " * 1. Redistributions of source code must retain the above copyright notice,\n"
190 190 " * this list of conditions and the following disclaimer.\n"
191 191 " * \n"
192 192 " * 2. Redistributions in binary form must reproduce the above copyright \n"
193 193 " * notice, this list of conditions and the following disclaimer in the\n"
194 194 " * documentation and/or other materials provided with the distribution.\n"
195 195 " * \n"
196 196 " * 3. Neither the name of the Intel Corporation nor the names of its \n"
197 197 " * contributors may be used to endorse or promote products derived from\n"
198 198 " * this software without specific prior written permission.\n"
199 199 " *\n"
200 200 " * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n"
201 201 " * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n"
202 202 " * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n"
203 203 " * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE\n"
204 204 " * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n"
205 205 " * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n"
206 206 " * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n"
207 207 " * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n"
208 208 " * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n"
209 209 " * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n"
210 210 " * POSSIBILITY OF SUCH DAMAGE.\n"
211 211 " *\n"
212 212 " * This file was automatically generated by cpcgen from the data file\n"
213 213 " * data/perfmon%s\n"
214 214 " *\n"
215 215 " * Do not modify this file. Your changes will be lost!\n"
216 216 " */\n"
217 217 "\n";
218 218 /* END CSTYLED */
219 219
220 220 static const char *cpcgen_cfile_intel_table_start = ""
221 221 "#include <core_pcbe_table.h>\n"
222 222 "\n"
223 223 "const struct events_table_t pcbe_core_events_%s[] = {\n";
224 224
225 225 static const char *cpcgen_cfile_intel_table_end = ""
226 226 "\t{ NT_END, 0, 0, \"\" }\n"
227 227 "};\n";
228 228
229 229 /* BEGIN CSTYLED */
230 230 static const char *cpcgen_manual_intel_intel_header = ""
231 231 ".\\\" Copyright (c) 2018, Intel Corporation \n"
232 232 ".\\\" Copyright (c) 2018, Joyent, Inc.\n"
233 233 ".\\\" All rights reserved.\n"
234 234 ".\\\"\n"
235 235 ".\\\" Redistribution and use in source and binary forms, with or without \n"
236 236 ".\\\" modification, are permitted provided that the following conditions are met:\n"
237 237 ".\\\"\n"
238 238 ".\\\" 1. Redistributions of source code must retain the above copyright notice,\n"
239 239 ".\\\" this list of conditions and the following disclaimer.\n"
240 240 ".\\\"\n"
241 241 ".\\\" 2. Redistributions in binary form must reproduce the above copyright\n"
242 242 ".\\\" notice, this list of conditions and the following disclaimer in the\n"
243 243 ".\\\" documentation and/or other materials provided with the distribution.\n"
244 244 ".\\\"\n"
245 245 ".\\\" 3. Neither the name of the Intel Corporation nor the names of its\n"
246 246 ".\\\" contributors may be used to endorse or promote products derived from\n"
247 247 ".\\\" this software without specific prior written permission.\n"
248 248 ".\\\"\n"
249 249 ".\\\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n"
250 250 ".\\\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n"
251 251 ".\\\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n"
252 252 ".\\\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE\n"
253 253 ".\\\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n"
254 254 ".\\\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n"
255 255 ".\\\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n"
256 256 ".\\\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n"
257 257 ".\\\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n"
258 258 ".\\\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n"
259 259 ".\\\" POSSIBILITY OF SUCH DAMAGE.\n"
260 260 ".\\\"\n"
261 261 ".\\\" This file was automatically generated by cpcgen from the data file\n"
262 262 ".\\\" data/perfmon%s\n"
263 263 ".\\\"\n"
264 264 ".\\\" Do not modify this file. Your changes will be lost!\n"
265 265 ".\\\"\n"
266 266 ".\\\" We would like to thank Intel for providing the perfmon data for use in\n"
267 267 ".\\\" our manual pages.\n"
268 268 ".Dd June 18, 2018\n"
269 269 ".Dt %s_EVENTS 3CPC\n"
270 270 ".Os\n"
271 271 ".Sh NAME\n"
272 272 ".Nm %s_events\n"
273 273 ".Nd processor model specific performance counter events\n"
274 274 ".Sh DESCRIPTION\n"
275 275 "This manual page describes events specific to the following Intel CPU\n"
276 276 "models and is derived from Intel's perfmon data.\n"
277 277 "For more information, please consult the Intel Software Developer's Manual "
278 278 "or Intel's perfmon website.\n"
279 279 ".Pp\n"
280 280 "CPU models described by this document:\n"
281 281 ".Bl -bullet\n";
282 282 /* END CSTYLED */
283 283
284 284 static const char *cpcgen_manual_intel_data = ""
285 285 ".El\n"
286 286 ".Pp\n"
287 287 "The following events are supported:\n"
288 288 ".Bl -tag -width Sy\n";
289 289
290 290 static const char *cpcgen_manual_intel_trailer = ""
291 291 ".El\n"
292 292 ".Sh SEE ALSO\n"
293 293 ".Xr cpc 3CPC\n"
294 294 ".Pp\n"
295 295 ".Lk https://download.01.org/perfmon/index/";
296 296
297 297 static const char *cpcgen_cfile_cddl_header = ""
298 298 "/*\n"
299 299 " * This file and its contents are supplied under the terms of the\n"
300 300 " * Common Development and Distribution License (\"CDDL\"), version 1.0.\n"
301 301 " * You may only use this file in accordance with the terms of version\n"
302 302 " * 1.0 of the CDDL.\n"
303 303 " *\n"
304 304 " * A full copy of the text of the CDDL should have accompanied this\n"
305 305 " * source. A copy of the CDDL is also available via the Internet at\n"
306 306 " * http://www.illumos.org/license/CDDL.\n"
307 307 " */\n"
308 308 "\n"
309 309 "/*\n"
310 310 " * Copyright 2019 Joyent, Inc\n"
311 311 " */\n"
312 312 "\n"
313 313 "/*\n"
314 314 " * This file was automatically generated by cpcgen.\n"
315 315 " */\n"
316 316 "\n"
317 317 "/*\n"
318 318 " * Do not modify this file. Your changes will be lost!\n"
319 319 " */\n"
320 320 "\n";
321 321
322 322 static const char *cpcgen_manual_amd_header = ""
323 323 ".\\\" This file was automatically generated by cpcgen from the data file\n"
324 324 ".\\\" data/amdpmc/%s\n"
325 325 ".\\\"\n"
326 326 ".\\\" Do not modify this file. Your changes will be lost!\n"
327 327 ".\\\"\n"
328 328 ".\\\" We would like to thank AMD for providing the PMC data for use in\n"
329 329 ".\\\" our manual pages.\n"
330 330 ".Dd March 25, 2019\n"
331 331 ".Dt AMD_%s_EVENTS 3CPC\n"
332 332 ".Os\n"
333 333 ".Sh NAME\n"
334 334 ".Nm amd_%s_events\n"
335 335 ".Nd AMD family %s processor performance monitoring events\n"
336 336 ".Sh DESCRIPTION\n"
337 337 "This manual page describes events specfic to AMD family %s processors.\n"
338 338 "For more information, please consult the appropriate AMD BIOS and Kernel\n"
339 339 "Developer's guide or Open-Source Register Reference manual.\n"
340 340 ".Pp\n"
341 341 "Each of the events listed below includes the AMD mnemonic which matches\n"
342 342 "the name found in the AMD manual and a brief summary of the event.\n"
343 343 "If available, a more detailed description of the event follows and then\n"
344 344 "any additional unit values that modify the event.\n"
345 345 "Each unit can be combined to create a new event in the system by placing\n"
346 346 "the '.' character between the event name and the unit name.\n"
347 347 ".Pp\n"
348 348 "The following events are supported:\n"
349 349 ".Bl -tag -width Sy\n";
350 350
351 351 static const char *cpcgen_manual_amd_trailer = ""
352 352 ".El\n"
353 353 ".Sh SEE ALSO\n"
354 354 ".Xr cpc 3CPC\n";
355 355
356 356 static const char *cpcgen_cfile_amd_header = ""
357 357 "/*\n"
358 358 " * This file was automatically generated by cpcgen from the data file\n"
359 359 " * data/perfmon%s\n"
360 360 " *\n"
361 361 " * Do not modify this file. Your changes will be lost!\n"
362 362 " */\n"
363 363 "\n";
364 364
365 365 static const char *cpcgen_cfile_amd_table_start = ""
366 366 "#include <opteron_pcbe_table.h>\n"
367 367 "#include <sys/null.h>\n"
368 368 "\n"
369 369 "const amd_event_t opteron_pcbe_%s_events[] = {\n";
370 370
371 371 static const char *cpcgen_cfile_amd_table_end = ""
372 372 "\t{ NULL, 0, 0 }\n"
373 373 "};\n";
374 374
375 375 static cpc_map_t *
376 376 cpcgen_map_lookup(const char *path)
377 377 {
378 378 cpc_map_t *m;
379 379
380 380 for (m = cpcgen_maps; m != NULL; m = m->cmap_next) {
381 381 if (strcmp(path, m->cmap_path) == 0) {
382 382 return (m);
383 383 }
384 384 }
385 385
386 386 return (NULL);
387 387 }
388 388
389 389 /*
390 390 * Parse a string of the form 'GenuineIntel-6-2E' and get out the family and
391 391 * model.
392 392 */
393 393 static void
394 394 cpcgen_parse_model(char *fsr, uint_t *family, uint_t *model, uint_t *nstepp,
395 395 uint_t *steppings)
396 396 {
397 397 const char *bstr = "GenuineIntel";
398 398 const char *brand, *fam, *mod, *step;
399 399 char *last;
400 400 long l;
401 401 uint_t nstep = 0;
402 402
403 403 /*
404 404 * Tokeninze the string. There may be an optional stepping portion,
405 405 * which has a range of steppings enclosed by '[' and ']' characters.
406 406 * While the other parts are required, the stepping may be missing.
407 407 */
408 408 if ((brand = strtok_r(fsr, "-", &last)) == NULL ||
409 409 (fam = strtok_r(NULL, "-", &last)) == NULL ||
410 410 (mod = strtok_r(NULL, "-", &last)) == NULL) {
411 411 errx(EXIT_FAILURE, "failed to parse processor id \"%s\"", fsr);
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412 412 }
413 413 step = strtok_r(NULL, "-", &last);
414 414
415 415 if (strcmp(bstr, brand) != 0) {
416 416 errx(EXIT_FAILURE, "brand string \"%s\" did not match \"%s\"",
417 417 brand, bstr);
418 418 }
419 419
420 420 errno = 0;
421 421 l = strtol(fam, &last, 16);
422 - if (errno != 0 || l < 0 || l > UINT_MAX || *last != '\0') {
422 + if (errno != 0 || l < 0 || l >= INT_MAX || *last != '\0') {
423 423 errx(EXIT_FAILURE, "failed to parse family \"%s\"", fam);
424 424 }
425 425 *family = (uint_t)l;
426 426
427 427 l = strtol(mod, &last, 16);
428 - if (errno != 0 || l < 0 || l > UINT_MAX || *last != '\0') {
428 + if (errno != 0 || l < 0 || l >= INT_MAX || *last != '\0') {
429 429 errx(EXIT_FAILURE, "failed to parse model \"%s\"", mod);
430 430 }
431 431 *model = (uint_t)l;
432 432
433 433 if (step == NULL) {
434 434 *nstepp = 0;
435 435 return;
436 436 }
437 437
438 438 if (*step != '[' || ((last = strrchr(step, ']')) == NULL)) {
439 439 errx(EXIT_FAILURE, "failed to parse stepping \"%s\": missing "
440 440 "stepping range brackets", step);
441 441 }
442 442 step++;
443 443 *last = '\0';
444 444 while (*step != '\0') {
445 445 if (!isxdigit(*step)) {
446 446 errx(EXIT_FAILURE, "failed to parse stepping: invalid "
447 447 "stepping identifier '0x%x'", *step);
448 448 }
449 449
450 450 if (nstep >= CPROC_MAX_STEPPINGS) {
451 451 errx(EXIT_FAILURE, "failed to parse stepping: "
452 452 "encountered too many steppings");
453 453 }
454 454
455 455 switch (*step) {
456 456 case '0':
457 457 steppings[nstep] = 0x0;
458 458 break;
459 459 case '1':
460 460 steppings[nstep] = 0x1;
461 461 break;
462 462 case '2':
463 463 steppings[nstep] = 0x2;
464 464 break;
465 465 case '3':
466 466 steppings[nstep] = 0x3;
467 467 break;
468 468 case '4':
469 469 steppings[nstep] = 0x4;
470 470 break;
471 471 case '5':
472 472 steppings[nstep] = 0x5;
473 473 break;
474 474 case '6':
475 475 steppings[nstep] = 0x6;
476 476 break;
477 477 case '7':
478 478 steppings[nstep] = 0x7;
479 479 break;
480 480 case '8':
481 481 steppings[nstep] = 0x8;
482 482 break;
483 483 case '9':
484 484 steppings[nstep] = 0x9;
485 485 break;
486 486 case 'a':
487 487 case 'A':
488 488 steppings[nstep] = 0xa;
489 489 break;
490 490 case 'b':
491 491 case 'B':
492 492 steppings[nstep] = 0xb;
493 493 break;
494 494 case 'c':
495 495 case 'C':
496 496 steppings[nstep] = 0xc;
497 497 break;
498 498 case 'd':
499 499 case 'D':
500 500 steppings[nstep] = 0xd;
501 501 break;
502 502 case 'e':
503 503 case 'E':
504 504 steppings[nstep] = 0xe;
505 505 break;
506 506 case 'f':
507 507 case 'F':
508 508 steppings[nstep] = 0xf;
509 509 break;
510 510 default:
511 511 errx(EXIT_FAILURE, "encountered non-hex stepping "
512 512 "character: '%c'", *step);
513 513 }
514 514 nstep++;
515 515 step++;
516 516 }
517 517
518 518 *nstepp = nstep;
519 519 }
520 520
521 521 static nvlist_t *
522 522 cpcgen_read_datafile(const char *datadir, const char *file)
523 523 {
524 524 int fd;
525 525 char *path;
526 526 struct stat st;
527 527 void *map;
528 528 nvlist_t *nvl;
529 529 nvlist_parse_json_error_t jerr;
530 530
531 531 if (asprintf(&path, "%s/%s", datadir, file) == -1) {
532 532 err(EXIT_FAILURE, "failed to construct path to data file %s",
533 533 file);
534 534 }
535 535
536 536 if ((fd = open(path, O_RDONLY)) < 0) {
537 537 err(EXIT_FAILURE, "failed to open data file %s", path);
538 538 }
539 539
540 540 if (fstat(fd, &st) != 0) {
541 541 err(EXIT_FAILURE, "failed to stat %s", path);
542 542 }
543 543
544 544 if ((map = mmap(NULL, st.st_size, PROT_READ | PROT_WRITE, MAP_PRIVATE,
545 545 fd, 0)) == MAP_FAILED) {
546 546 err(EXIT_FAILURE, "failed to mmap %s", path);
547 547 }
548 548
549 549 if (nvlist_parse_json(map, st.st_size, &nvl, NVJSON_FORCE_INTEGER,
550 550 &jerr) != 0) {
551 551 errx(EXIT_FAILURE, "failed to parse file %s at pos %ld: %s",
552 552 path, jerr.nje_pos, jerr.nje_message);
553 553 }
554 554
555 555 if (munmap(map, st.st_size) != 0) {
556 556 err(EXIT_FAILURE, "failed to munmap %s", path);
557 557 }
558 558
559 559 if (close(fd) != 0) {
560 560 err(EXIT_FAILURE, "failed to close data file %s", path);
561 561 }
562 562 free(path);
563 563
564 564 return (nvl);
565 565 }
566 566
567 567 /*
568 568 * Check the whitelist to see if we should use this model.
569 569 */
570 570 static const char *
571 571 cpcgen_use_arch(const char *path, cpc_type_t type, const char *platform)
572 572 {
573 573 const char *slash;
574 574 size_t len;
575 575 uint_t i;
576 576
577 577 if (*path != '/') {
578 578 errx(EXIT_FAILURE, "invalid path in mapfile: \"%s\": missing "
579 579 "leading '/'", path);
580 580 }
581 581 if ((slash = strchr(path + 1, '/')) == NULL) {
582 582 errx(EXIT_FAILURE, "invalid path in mapfile: \"%s\": missing "
583 583 "second '/'", path);
584 584 }
585 585 /* Account for the last '/' character. */
586 586 len = slash - path - 1;
587 587 assert(len > 0);
588 588
589 589 for (i = 0; cpcgen_intel_whitelist[i].cwhite_short != NULL; i++) {
590 590 if (platform != NULL && strcasecmp(platform,
591 591 cpcgen_intel_whitelist[i].cwhite_short) != 0)
592 592 continue;
593 593 if (strncmp(path + 1, cpcgen_intel_whitelist[i].cwhite_short,
594 594 len) == 0 &&
595 595 (cpcgen_intel_whitelist[i].cwhite_mask & type) == type) {
596 596 return (cpcgen_intel_whitelist[i].cwhite_human);
597 597 }
598 598 }
599 599
600 600 return (NULL);
601 601 }
602 602
603 603 /*
604 604 * Determine which CPU Vendor we're transmuting data from.
605 605 */
606 606 static void
607 607 cpcgen_determine_vendor(const char *datadir)
608 608 {
609 609 char *mappath;
610 610 struct stat st;
611 611
612 612 if (asprintf(&mappath, "%s/%s", datadir, cpcgen_intel_mapfile) == -1) {
613 613 err(EXIT_FAILURE, "failed to construct path to mapfile");
614 614 }
615 615
616 616 if (stat(mappath, &st) == 0) {
617 617 cpcgen_mode = CPCGEN_MODE_INTEL;
618 618 } else {
619 619 if (errno != ENOENT) {
620 620 err(EXIT_FAILURE, "stat(2) of %s failed unexpectedly");
621 621 }
622 622
623 623 cpcgen_mode = CPCGEN_MODE_AMD;
624 624 }
625 625
626 626 free(mappath);
627 627 }
628 628
629 629 /*
630 630 * Read in all the data files that exist for AMD.
631 631 *
632 632 * Our family names for AMD systems are based on the family and type so a given
633 633 * name will look like f17h_core.json.
634 634 */
635 635 static void
636 636 cpcgen_read_amd(const char *datadir, const char *platform)
637 637 {
638 638 DIR *dir;
639 639 struct dirent *d;
640 640 const char *suffix = ".json";
641 641 const size_t slen = strlen(suffix);
642 642
643 643 if ((dir = opendir(datadir)) == NULL) {
644 644 err(EXIT_FAILURE, "failed to open directory %s", datadir);
645 645 }
646 646
647 647 while ((d = readdir(dir)) != NULL) {
648 648 char *name, *c;
649 649 cpc_map_t *map;
650 650 nvlist_t *parsed;
651 651
652 652 if ((name = strdup(d->d_name)) == NULL) {
653 653 errx(EXIT_FAILURE, "ran out of memory duplicating "
654 654 "name %s", d->d_name);
655 655 }
656 656 c = strstr(name, suffix);
657 657
658 658 if (c == NULL) {
659 659 free(name);
660 660 continue;
661 661 }
662 662
663 663 if (*(c + slen) != '\0') {
664 664 free(name);
665 665 continue;
666 666 }
667 667
668 668 *c = '\0';
669 669 c = strchr(name, '_');
670 670 if (c == NULL) {
671 671 free(name);
672 672 continue;
673 673 }
674 674 *c = '\0';
675 675 c++;
676 676 if (strcmp(c, "core") != 0) {
677 677 errx(EXIT_FAILURE, "unexpected AMD JSON file name: %s",
678 678 d->d_name);
679 679 }
680 680
681 681 if (platform != NULL && strcmp(platform, name) != 0) {
682 682 free(name);
683 683 continue;
684 684 }
685 685
686 686 if ((map = calloc(1, sizeof (cpc_map_t))) == NULL) {
687 687 err(EXIT_FAILURE, "failed to allocate space for cpc "
688 688 "file");
689 689 }
690 690
691 691 parsed = cpcgen_read_datafile(datadir, d->d_name);
692 692 if ((map->cmap_path = strdup(d->d_name)) == NULL) {
693 693 err(EXIT_FAILURE, "failed to duplicate path string");
694 694 }
695 695 map->cmap_type = CPC_FILE_CORE;
696 696 map->cmap_data = parsed;
697 697 map->cmap_name = name;
698 698 map->cmap_procs = NULL;
699 699
700 700 map->cmap_next = cpcgen_maps;
701 701 cpcgen_maps = map;
702 702 }
703 703 }
704 704
705 705 /*
706 706 * Read in the mapfile.csv that is used to map between processor families and
707 707 * parse this. Each line has a comma separated value.
708 708 */
709 709 static void
710 710 cpcgen_read_intel(const char *datadir, const char *platform)
711 711 {
712 712 FILE *map;
713 713 char *mappath, *last;
714 714 char *data = NULL;
715 715 size_t datalen = 0;
716 716 uint_t lineno;
717 717
718 718 if (asprintf(&mappath, "%s/%s", datadir, cpcgen_intel_mapfile) == -1) {
719 719 err(EXIT_FAILURE, "failed to construct path to mapfile");
720 720 }
721 721
722 722 if ((map = fopen(mappath, "r")) == NULL) {
723 723 err(EXIT_FAILURE, "failed to open data mapfile %s", mappath);
724 724 }
725 725
726 726 lineno = 0;
727 727 while (getline(&data, &datalen, map) != -1) {
728 728 char *fstr, *path, *tstr;
729 729 const char *name;
730 730 uint_t family, model, nsteps;
731 731 uint_t steppings[CPROC_MAX_STEPPINGS];
732 732
733 733 cpc_type_t type;
734 734 cpc_map_t *map;
735 735 cpc_proc_t *proc;
736 736
737 737 /*
738 738 * The first line contains the header:
739 739 * Family-model,Version,Filename,EventType
740 740 */
741 741 lineno++;
742 742 if (lineno == 1) {
743 743 continue;
744 744 }
745 745
746 746 if ((fstr = strtok_r(data, ",", &last)) == NULL ||
747 747 strtok_r(NULL, ",", &last) == NULL ||
748 748 (path = strtok_r(NULL, ",", &last)) == NULL ||
749 749 (tstr = strtok_r(NULL, "\n", &last)) == NULL) {
750 750 errx(EXIT_FAILURE, "failed to parse mapfile line "
751 751 "%u in %s", lineno, mappath);
752 752 }
753 753
754 754 cpcgen_parse_model(fstr, &family, &model, &nsteps, steppings);
755 755
756 756 if (strcmp(tstr, "core") == 0) {
757 757 type = CPC_FILE_CORE;
758 758 } else if (strcmp(tstr, "offcore") == 0) {
759 759 type = CPC_FILE_OFF_CORE;
760 760 } else if (strcmp(tstr, "uncore") == 0) {
761 761 type = CPC_FILE_UNCORE;
762 762 } else if (strcmp(tstr, "fp_arith_inst") == 0) {
763 763 type = CPC_FILE_FP_MATH;
764 764 } else if (strcmp(tstr, "uncore experimental") == 0) {
765 765 type = CPC_FILE_UNCORE_EXP;
766 766 } else {
767 767 errx(EXIT_FAILURE, "unknown file type \"%s\" on line "
768 768 "%u", tstr, lineno);
769 769 }
770 770
771 771 if ((name = cpcgen_use_arch(path, type, platform)) == NULL)
772 772 continue;
773 773
774 774 if ((map = cpcgen_map_lookup(path)) == NULL) {
775 775 nvlist_t *parsed;
776 776
777 777 parsed = cpcgen_read_datafile(datadir, path);
778 778
779 779 if ((map = calloc(1, sizeof (cpc_map_t))) == NULL) {
780 780 err(EXIT_FAILURE, "failed to allocate space "
781 781 "for cpc file");
782 782 }
783 783
784 784 if ((map->cmap_path = strdup(path)) == NULL) {
785 785 err(EXIT_FAILURE, "failed to duplicate path "
786 786 "string");
787 787 }
788 788
789 789 map->cmap_type = type;
790 790 map->cmap_data = parsed;
791 791 map->cmap_name = name;
792 792 map->cmap_procs = NULL;
793 793
794 794 map->cmap_next = cpcgen_maps;
795 795 cpcgen_maps = map;
796 796 }
797 797
798 798 if ((proc = calloc(1, sizeof (cpc_proc_t))) == NULL) {
799 799 err(EXIT_FAILURE, "failed to allocate memory for "
800 800 "family and model tracking");
801 801 }
802 802
803 803 proc->cproc_family = family;
804 804 proc->cproc_model = model;
805 805 proc->cproc_nsteps = nsteps;
806 806 if (nsteps > 0) {
807 807 bcopy(steppings, proc->cproc_steppings,
808 808 sizeof (steppings));
809 809 }
810 810 proc->cproc_next = map->cmap_procs;
811 811 map->cmap_procs = proc;
812 812 }
813 813
814 814 if (errno != 0 || ferror(map)) {
815 815 err(EXIT_FAILURE, "failed to read %s", mappath);
816 816 }
817 817
818 818 if (fclose(map) == EOF) {
819 819 err(EXIT_FAILURE, "failed to close %s", mappath);
820 820 }
821 821 free(data);
822 822 free(mappath);
823 823 }
824 824
825 825 static char *
826 826 cpcgen_manual_intel_name(cpc_map_t *map)
827 827 {
828 828 char *name;
829 829
830 830 if (asprintf(&name, "%s_events.3cpc", map->cmap_name) == -1) {
831 831 warn("failed to assemble manual page name for %s",
832 832 map->cmap_path);
833 833 return (NULL);
834 834 }
835 835
836 836 return (name);
837 837 }
838 838
839 839 static boolean_t
840 840 cpcgen_manual_intel_file_before(FILE *f, cpc_map_t *map)
841 841 {
842 842 size_t i;
843 843 char *upper;
844 844 cpc_proc_t *proc;
845 845
846 846 if ((upper = strdup(map->cmap_name)) == NULL) {
847 847 warn("failed to duplicate manual name for %s", map->cmap_name);
848 848 return (B_FALSE);
849 849 }
850 850
851 851 for (i = 0; upper[i] != '\0'; i++) {
852 852 upper[i] = toupper(upper[i]);
853 853 }
854 854
855 855 if (fprintf(f, cpcgen_manual_intel_intel_header, map->cmap_path, upper,
856 856 map->cmap_name) == -1) {
857 857 warn("failed to write out manual header for %s",
858 858 map->cmap_name);
859 859 free(upper);
860 860 return (B_FALSE);
861 861 }
862 862 free(upper);
863 863
864 864 for (proc = map->cmap_procs; proc != NULL; proc = proc->cproc_next) {
865 865 if (proc->cproc_nsteps > 0) {
866 866 uint_t step;
867 867
868 868 for (step = 0; step < proc->cproc_nsteps; step++) {
869 869 if (fprintf(f, ".It\n.Sy Family 0x%x, Model "
870 870 "0x%x, Stepping 0x%x\n",
871 871 proc->cproc_family, proc->cproc_model,
872 872 proc->cproc_steppings[step]) == -1) {
873 873 warn("failed to write out model "
874 874 "information for %s",
875 875 map->cmap_name);
876 876 return (B_FALSE);
877 877 }
878 878 }
879 879 } else {
880 880 if (fprintf(f, ".It\n.Sy Family 0x%x, Model 0x%x\n",
881 881 proc->cproc_family, proc->cproc_model) == -1) {
882 882 warn("failed to write out model information "
883 883 "for %s", map->cmap_name);
884 884 return (B_FALSE);
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885 885 }
886 886 }
887 887 }
888 888
889 889 if (fprintf(f, cpcgen_manual_intel_data) == -1) {
890 890 warn("failed to write out manual header for %s",
891 891 map->cmap_name);
892 892 return (B_FALSE);
893 893 }
894 894
895 - free(upper);
896 895 return (B_TRUE);
897 896 }
898 897
899 898 static boolean_t
900 899 cpcgen_manual_intel_file_after(FILE *f, cpc_map_t *map)
901 900 {
902 901 if (fprintf(f, cpcgen_manual_intel_trailer) == -1) {
903 902 warn("failed to write out manual header for %s",
904 903 map->cmap_name);
905 904 return (B_FALSE);
906 905 }
907 906
908 907 return (B_TRUE);
909 908 }
910 909
911 910 static boolean_t
912 911 cpcgen_manual_intel_event(FILE *f, nvlist_t *nvl, const char *path,
913 912 uint32_t ent)
914 913 {
915 914 char *event, *lname, *brief = NULL, *public = NULL, *errata = NULL;
916 915 size_t i;
917 916
918 917 if (nvlist_lookup_string(nvl, "EventName", &event) != 0) {
919 918 warnx("Found event without 'EventName' property "
920 919 "in %s, entry %u", path, ent);
921 920 return (B_FALSE);
922 921 }
923 922
924 923 /*
925 924 * Intel uses capital names. CPC historically uses lower case names.
926 925 */
927 926 if ((lname = strdup(event)) == NULL) {
928 927 err(EXIT_FAILURE, "failed to duplicate event name %s", event);
929 928 }
930 929 for (i = 0; lname[i] != '\0'; i++) {
931 930 lname[i] = tolower(event[i]);
932 931 }
933 932
934 933 /*
935 934 * Try to get the other event fields, but if they're not there, don't
936 935 * worry about it.
937 936 */
938 937 (void) nvlist_lookup_string(nvl, "BriefDescription", &brief);
939 938 (void) nvlist_lookup_string(nvl, "PublicDescription", &public);
940 939 (void) nvlist_lookup_string(nvl, "Errata", &errata);
941 940 if (errata != NULL && (strcmp(errata, "0") == 0 ||
942 941 strcmp(errata, "null") == 0)) {
943 942 errata = NULL;
944 943 }
945 944
946 945 if (fprintf(f, ".It Sy %s\n", lname) == -1) {
947 946 warn("failed to write out event entry %s", event);
948 947 free(lname);
949 948 return (B_FALSE);
950 949 }
951 950
952 951 if (public != NULL) {
953 952 if (fprintf(f, "%s\n", public) == -1) {
954 953 warn("failed to write out event entry %s", event);
955 954 free(lname);
956 955 return (B_FALSE);
957 956 }
958 957 } else if (brief != NULL) {
959 958 if (fprintf(f, "%s\n", brief) == -1) {
960 959 warn("failed to write out event entry %s", event);
961 960 free(lname);
962 961 return (B_FALSE);
963 962 }
964 963 }
965 964
966 965 if (errata != NULL) {
967 966 if (fprintf(f, ".Pp\nThe following errata may apply to this: "
968 967 "%s\n", errata) == -1) {
969 968
970 969 warn("failed to write out event entry %s", event);
971 970 free(lname);
972 971 return (B_FALSE);
973 972 }
974 973 }
975 974
976 975 free(lname);
977 976 return (B_TRUE);
978 977 }
979 978
980 979 static char *
981 980 cpcgen_cfile_intel_name(cpc_map_t *map)
982 981 {
983 982 char *name;
984 983
985 984 if (asprintf(&name, "core_pcbe_%s.c", map->cmap_name) == -1) {
986 985 warn("failed to assemble file name for %s", map->cmap_path);
987 986 return (NULL);
988 987 }
989 988
990 989 return (name);
991 990 }
992 991
993 992 static boolean_t
994 993 cpcgen_cfile_intel_before(FILE *f, cpc_map_t *map)
995 994 {
996 995 if (fprintf(f, cpcgen_cfile_intel_header, map->cmap_path) == -1) {
997 996 warn("failed to write header to temporary file for %s",
998 997 map->cmap_path);
999 998 return (B_FALSE);
1000 999 }
1001 1000
1002 1001 if (fprintf(f, cpcgen_cfile_intel_table_start, map->cmap_name) == -1) {
1003 1002 warn("failed to write header to temporary file for %s",
1004 1003 map->cmap_path);
1005 1004 return (B_FALSE);
1006 1005 }
1007 1006
1008 1007 return (B_TRUE);
1009 1008 }
1010 1009
1011 1010 static boolean_t
1012 1011 cpcgen_cfile_intel_after(FILE *f, cpc_map_t *map)
1013 1012 {
1014 1013 if (fprintf(f, cpcgen_cfile_intel_table_end) == -1) {
1015 1014 warn("failed to write footer to temporary file for %s",
1016 1015 map->cmap_path);
1017 1016 return (B_FALSE);
1018 1017 }
1019 1018
1020 1019 return (B_TRUE);
1021 1020 }
1022 1021
1023 1022 static boolean_t
1024 1023 cpcgen_cfile_intel_event(FILE *f, nvlist_t *nvl, const char *path, uint_t ent)
1025 1024 {
1026 1025 char *ecode, *umask, *name, *counter, *lname, *cmask;
1027 1026 size_t i;
1028 1027
1029 1028 if (nvlist_lookup_string(nvl, "EventName", &name) != 0) {
1030 1029 warnx("Found event without 'EventName' property "
1031 1030 "in %s, entry %u", path, ent);
1032 1031 return (B_FALSE);
1033 1032 }
1034 1033
1035 1034 if (nvlist_lookup_string(nvl, "EventCode", &ecode) != 0 ||
1036 1035 nvlist_lookup_string(nvl, "UMask", &umask) != 0 ||
1037 1036 nvlist_lookup_string(nvl, "Counter", &counter) != 0) {
1038 1037 warnx("event %s (index %u) from %s, missing "
1039 1038 "required properties for C file translation",
1040 1039 name, ent, path);
1041 1040 return (B_FALSE);
1042 1041 }
1043 1042
1044 1043 /*
1045 1044 * While we could try and parse the counters manually, just do this the
1046 1045 * max power way for now based on all possible values.
1047 1046 */
1048 1047 if (strcmp(counter, "0") == 0 || strcmp(counter, "0,") == 0) {
1049 1048 cmask = "C0";
1050 1049 } else if (strcmp(counter, "1") == 0) {
1051 1050 cmask = "C1";
1052 1051 } else if (strcmp(counter, "2") == 0) {
1053 1052 cmask = "C2";
1054 1053 } else if (strcmp(counter, "3") == 0) {
1055 1054 cmask = "C3";
1056 1055 } else if (strcmp(counter, "0,1") == 0) {
1057 1056 cmask = "C0|C1";
1058 1057 } else if (strcmp(counter, "0,1,2") == 0) {
1059 1058 cmask = "C0|C1|C2";
1060 1059 } else if (strcmp(counter, "0,1,2,3") == 0) {
1061 1060 cmask = "C0|C1|C2|C3";
1062 1061 } else if (strcmp(counter, "0,2,3") == 0) {
1063 1062 cmask = "C0|C2|C3";
1064 1063 } else if (strcmp(counter, "1,2,3") == 0) {
1065 1064 cmask = "C1|C2|C3";
1066 1065 } else if (strcmp(counter, "2,3") == 0) {
1067 1066 cmask = "C2|C3";
1068 1067 } else {
1069 1068 warnx("event %s (index %u) from %s, has unknown "
1070 1069 "counter value \"%s\"", name, ent, path, counter);
1071 1070 return (B_FALSE);
1072 1071 }
1073 1072
1074 1073
1075 1074 /*
1076 1075 * Intel uses capital names. CPC historically uses lower case names.
1077 1076 */
1078 1077 if ((lname = strdup(name)) == NULL) {
1079 1078 err(EXIT_FAILURE, "failed to duplicate event name %s", name);
1080 1079 }
1081 1080 for (i = 0; lname[i] != '\0'; i++) {
1082 1081 lname[i] = tolower(name[i]);
1083 1082 }
1084 1083
1085 1084 if (fprintf(f, "\t{ %s, %s, %s, \"%s\" },\n", ecode, umask, cmask,
1086 1085 lname) == -1) {
1087 1086 warn("failed to write out entry %s from %s", name, path);
1088 1087 free(lname);
1089 1088 return (B_FALSE);
1090 1089 }
1091 1090
1092 1091 free(lname);
1093 1092
1094 1093 /*
1095 1094 * Check if we have any PAPI aliases.
1096 1095 */
1097 1096 for (i = 0; cpcgen_intel_papi_map[i].cpapi_intc != NULL; i++) {
1098 1097 if (strcmp(name, cpcgen_intel_papi_map[i].cpapi_intc) != 0)
1099 1098 continue;
1100 1099
1101 1100 if (fprintf(f, "\t{ %s, %s, %s, \"%s\" },\n", ecode, umask,
1102 1101 cmask, cpcgen_intel_papi_map[i].cpapi_papi) == -1) {
1103 1102 warn("failed to write out entry %s from %s", name,
1104 1103 path);
1105 1104 return (B_FALSE);
1106 1105 }
1107 1106 }
1108 1107
1109 1108 return (B_TRUE);
1110 1109 }
1111 1110
1112 1111 static boolean_t
1113 1112 cpcgen_generate_map(FILE *f, cpc_map_t *map, boolean_t start)
1114 1113 {
1115 1114 cpc_proc_t *p;
1116 1115
1117 1116 if (fprintf(f, "\t%sif (", start ? "" : "} else ") == -1) {
1118 1117 return (B_FALSE);
1119 1118 }
1120 1119
1121 1120 for (p = map->cmap_procs; p != NULL; p = p->cproc_next) {
1122 1121 /*
1123 1122 * Make sure the line is padded so the generated C code looks
1124 1123 * like reasonable C style.
1125 1124 */
1126 1125 if (p != map->cmap_procs) {
1127 1126 if (fputs("\t ", f) == -1) {
1128 1127 return (B_FALSE);
1129 1128 }
1130 1129 }
1131 1130
1132 1131 if (p->cproc_nsteps > 0) {
1133 1132 uint_t i;
1134 1133
1135 1134 if (fprintf(f, "(model == 0x%x &&\n\t (",
1136 1135 p->cproc_model) == -1) {
1137 1136 return (B_FALSE);
1138 1137 }
1139 1138
1140 1139 for (i = 0; i < p->cproc_nsteps; i++) {
1141 1140 if (fprintf(f, "stepping == 0x%x%s",
1142 1141 p->cproc_steppings[i],
1143 1142 i + 1 != p->cproc_nsteps ?
1144 1143 " ||\n\t " : "") == -1) {
1145 1144 return (B_FALSE);
1146 1145 }
1147 1146 }
1148 1147
1149 1148 if (fputs("))", f) == -1) {
1150 1149 return (B_FALSE);
1151 1150 }
1152 1151 } else if (fprintf(f, "model == 0x%x", p->cproc_model) == -1) {
1153 1152 return (B_FALSE);
1154 1153 }
1155 1154
1156 1155 if (fprintf(f, "%s\n",
1157 1156 p->cproc_next != NULL ? " ||" : ") {") == -1) {
1158 1157 return (B_FALSE);
1159 1158 }
1160 1159 }
1161 1160
1162 1161 if (fprintf(f, "\t\t\treturn (pcbe_core_events_%s);\n",
1163 1162 map->cmap_name) == -1) {
1164 1163 return (B_FALSE);
1165 1164 }
1166 1165
1167 1166 return (B_TRUE);
1168 1167 }
1169 1168
1170 1169 /*
1171 1170 * This is a wrapper around unlinkat that makes sure that we don't clobber
1172 1171 * errno, which is used for properly printing out error messages below.
1173 1172 */
1174 1173 static void
1175 1174 cpcgen_remove_tmpfile(int dirfd, const char *path)
1176 1175 {
1177 1176 int e = errno;
1178 1177 (void) unlinkat(dirfd, path, 0);
1179 1178 errno = e;
1180 1179 }
1181 1180
1182 1181 /*
1183 1182 * Generate a header file that declares all of these arrays and provide a map
1184 1183 * for models to the corresponding table to use.
1185 1184 */
1186 1185 static void
1187 1186 cpcgen_common_intel_files(int dirfd)
1188 1187 {
1189 1188 const char *fname = "core_pcbe_cpcgen.h";
1190 1189 char *tmpname;
1191 1190 int fd;
1192 1191 FILE *f;
1193 1192 cpc_map_t *map;
1194 1193
1195 1194 if (asprintf(&tmpname, ".%s.%d", fname, getpid()) == -1) {
1196 1195 err(EXIT_FAILURE, "failed to construct temporary file name");
1197 1196 }
1198 1197
1199 1198 if ((fd = openat(dirfd, tmpname, O_RDWR | O_CREAT, 0644)) < 0) {
1200 1199 err(EXIT_FAILURE, "failed to create temporary file %s",
1201 1200 tmpname);
1202 1201 }
1203 1202
1204 1203 if ((f = fdopen(fd, "w")) == NULL) {
1205 1204 cpcgen_remove_tmpfile(dirfd, tmpname);
1206 1205 err(EXIT_FAILURE, "failed to fdopen temporary file");
1207 1206 }
1208 1207
1209 1208 if (fprintf(f, cpcgen_cfile_intel_header, cpcgen_intel_mapfile) == -1) {
1210 1209 cpcgen_remove_tmpfile(dirfd, tmpname);
1211 1210 errx(EXIT_FAILURE, "failed to write header to temporary file "
1212 1211 "for %s", fname);
1213 1212 }
1214 1213
1215 1214 if (fprintf(f, "#ifndef _CORE_PCBE_CPCGEN_H\n"
1216 1215 "#define\t_CORE_PCBE_CPCGEN_H\n"
1217 1216 "\n"
1218 1217 "#ifdef __cplusplus\n"
1219 1218 "extern \"C\" {\n"
1220 1219 "#endif\n"
1221 1220 "\n"
1222 1221 "extern const struct events_table_t *core_cpcgen_table(uint_t, "
1223 1222 "uint_t);\n"
1224 1223 "\n") == -1) {
1225 1224 cpcgen_remove_tmpfile(dirfd, tmpname);
1226 1225 errx(EXIT_FAILURE, "failed to write header to "
1227 1226 "temporary file for %s", fname);
1228 1227 }
1229 1228
1230 1229 for (map = cpcgen_maps; map != NULL; map = map->cmap_next) {
1231 1230 if (fprintf(f, "extern const struct events_table_t "
1232 1231 "pcbe_core_events_%s[];\n", map->cmap_name) == -1) {
1233 1232 cpcgen_remove_tmpfile(dirfd, tmpname);
1234 1233 errx(EXIT_FAILURE, "failed to write entry to "
1235 1234 "temporary file for %s", fname);
1236 1235 }
1237 1236 }
1238 1237
1239 1238 if (fprintf(f, "\n"
1240 1239 "#ifdef __cplusplus\n"
1241 1240 "}\n"
1242 1241 "#endif\n"
1243 1242 "\n"
1244 1243 "#endif /* _CORE_PCBE_CPCGEN_H */\n") == -1) {
1245 1244 cpcgen_remove_tmpfile(dirfd, tmpname);
1246 1245 errx(EXIT_FAILURE, "failed to write header to "
1247 1246 "temporary file for %s", fname);
1248 1247 }
1249 1248
1250 1249 if (fflush(f) != 0 || fclose(f) != 0) {
1251 1250 cpcgen_remove_tmpfile(dirfd, tmpname);
1252 1251 err(EXIT_FAILURE, "failed to flush and close temporary file");
1253 1252 }
1254 1253
1255 1254 if (renameat(dirfd, tmpname, dirfd, fname) != 0) {
1256 1255 err(EXIT_FAILURE, "failed to rename temporary file %s",
1257 1256 tmpname);
1258 1257 }
1259 1258
1260 1259 free(tmpname);
1261 1260
1262 1261 /* Now again for the .c file. */
1263 1262 fname = "core_pcbe_cpcgen.c";
1264 1263 if (asprintf(&tmpname, ".%s.%d", fname, getpid()) == -1) {
1265 1264 err(EXIT_FAILURE, "failed to construct temporary file name");
1266 1265 }
1267 1266
1268 1267 if ((fd = openat(dirfd, tmpname, O_RDWR | O_CREAT, 0644)) < 0) {
1269 1268 err(EXIT_FAILURE, "failed to create temporary file %s",
1270 1269 tmpname);
1271 1270 }
1272 1271
1273 1272 if ((f = fdopen(fd, "w")) == NULL) {
1274 1273 cpcgen_remove_tmpfile(dirfd, tmpname);
1275 1274 err(EXIT_FAILURE, "failed to fdopen temporary file");
1276 1275 }
1277 1276
1278 1277 if (fprintf(f, cpcgen_cfile_intel_header, cpcgen_intel_mapfile) == -1) {
1279 1278 cpcgen_remove_tmpfile(dirfd, tmpname);
1280 1279 errx(EXIT_FAILURE, "failed to write header to temporary file "
1281 1280 "for %s", fname);
1282 1281 }
1283 1282
1284 1283 if (fprintf(f, "#include <core_pcbe_table.h>\n"
1285 1284 "#include <sys/null.h>\n"
1286 1285 "#include \"core_pcbe_cpcgen.h\"\n"
1287 1286 "\n"
1288 1287 "const struct events_table_t *\n"
1289 1288 "core_cpcgen_table(uint_t model, uint_t stepping)\n"
1290 1289 "{\n") == -1) {
1291 1290 cpcgen_remove_tmpfile(dirfd, tmpname);
1292 1291 errx(EXIT_FAILURE, "failed to write header to "
1293 1292 "temporary file for %s", fname);
1294 1293 }
1295 1294
1296 1295 for (map = cpcgen_maps; map != NULL; map = map->cmap_next) {
1297 1296 if (!cpcgen_generate_map(f, map, map == cpcgen_maps)) {
1298 1297 cpcgen_remove_tmpfile(dirfd, tmpname);
1299 1298 errx(EXIT_FAILURE, "failed to write to temporary "
1300 1299 "file for %s", fname);
1301 1300 }
1302 1301 }
1303 1302
1304 1303 if (fprintf(f, "\t} else {\n"
1305 1304 "\t\t\treturn (NULL);\n"
1306 1305 "\t}\n"
1307 1306 "}\n") == -1) {
1308 1307 cpcgen_remove_tmpfile(dirfd, tmpname);
1309 1308 errx(EXIT_FAILURE, "failed to write header to "
1310 1309 "temporary file for %s", fname);
1311 1310 }
1312 1311
1313 1312 if (fflush(f) != 0 || fclose(f) != 0) {
1314 1313 cpcgen_remove_tmpfile(dirfd, tmpname);
1315 1314 err(EXIT_FAILURE, "failed to flush and close temporary file");
1316 1315 }
1317 1316
1318 1317 if (renameat(dirfd, tmpname, dirfd, fname) != 0) {
1319 1318 err(EXIT_FAILURE, "failed to rename temporary file %s",
1320 1319 tmpname);
1321 1320 }
1322 1321
1323 1322 free(tmpname);
1324 1323 }
1325 1324
1326 1325 /*
1327 1326 * Look at a rule to determine whether or not we should consider including it or
1328 1327 * not. At this point we've already filtered things such that we only get core
1329 1328 * events.
1330 1329 *
1331 1330 * To consider an entry, we currently apply the following criteria:
1332 1331 *
1333 1332 * - The MSRIndex and MSRValue are zero. Programming additional MSRs is no
1334 1333 * supported right now.
1335 1334 * - TakenAlone is non-zero, which means that it cannot run at the same time as
1336 1335 * another field.
1337 1336 * - Offcore is one, indicating that it is off the core and we need to figure
1338 1337 * out if we can support this.
1339 1338 * - If the counter is fixed, don't use it for now.
1340 1339 * - If more than one value is specified in the EventCode or UMask values
1341 1340 */
1342 1341 static boolean_t
1343 1342 cpcgen_skip_intel_entry(nvlist_t *nvl, const char *path, uint_t ent)
1344 1343 {
1345 1344 char *event, *msridx, *msrval, *taken, *offcore, *counter;
1346 1345 char *ecode, *umask;
1347 1346
1348 1347 /*
1349 1348 * Require EventName, it's kind of useless without that.
1350 1349 */
1351 1350 if (nvlist_lookup_string(nvl, "EventName", &event) != 0) {
1352 1351 errx(EXIT_FAILURE, "Found event without 'EventName' property "
1353 1352 "in %s, entry %u", path, ent);
1354 1353 }
1355 1354
1356 1355 /*
1357 1356 * If we can't find an expected value, whine about it.
1358 1357 */
1359 1358 if (nvlist_lookup_string(nvl, "MSRIndex", &msridx) != 0 ||
1360 1359 nvlist_lookup_string(nvl, "MSRValue", &msrval) != 0 ||
1361 1360 nvlist_lookup_string(nvl, "Counter", &counter) != 0 ||
1362 1361 nvlist_lookup_string(nvl, "EventCode", &ecode) != 0 ||
1363 1362 nvlist_lookup_string(nvl, "UMask", &umask) != 0 ||
1364 1363 nvlist_lookup_string(nvl, "Offcore", &offcore) != 0) {
1365 1364 warnx("Skipping event %s (index %u) from %s, missing required "
1366 1365 "property", event, ent, path);
1367 1366 return (B_TRUE);
1368 1367 }
1369 1368
1370 1369 /*
1371 1370 * MSRIndex and MSRvalue comes as either "0" or "0x00".
1372 1371 */
1373 1372 if ((strcmp(msridx, "0") != 0 && strcmp(msridx, "0x00") != 0) ||
1374 1373 (strcmp(msrval, "0") != 0 && strcmp(msridx, "0x00") != 0) ||
1375 1374 strcmp(offcore, "0") != 0 || strchr(ecode, ',') != NULL ||
1376 1375 strchr(umask, ',') != NULL) {
1377 1376 return (B_TRUE);
1378 1377 }
1379 1378
1380 1379 /*
1381 1380 * Unfortunately, not everything actually has "TakenAlone". If it
1382 1381 * doesn't, we assume that it doesn't have to be.
1383 1382 */
1384 1383 if (nvlist_lookup_string(nvl, "TakenAlone", &taken) == 0 &&
1385 1384 strcmp(taken, "0") != 0) {
1386 1385 return (B_TRUE);
1387 1386 }
1388 1387
1389 1388
1390 1389 if (strncasecmp(counter, "fixed", strlen("fixed")) == 0)
1391 1390 return (B_TRUE);
1392 1391
1393 1392 return (B_FALSE);
1394 1393 }
1395 1394 static char *
1396 1395 cpcgen_manual_amd_name(cpc_map_t *map)
1397 1396 {
1398 1397 char *name;
1399 1398
1400 1399 if (asprintf(&name, "amd_%s_events.3cpc", map->cmap_name) == -1) {
1401 1400 warn("failed to assemble file name for %s", map->cmap_path);
1402 1401 return (NULL);
1403 1402 }
1404 1403
1405 1404 return (name);
1406 1405 }
1407 1406
1408 1407 static boolean_t
1409 1408 cpcgen_manual_amd_file_before(FILE *f, cpc_map_t *map)
1410 1409 {
1411 1410 size_t i;
1412 1411 char *upper;
1413 1412 const char *family;
1414 1413
1415 1414 if ((upper = strdup(map->cmap_name)) == NULL) {
1416 1415 warn("failed to duplicate manual name for %s", map->cmap_name);
1417 1416 return (B_FALSE);
1418 1417 }
1419 1418
1420 1419 for (i = 0; upper[i] != '\0'; i++) {
1421 1420 upper[i] = toupper(upper[i]);
1422 1421 }
1423 1422
1424 1423 family = map->cmap_name + 1;
1425 1424
1426 1425 if (fprintf(f, cpcgen_manual_amd_header, map->cmap_path, upper,
1427 1426 family, family, family) == -1) {
1428 1427 warn("failed to write out manual header for %s",
1429 1428 map->cmap_name);
1430 1429 free(upper);
1431 1430 return (B_FALSE);
1432 1431 }
1433 1432
1434 1433 free(upper);
1435 1434 return (B_TRUE);
1436 1435 }
1437 1436
1438 1437 static boolean_t
1439 1438 cpcgen_manual_amd_file_after(FILE *f, cpc_map_t *map)
1440 1439 {
1441 1440 if (fprintf(f, cpcgen_manual_amd_trailer) == -1) {
1442 1441 warn("failed to write out manual header for %s",
1443 1442 map->cmap_name);
1444 1443 return (B_FALSE);
1445 1444 }
1446 1445
1447 1446 return (B_TRUE);
1448 1447 }
1449 1448
1450 1449 static boolean_t
1451 1450 cpcgen_manual_amd_event(FILE *f, nvlist_t *nvl, const char *path, uint32_t ent)
1452 1451 {
1453 1452 char *name, *mnemonic = NULL, *summary = NULL, *desc = NULL;
1454 1453 char *umode;
1455 1454 nvlist_t *units = NULL;
1456 1455 uint32_t i, length;
1457 1456
1458 1457 if (nvlist_lookup_string(nvl, "name", &name) != 0) {
1459 1458 warnx("Found event without 'name' property in %s, entry %u",
1460 1459 path, ent);
1461 1460 return (B_FALSE);
1462 1461 }
1463 1462
1464 1463 if (nvlist_lookup_string(nvl, "mnemonic", &mnemonic) != 0 ||
1465 1464 nvlist_lookup_string(nvl, "summary", &summary) != 0) {
1466 1465 warnx("event %s in %s, entry %u, missing required fields",
1467 1466 name, path, ent);
1468 1467 return (B_FALSE);
1469 1468 }
1470 1469
1471 1470 /*
1472 1471 * Allow the other fields to be missing.
1473 1472 */
1474 1473 (void) nvlist_lookup_string(nvl, "description", &desc);
1475 1474 (void) nvlist_lookup_nvlist(nvl, "units", &units);
1476 1475
1477 1476 if (fprintf(f, ".It Sy %s\n", name) == -1) {
1478 1477 warn("failed to write out event entry %s", name);
1479 1478 }
1480 1479
1481 1480 if (fprintf(f, ".Sy %s -\n"
1482 1481 "%s\n", mnemonic, summary) == -1) {
1483 1482 warn("failed to write out event entry %s", name);
1484 1483 return (B_FALSE);
1485 1484 }
1486 1485
1487 1486 if (desc != NULL) {
1488 1487 if (fprintf(f, ".Pp\n%s\n", desc) == -1) {
1489 1488 warn("failed to write out event entry %s", name);
1490 1489 return (B_FALSE);
1491 1490 }
1492 1491 }
1493 1492
1494 1493 if (units == NULL)
1495 1494 return (B_TRUE);
1496 1495
1497 1496 /*
1498 1497 * Skip units we don't know how to handle.
1499 1498 */
1500 1499 if (nvlist_lookup_string(nvl, "unit_mode", &umode) == 0) {
1501 1500 return (B_TRUE);
1502 1501 }
1503 1502
1504 1503 if (fprintf(f, ".Pp\n"
1505 1504 "This event has the following units which may be used\n"
1506 1505 "to modify the behavior of the event:\n"
1507 1506 ".Bl -tag -width Sy\n") == -1) {
1508 1507 warn("failed to write out event entry %s", name);
1509 1508 return (B_FALSE);
1510 1509 }
1511 1510
1512 1511 if (nvlist_lookup_uint32(units, "length", &length) != 0) {
1513 1512 warnx("found units array, but could not look up length "
1514 1513 "property for events %s (index %u) in file %s",
1515 1514 name, ent, path);
1516 1515 return (B_FALSE);
1517 1516 }
1518 1517
1519 1518 for (i = 0; i < length; i++) {
1520 1519 nvlist_t *uvl;
1521 1520 char num[64];
1522 1521 char *uname, *udesc = NULL;
1523 1522
1524 1523 (void) snprintf(num, sizeof (num), "%u", i);
1525 1524 if (nvlist_lookup_nvlist(units, num, &uvl) != 0) {
1526 1525 warnx("failed to look up unit %u for event %s (index "
1527 1526 "%u) in file %s", i, name, ent, path);
1528 1527 return (B_FALSE);
1529 1528 }
1530 1529
1531 1530 if (nvlist_lookup_string(uvl, "name", &uname) != 0) {
1532 1531 warnx("failed to find required members for unit array "
1533 1532 "entry %u of event %s (index %u) from file %s",
1534 1533 i, name, ent, path);
1535 1534 return (B_FALSE);
1536 1535 }
1537 1536 (void) nvlist_lookup_string(uvl, "description", &udesc);
1538 1537 if (fprintf(f, ".It Sy %s\n", uname) == -1) {
1539 1538 warn("failed to write out event entry %s", name);
1540 1539 return (B_FALSE);
1541 1540 }
1542 1541
1543 1542 if (udesc != NULL) {
1544 1543 if (fprintf(f, "%s\n", udesc) == -1) {
1545 1544 warn("failed to write out event entry %s",
1546 1545 name);
1547 1546 return (B_FALSE);
1548 1547 }
1549 1548 }
1550 1549 }
1551 1550
1552 1551 if (fprintf(f, ".El\n") == -1) {
1553 1552 warn("failed to write out event entry %s",
1554 1553 name);
1555 1554 return (B_FALSE);
1556 1555 }
1557 1556
1558 1557 return (B_TRUE);
1559 1558 }
1560 1559
1561 1560 static char *
1562 1561 cpcgen_cfile_amd_name(cpc_map_t *map)
1563 1562 {
1564 1563 char *name;
1565 1564
1566 1565 if (asprintf(&name, "opteron_pcbe_%s.c", map->cmap_name) == -1) {
1567 1566 warn("failed to assemble file name for %s", map->cmap_path);
1568 1567 return (NULL);
1569 1568 }
1570 1569
1571 1570 return (name);
1572 1571 }
1573 1572
1574 1573 /*
1575 1574 * Generate a header file that can be used to synthesize the data events we care
1576 1575 * about.
1577 1576 */
1578 1577 static void
1579 1578 cpcgen_common_amd_files(int dirfd)
1580 1579 {
1581 1580 const char *fname = "opteron_pcbe_cpcgen.h";
1582 1581 char *tmpname;
1583 1582 int fd;
1584 1583 FILE *f;
1585 1584 cpc_map_t *map;
1586 1585
1587 1586 if (asprintf(&tmpname, ".%s.%d", fname, getpid()) == -1) {
1588 1587 err(EXIT_FAILURE, "failed to construct temporary file name");
1589 1588 }
1590 1589
1591 1590 if ((fd = openat(dirfd, tmpname, O_RDWR | O_CREAT, 0644)) < 0) {
1592 1591 err(EXIT_FAILURE, "failed to create temporary file %s",
1593 1592 tmpname);
1594 1593 }
1595 1594
1596 1595 if ((f = fdopen(fd, "w")) == NULL) {
1597 1596 cpcgen_remove_tmpfile(dirfd, tmpname);
1598 1597 err(EXIT_FAILURE, "failed to fdopen temporary file");
1599 1598 }
1600 1599
1601 1600 if (fprintf(f, cpcgen_cfile_cddl_header) == -1) {
1602 1601 cpcgen_remove_tmpfile(dirfd, tmpname);
1603 1602 err(EXIT_FAILURE, "failed to write header to "
1604 1603 "temporary file for %s", fname);
1605 1604 }
1606 1605
1607 1606 if (fprintf(f, "#ifndef _OPTERON_PCBE_CPCGEN_H\n"
1608 1607 "#define\t_OPTERON_PCBE_CPCGEN_H\n"
1609 1608 "\n"
1610 1609 "#ifdef __cplusplus\n"
1611 1610 "extern \"C\" {\n"
1612 1611 "#endif\n"
1613 1612 "\n") == -1) {
1614 1613 cpcgen_remove_tmpfile(dirfd, tmpname);
1615 1614 err(EXIT_FAILURE, "failed to write header to "
1616 1615 "temporary file for %s", fname);
1617 1616 }
1618 1617
1619 1618 for (map = cpcgen_maps; map != NULL; map = map->cmap_next) {
1620 1619 if (fprintf(f, "extern const amd_event_t "
1621 1620 "opteron_pcbe_%s_events[];\n", map->cmap_name) == -1) {
1622 1621 cpcgen_remove_tmpfile(dirfd, tmpname);
1623 1622 err(EXIT_FAILURE, "failed to write header to "
1624 1623 "temporary file for %s", fname);
1625 1624 }
1626 1625 }
1627 1626
1628 1627 if (fprintf(f, "\n"
1629 1628 "#ifdef __cplusplus\n"
1630 1629 "}\n"
1631 1630 "#endif\n"
1632 1631 "\n"
1633 1632 "#endif /* _OPTERON_PCBE_CPCGEN_H */\n") == -1) {
1634 1633 cpcgen_remove_tmpfile(dirfd, tmpname);
1635 1634 err(EXIT_FAILURE, "failed to write header to "
1636 1635 "temporary file for %s", fname);
1637 1636 }
1638 1637
1639 1638
1640 1639
1641 1640 if (fflush(f) != 0 || fclose(f) != 0) {
1642 1641 cpcgen_remove_tmpfile(dirfd, tmpname);
1643 1642 err(EXIT_FAILURE, "failed to flush and close temporary file");
1644 1643 }
1645 1644
1646 1645 if (renameat(dirfd, tmpname, dirfd, fname) != 0) {
1647 1646 err(EXIT_FAILURE, "failed to rename temporary file %s",
1648 1647 tmpname);
1649 1648 }
1650 1649
1651 1650 free(tmpname);
1652 1651 }
1653 1652
1654 1653 static boolean_t
1655 1654 cpcgen_cfile_amd_before(FILE *f, cpc_map_t *map)
1656 1655 {
1657 1656 if (fprintf(f, cpcgen_cfile_amd_header, map->cmap_name) == -1) {
1658 1657 warn("failed to write header to temporary file for %s",
1659 1658 map->cmap_path);
1660 1659 return (B_FALSE);
1661 1660 }
1662 1661
1663 1662 if (fprintf(f, cpcgen_cfile_amd_table_start, map->cmap_name) == -1) {
1664 1663 warn("failed to write header to temporary file for %s",
1665 1664 map->cmap_path);
1666 1665 return (B_FALSE);
1667 1666 }
1668 1667
1669 1668
1670 1669 return (B_TRUE);
1671 1670 }
1672 1671
1673 1672 static boolean_t
1674 1673 cpcgen_cfile_amd_after(FILE *f, cpc_map_t *map)
1675 1674 {
1676 1675 if (fprintf(f, cpcgen_cfile_amd_table_end) == -1) {
1677 1676 warn("failed to write footer to temporary file for %s",
1678 1677 map->cmap_path);
1679 1678 return (B_FALSE);
1680 1679 }
1681 1680
1682 1681 return (B_TRUE);
1683 1682 }
1684 1683
1685 1684 static boolean_t
1686 1685 cpcgen_cfile_amd_event(FILE *f, nvlist_t *nvl, const char *path, uint_t ent)
1687 1686 {
1688 1687 char *name, *code, *umode;
1689 1688 uint32_t i, length;
1690 1689 nvlist_t *units;
1691 1690
1692 1691 if (nvlist_lookup_string(nvl, "name", &name) != 0) {
1693 1692 warnx("Found event without 'name' property in %s, entry %u",
1694 1693 path, ent);
1695 1694 return (B_FALSE);
1696 1695 }
1697 1696
1698 1697 if (nvlist_lookup_string(nvl, "code", &code) != 0) {
1699 1698 warnx("event %s (index %u) from %s missing required properties "
1700 1699 "for C translation", name, path, ent);
1701 1700 return (B_FALSE);
1702 1701 }
1703 1702
1704 1703 if (fprintf(f, "\t{ \"%s\", %s, 0 },\n", name, code) == -1) {
1705 1704 warn("failed to write out entry %s from %s", name, path);
1706 1705 return (B_FALSE);
1707 1706 }
1708 1707
1709 1708 /*
1710 1709 * The 'units' array is optional. If the rule has a specific 'unit_mode'
1711 1710 * indicating how the units should be combined, skip that. We don't know
1712 1711 * how to properly process that right now.
1713 1712 */
1714 1713 if (nvlist_lookup_nvlist(nvl, "units", &units) != 0) {
1715 1714 return (B_TRUE);
1716 1715 }
1717 1716
1718 1717 if (nvlist_lookup_string(nvl, "unit_mode", &umode) == 0) {
1719 1718 return (B_TRUE);
1720 1719 }
1721 1720
1722 1721 if (nvlist_lookup_uint32(units, "length", &length) != 0) {
1723 1722 warnx("found units array, but could not look up length "
1724 1723 "property for events %s (index %u) in file %s",
1725 1724 name, ent, path);
1726 1725 return (B_FALSE);
1727 1726 }
1728 1727
1729 1728 for (i = 0; i < length; i++) {
1730 1729 nvlist_t *uvl;
1731 1730 char num[64];
1732 1731 char *uname, *urw;
1733 1732 int32_t bit;
1734 1733
1735 1734 (void) snprintf(num, sizeof (num), "%u", i);
1736 1735 if (nvlist_lookup_nvlist(units, num, &uvl) != 0) {
1737 1736 warnx("failed to look up unit %u for event %s (index "
1738 1737 "%u) in file %s", i, name, ent, path);
1739 1738 return (B_FALSE);
1740 1739 }
1741 1740
1742 1741 if (nvlist_lookup_string(uvl, "name", &uname) != 0 ||
1743 1742 nvlist_lookup_string(uvl, "rw", &urw) != 0 ||
1744 1743 nvlist_lookup_int32(uvl, "bit", &bit) != 0) {
1745 1744 warnx("failed to find required members for unit array "
1746 1745 "entry %u of event %s (index %u) from file %s",
1747 1746 i, name, ent, path);
1748 1747 dump_nvlist(uvl, 0);
1749 1748 return (B_FALSE);
1750 1749 }
1751 1750
1752 1751 if (bit < 0 || bit > 31) {
1753 1752 warnx("event %s (index %u) from file %s has invalid "
1754 1753 "bit value: %d; skipping", name, ent, path, bit);
1755 1754 continue;
1756 1755 }
1757 1756
1758 1757 if (strcasecmp(urw, "Read-write") != 0)
1759 1758 continue;
1760 1759
1761 1760 if (fprintf(f, "\t{ \"%s.%s\", %s, 0x%x },\n", name, uname,
1762 1761 code, 1U << bit) == -1) {
1763 1762 warn("failed to write out entry %s from %s", name,
1764 1763 path);
1765 1764 return (B_FALSE);
1766 1765 }
1767 1766 }
1768 1767
1769 1768 return (B_TRUE);
1770 1769 }
1771 1770
1772 1771 /*
1773 1772 * For each processor family, generate a data file that contains all of the
1774 1773 * events that we support. Also generate a header that can be included that
1775 1774 * declares all of the tables.
1776 1775 */
1777 1776 static void
1778 1777 cpcgen_gen(int dirfd)
1779 1778 {
1780 1779 cpc_map_t *map = cpcgen_maps;
1781 1780
1782 1781 if (map == NULL) {
1783 1782 errx(EXIT_FAILURE, "no platforms found or matched");
1784 1783 }
1785 1784
1786 1785 for (map = cpcgen_maps; map != NULL; map = map->cmap_next) {
1787 1786 int fd, ret;
1788 1787 FILE *f;
1789 1788 char *tmpname, *name;
1790 1789 uint32_t length, i;
1791 1790
1792 1791 if ((name = cpcgen_ops.cgen_op_name(map)) == NULL) {
1793 1792 exit(EXIT_FAILURE);
1794 1793 }
1795 1794
1796 1795 if (asprintf(&tmpname, ".%s.%d", name, getpid()) == -1) {
1797 1796 err(EXIT_FAILURE, "failed to construct temporary file "
1798 1797 "name");
1799 1798 }
1800 1799
1801 1800 if ((fd = openat(dirfd, tmpname, O_RDWR | O_CREAT, 0444)) < 0) {
1802 1801 err(EXIT_FAILURE, "failed to create temporary file %s",
1803 1802 tmpname);
1804 1803 }
1805 1804
1806 1805 if ((f = fdopen(fd, "w")) == NULL) {
1807 1806 cpcgen_remove_tmpfile(dirfd, tmpname);
1808 1807 err(EXIT_FAILURE, "failed to fdopen temporary file");
1809 1808 }
1810 1809
1811 1810 if (!cpcgen_ops.cgen_op_file_before(f, map)) {
1812 1811 cpcgen_remove_tmpfile(dirfd, tmpname);
1813 1812 exit(EXIT_FAILURE);
1814 1813 }
1815 1814
1816 1815 /*
1817 1816 * Iterate over array contents.
1818 1817 */
1819 1818 if ((ret = nvlist_lookup_uint32(map->cmap_data, "length",
1820 1819 &length)) != 0) {
1821 1820 errx(EXIT_FAILURE, "failed to look up length property "
1822 1821 "in parsed data for %s: %s", map->cmap_path,
1823 1822 strerror(ret));
1824 1823 }
1825 1824
1826 1825 for (i = 0; i < length; i++) {
1827 1826 nvlist_t *nvl;
1828 1827 char num[64];
1829 1828
1830 1829 (void) snprintf(num, sizeof (num), "%u", i);
1831 1830 if ((ret = nvlist_lookup_nvlist(map->cmap_data,
1832 1831 num, &nvl)) != 0) {
1833 1832 cpcgen_remove_tmpfile(dirfd, tmpname);
1834 1833 errx(EXIT_FAILURE, "failed to look up array "
1835 1834 "entry %u in parsed data for %s: %s", i,
1836 1835 map->cmap_path, strerror(ret));
1837 1836 }
1838 1837
1839 1838 if (cpcgen_ops.cgen_op_skip != NULL &&
1840 1839 cpcgen_ops.cgen_op_skip(nvl, map->cmap_path, i)) {
1841 1840 continue;
1842 1841 }
1843 1842
1844 1843 if (!cpcgen_ops.cgen_op_event(f, nvl, map->cmap_path,
1845 1844 i)) {
1846 1845 cpcgen_remove_tmpfile(dirfd, tmpname);
1847 1846 exit(EXIT_FAILURE);
1848 1847 }
1849 1848 }
1850 1849
1851 1850 if (!cpcgen_ops.cgen_op_file_after(f, map)) {
1852 1851 cpcgen_remove_tmpfile(dirfd, tmpname);
1853 1852 exit(EXIT_FAILURE);
1854 1853 }
1855 1854
1856 1855 if (fflush(f) != 0 || fclose(f) != 0) {
1857 1856 cpcgen_remove_tmpfile(dirfd, tmpname);
1858 1857 err(EXIT_FAILURE, "failed to flush and close "
1859 1858 "temporary file");
1860 1859 }
1861 1860
1862 1861 if (renameat(dirfd, tmpname, dirfd, name) != 0) {
1863 1862 err(EXIT_FAILURE, "failed to rename temporary file %s",
1864 1863 tmpname);
1865 1864 }
1866 1865
1867 1866 free(name);
1868 1867 free(tmpname);
1869 1868 }
1870 1869 }
1871 1870
1872 1871 static void
1873 1872 cpcgen_usage(const char *fmt, ...)
1874 1873 {
1875 1874 if (fmt != NULL) {
1876 1875 va_list ap;
1877 1876
1878 1877 (void) fprintf(stderr, "%s: ", cpcgen_progname);
1879 1878 va_start(ap, fmt);
1880 1879 (void) vfprintf(stderr, fmt, ap);
1881 1880 va_end(ap);
1882 1881 }
1883 1882
1884 1883 (void) fprintf(stderr, "Usage: %s -a|-p platform -c|-H|-m -d datadir "
1885 1884 "-o outdir\n"
1886 1885 "\n"
1887 1886 "\t-a generate data for all platforms\n"
1888 1887 "\t-c generate C file for CPC\n"
1889 1888 "\t-d specify the directory containt perfmon data\n"
1890 1889 "\t-H generate header file and common files\n"
1891 1890 "\t-m generate manual pages for CPC data\n"
1892 1891 "\t-o output files in directory outdir\n"
1893 1892 "\t-p generate data for a specified platform\n",
1894 1893 cpcgen_progname);
1895 1894 }
1896 1895
1897 1896 int
1898 1897 main(int argc, char *argv[])
1899 1898 {
1900 1899 int c, outdirfd;
1901 1900 boolean_t do_mpage = B_FALSE, do_cfile = B_FALSE, do_header = B_FALSE,
1902 1901 do_all = B_FALSE;
1903 1902 const char *datadir = NULL, *outdir = NULL, *platform = NULL;
1904 1903 uint_t count = 0;
1905 1904
1906 1905 cpcgen_progname = basename(argv[0]);
1907 1906
1908 1907 while ((c = getopt(argc, argv, ":acd:hHmo:p:")) != -1) {
1909 1908 switch (c) {
1910 1909 case 'a':
1911 1910 do_all = B_TRUE;
1912 1911 break;
1913 1912 case 'c':
1914 1913 do_cfile = B_TRUE;
1915 1914 break;
1916 1915 case 'd':
1917 1916 datadir = optarg;
1918 1917 break;
1919 1918 case 'm':
1920 1919 do_mpage = B_TRUE;
1921 1920 break;
1922 1921 case 'H':
1923 1922 do_header = B_TRUE;
1924 1923 break;
1925 1924 case 'o':
1926 1925 outdir = optarg;
1927 1926 break;
1928 1927 case 'p':
1929 1928 platform = optarg;
1930 1929 break;
1931 1930 case ':':
1932 1931 cpcgen_usage("Option -%c requires an operand\n",
1933 1932 optopt);
1934 1933 return (2);
1935 1934 case '?':
1936 1935 cpcgen_usage("Unknown option: -%c\n", optopt);
1937 1936 return (2);
1938 1937 case 'h':
1939 1938 default:
1940 1939 cpcgen_usage(NULL);
1941 1940 return (2);
1942 1941 }
1943 1942 }
1944 1943
1945 1944 count = 0;
1946 1945 if (do_mpage)
1947 1946 count++;
1948 1947 if (do_cfile)
1949 1948 count++;
1950 1949 if (do_header)
1951 1950 count++;
1952 1951 if (count > 1) {
1953 1952 cpcgen_usage("Only one of -c, -h, and -m may be specified\n");
1954 1953 return (2);
1955 1954 } else if (count == 0) {
1956 1955 cpcgen_usage("One of -c, -h, and -m is required\n");
1957 1956 return (2);
1958 1957 }
1959 1958
1960 1959 count = 0;
1961 1960 if (do_all)
1962 1961 count++;
1963 1962 if (platform != NULL)
1964 1963 count++;
1965 1964 if (count > 1) {
1966 1965 cpcgen_usage("Only one of -a and -p may be specified\n");
1967 1966 return (2);
1968 1967 } else if (count == 0) {
1969 1968 cpcgen_usage("One of -a and -p is required\n");
1970 1969 return (2);
1971 1970 }
1972 1971
1973 1972 if (outdir == NULL) {
1974 1973 cpcgen_usage("Missing required output directory (-o)\n");
1975 1974 return (2);
1976 1975 }
1977 1976
1978 1977 if ((outdirfd = open(outdir, O_RDONLY)) < 0) {
1979 1978 err(EXIT_FAILURE, "failed to open output directory %s", outdir);
1980 1979 }
1981 1980
1982 1981 if (datadir == NULL) {
1983 1982 cpcgen_usage("Missing required data directory (-d)\n");
1984 1983 return (2);
1985 1984 }
1986 1985
1987 1986 cpcgen_determine_vendor(datadir);
1988 1987
1989 1988 switch (cpcgen_mode) {
1990 1989 case CPCGEN_MODE_INTEL:
1991 1990 cpcgen_ops.cgen_op_gather = cpcgen_read_intel;
1992 1991 cpcgen_ops.cgen_op_common = cpcgen_common_intel_files;
1993 1992 cpcgen_ops.cgen_op_skip = cpcgen_skip_intel_entry;
1994 1993 if (do_mpage) {
1995 1994 cpcgen_ops.cgen_op_name = cpcgen_manual_intel_name;
1996 1995 cpcgen_ops.cgen_op_file_before =
1997 1996 cpcgen_manual_intel_file_before;
1998 1997 cpcgen_ops.cgen_op_file_after =
1999 1998 cpcgen_manual_intel_file_after;
2000 1999 cpcgen_ops.cgen_op_event = cpcgen_manual_intel_event;
2001 2000 } else {
2002 2001 cpcgen_ops.cgen_op_name = cpcgen_cfile_intel_name;
2003 2002 cpcgen_ops.cgen_op_file_before =
2004 2003 cpcgen_cfile_intel_before;
2005 2004 cpcgen_ops.cgen_op_file_after =
2006 2005 cpcgen_cfile_intel_after;
2007 2006 cpcgen_ops.cgen_op_event = cpcgen_cfile_intel_event;
2008 2007 }
2009 2008 break;
2010 2009 case CPCGEN_MODE_AMD:
2011 2010 cpcgen_ops.cgen_op_gather = cpcgen_read_amd;
2012 2011 cpcgen_ops.cgen_op_common = cpcgen_common_amd_files;
2013 2012 cpcgen_ops.cgen_op_skip = NULL;
2014 2013 if (do_mpage) {
2015 2014 cpcgen_ops.cgen_op_name = cpcgen_manual_amd_name;
2016 2015 cpcgen_ops.cgen_op_file_before =
2017 2016 cpcgen_manual_amd_file_before;
2018 2017 cpcgen_ops.cgen_op_file_after =
2019 2018 cpcgen_manual_amd_file_after;
2020 2019 cpcgen_ops.cgen_op_event = cpcgen_manual_amd_event;
2021 2020 } else {
2022 2021 cpcgen_ops.cgen_op_name = cpcgen_cfile_amd_name;
2023 2022 cpcgen_ops.cgen_op_file_before =
2024 2023 cpcgen_cfile_amd_before;
2025 2024 cpcgen_ops.cgen_op_file_after = cpcgen_cfile_amd_after;
2026 2025 cpcgen_ops.cgen_op_event = cpcgen_cfile_amd_event;
2027 2026
2028 2027 }
2029 2028 break;
2030 2029 default:
2031 2030 errx(EXIT_FAILURE, "failed to determine if operating on AMD or "
2032 2031 "Intel");
2033 2032 break;
2034 2033 }
2035 2034
2036 2035 cpcgen_ops.cgen_op_gather(datadir, platform);
2037 2036
2038 2037 if (do_header) {
2039 2038 cpcgen_ops.cgen_op_common(outdirfd);
2040 2039 return (0);
2041 2040 }
2042 2041
2043 2042 cpcgen_gen(outdirfd);
2044 2043
2045 2044 return (0);
2046 2045 }
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