1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
23 * Copyright (c) 2017 by Delphix. All rights reserved.
24 */
25 /*
26 * Copyright 2018 Joyent, Inc.
27 */
28
29 #ifndef _SYS_APIC_COMMON_H
30 #define _SYS_APIC_COMMON_H
31
32 #include <sys/psm_types.h>
33 #include <sys/avintr.h>
34 #include <sys/privregs.h>
35 #include <sys/pci.h>
36 #include <sys/cyclic.h>
37
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41
42 /*
43 * Functions & Variables common to pcplusmp & apix
44 */
45
46 #include <sys/psm_common.h>
47
48 /* Methods for multiple IOAPIC */
49 enum apic_ioapic_method_type {
50 APIC_MUL_IOAPIC_NONE, /* use to disable pcplusmp fallback */
51 APIC_MUL_IOAPIC_MASK, /* Set RT Entry Mask bit before EOI */
52 APIC_MUL_IOAPIC_DEOI, /* Directed EOI */
53 APIC_MUL_IOAPIC_IOXAPIC, /* IOxAPIC */
54 APIC_MUL_IOAPIC_IIR, /* IOMMU interrup remapping */
55 APIC_MUL_IOAPIC_PCPLUSMP /* Fall back to old pcplusmp */
56 };
57
58 #define APIX_IS_DIRECTED_EOI(type) \
59 ((type) == APIC_MUL_IOAPIC_DEOI || (type) == APIC_MUL_IOAPIC_IIR)
60 #define APIX_IS_MASK_RDT(type) \
61 ((type) == APIC_MUL_IOAPIC_NONE || (type) == APIC_MUL_IOAPIC_MASK)
62
63 extern int apix_enable;
64 extern int apix_loaded(void);
65 extern enum apic_ioapic_method_type apix_mul_ioapic_method;
66
67 extern int apic_oneshot;
68 /* to allow disabling one-shot capability */
69 extern int apic_oneshot_enable;
70
71 /* Now the ones for Dynamic Interrupt distribution */
72 extern int apic_enable_dynamic_migration;
73
74 extern int apic_have_32bit_cr8;
75
76 extern struct psm_ops *psmops;
77
78 /*
79 * These variables are frequently accessed in apic_intr_enter(),
80 * apic_intr_exit and apic_setspl, so group them together
81 */
82 extern volatile uint32_t *apicadr; /* virtual addr of local APIC */
83 extern uchar_t apic_io_vectbase[MAX_IO_APIC];
84 extern uchar_t apic_io_vectend[MAX_IO_APIC];
85 extern uchar_t apic_io_ver[MAX_IO_APIC];
86 extern int apic_io_max;
87 extern int apic_nvidia_io_max;
88 extern int apic_setspl_delay; /* apic_setspl - delay enable */
89 extern int apic_clkvect;
90
91 /* vector at which error interrupts come in */
92 extern int apic_errvect;
93 extern int apic_enable_error_intr;
94 extern int apic_error_display_delay;
95
96 /* vector at which performance counter overflow interrupts come in */
97 extern int apic_cpcovf_vect;
98 extern int apic_enable_cpcovf_intr;
99
100 /* vector at which CMCI interrupts come in */
101 extern int apic_cmci_vect;
102 extern int cmi_enable_cmci;
103 extern void cmi_cmci_trap(void);
104
105 extern kmutex_t cmci_cpu_setup_lock; /* protects cmci_cpu_setup_registered */
106 extern int cmci_cpu_setup_registered;
107
108 extern int apic_forceload;
109
110 extern int apic_coarse_hrtime; /* 0 - use accurate slow gethrtime() */
111 /* 1 - use gettime() for performance */
112 extern int apic_flat_model; /* 0 - clustered. 1 - flat */
113
114 extern int apic_panic_on_nmi;
115 extern int apic_panic_on_apic_error;
116
117 extern int apic_verbose;
118
119 extern int apic_pir_vect;
120
121 #ifdef DEBUG
122 extern int apic_debug;
123 extern int apic_restrict_vector;
124
125 extern int apic_debug_msgbuf[APIC_DEBUG_MSGBUFSIZE];
126 extern int apic_debug_msgbufindex;
127
128 #endif /* DEBUG */
129
130 extern uint_t apic_nsec_per_intr;
131 extern uint_t apic_nticks;
132 extern uint_t apic_skipped_redistribute;
133
134 extern uint_t last_count_read;
135 extern lock_t apic_mode_switch_lock;
136 extern lock_t apic_gethrtime_lock;
137 extern volatile int apic_hrtime_stamp;
138 extern volatile hrtime_t apic_nsec_since_boot;
139 extern uint_t apic_hertz_count;
140
141 extern uint64_t apic_ticks_per_SFnsecs; /* # of ticks in SF nsecs */
142
143 extern int apic_hrtime_error;
144 extern int apic_remote_hrterr;
145 extern int apic_num_nmis;
146 extern int apic_apic_error;
147 extern int apic_num_apic_errors;
148 extern int apic_num_cksum_errors;
149
150 extern int apic_error;
151
152 /* use to make sure only one cpu handles the nmi */
153 extern lock_t apic_nmi_lock;
154 /* use to make sure only one cpu handles the error interrupt */
155 extern lock_t apic_error_lock;
156
157 /* Patchable global variables. */
158 extern int apic_kmdb_on_nmi; /* 0 - no, 1 - yes enter kmdb */
159 extern uint32_t apic_divide_reg_init; /* 0 - divide by 2 */
160
161 extern apic_intrmap_ops_t *apic_vt_ops;
162
163 #ifdef DEBUG
164 extern int apic_break_on_cpu;
165 extern int apic_stretch_interrupts;
166 extern int apic_stretch_ISR; /* IPL of 3 matches nothing now */
167 #endif
168
169 extern cyclic_id_t apic_cyclic_id;
170
171 extern void apic_nmi_intr(caddr_t arg, struct regs *rp);
172 extern int apic_clkinit();
173 extern hrtime_t apic_gettime();
174 extern hrtime_t apic_gethrtime();
175 extern int apic_cpu_start(processorid_t cpuid, caddr_t ctx);
176 extern int apic_cpu_stop(processorid_t cpuid, caddr_t ctx);
177 extern int apic_cpu_add(psm_cpu_request_t *reqp);
178 extern int apic_cpu_remove(psm_cpu_request_t *reqp);
179 extern int apic_cpu_ops(psm_cpu_request_t *reqp);
180 extern void apic_switch_ipi_callback(boolean_t enter);
181 extern void apic_send_ipi(int cpun, int ipl);
182 extern void apic_set_idlecpu(processorid_t cpun);
183 extern void apic_unset_idlecpu(processorid_t cpun);
184 extern void apic_shutdown(int cmd, int fcn);
185 extern void apic_preshutdown(int cmd, int fcn);
186 extern processorid_t apic_get_next_processorid(processorid_t cpun);
187 extern uint64_t apic_calibrate();
188 extern int apic_get_pir_ipivect(void);
189 extern void apic_send_pir_ipi(processorid_t);
190
191 extern int apic_error_intr();
192 extern void apic_cpcovf_mask_clear(void);
193 extern void apic_cmci_setup(processorid_t, boolean_t);
194 extern void apic_intrmap_init(int apic_mode);
195 extern processorid_t apic_find_cpu(int flag);
196 extern processorid_t apic_get_next_bind_cpu(void);
197
198 extern int apic_support_msi;
199 extern int apic_multi_msi_enable;
200 extern int apic_msix_enable;
201
202 extern uint32_t apic_get_localapicid(uint32_t cpuid);
203 extern uchar_t apic_get_ioapicid(uchar_t ioapicindex);
204
205 #ifdef __cplusplus
206 }
207 #endif
208
209 #endif /* _SYS_APIC_COMMON_H */