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212 Atheros AR8132 / L1c Gigabit Ethernet Adapter


   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*


  22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  23  * Use is subject to license terms.
  24  */
  25 
  26 #ifndef _ATGE_L1E_REG_H
  27 #define _ATGE_L1E_REG_H
  28 
  29 #ifdef __cplusplus
  30         extern "C" {
  31 #endif
  32 
  33 /*
  34  * Number of RX Rings (or pages) we use.
  35  */
  36 #define L1E_RX_PAGES            2
  37 
  38 #pragma pack(1)
  39 typedef struct  rx_rs   {
  40         uint32_t        seqno;
  41         uint32_t        length;
  42         uint32_t        flags;
  43         uint32_t        vtags;
  44 } rx_rs_t;
  45 
  46 typedef struct  rx_cmb {
  47         uint32_t        cmb[L1E_RX_PAGES];
  48 } rx_cmb_t;
  49 #pragma pack()
  50 













  51 /*
  52  * DMA CFG registers (L1E specific).
  53  */
  54 #define DMA_CFG_RD_REQ_PRI              0x00000400
  55 #define DMA_CFG_RD_DELAY_CNT_MASK       0x0000F800
  56 #define DMA_CFG_WR_DELAY_CNT_MASK       0x000F0000
  57 #define DMA_CFG_TXCMB_ENB               0x00100000
  58 #define DMA_CFG_RXCMB_ENB               0x00200000
  59 #define DMA_CFG_RD_BURST_MASK           0x07
  60 #define DMA_CFG_RD_BURST_SHIFT          4
  61 #define DMA_CFG_WR_BURST_MASK           0x07
  62 #define DMA_CFG_WR_BURST_SHIFT          7
  63 #define DMA_CFG_RD_DELAY_CNT_SHIFT      11
  64 #define DMA_CFG_WR_DELAY_CNT_SHIFT      16
  65 #define DMA_CFG_RD_DELAY_CNT_DEFAULT    15
  66 #define DMA_CFG_WR_DELAY_CNT_DEFAULT    4
  67 
  68 #define L1E_TX_RING_CNT_MIN             32
  69 #define L1E_TX_RING_CNT_MAX             1020
  70 #define L1E_TX_RING_ALIGN               8
  71 #define L1E_RX_PAGE_ALIGN               32
  72 #define L1E_CMB_ALIGN                   32
  73 #define L1E_MAX_FRAMELEN                ETHERMAX
  74 
  75 #define L1E_RX_PAGE_SZ_MIN              (8 * 1024)
  76 #define L1E_RX_PAGE_SZ_MAX              (1024 * 1024)
  77 #define L1E_RX_FRAMES_PAGE              128
  78 #define L1E_RX_PAGE_SZ  \
  79         (ROUNDUP(L1E_MAX_FRAMELEN, L1E_RX_PAGE_ALIGN) * L1E_RX_FRAMES_PAGE)
  80 #define L1E_TX_CMB_SZ                   (sizeof (uint32_t))
  81 #define L1E_RX_CMB_SZ                   (sizeof (uint32_t))
  82 
  83 #define L1E_PROC_MAX    \
  84         ((L1E_RX_PAGE_SZ * L1E_RX_PAGES) / ETHERMAX)
  85 #define L1E_PROC_DEFAULT                (L1E_PROC_MAX / 4)
  86 




   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright (c) 2012 Gary Mills
  23  *
  24  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  25  * Use is subject to license terms.
  26  */
  27 
  28 #ifndef _ATGE_L1E_REG_H
  29 #define _ATGE_L1E_REG_H
  30 
  31 #ifdef __cplusplus
  32         extern "C" {
  33 #endif
  34 
  35 /*
  36  * Number of RX Rings (or pages) we use.
  37  */
  38 #define L1E_RX_PAGES            2
  39 
  40 #pragma pack(1)
  41 typedef struct  rx_rs   {
  42         uint32_t        seqno;
  43         uint32_t        length;
  44         uint32_t        flags;
  45         uint32_t        vtags;
  46 } rx_rs_t;
  47 
  48 typedef struct  rx_cmb {
  49         uint32_t        cmb[L1E_RX_PAGES];
  50 } rx_cmb_t;
  51 #pragma pack()
  52 
  53 /* Master configuration */
  54 #define L1E_MASTER_CFG                  0x1400
  55 #define L1E_MASTER_RESET                0x00000001
  56 #define L1E_MASTER_MTIMER_ENB           0x00000002
  57 #define L1E_MASTER_IM_TX_TIMER_ENB      0x00000004
  58 #define L1E_MASTER_MANUAL_INT_ENB       0x00000008
  59 #define L1E_MASTER_IM_RX_TIMER_ENB      0x00000020
  60 #define L1E_MASTER_CHIP_REV_MASK        0x00FF0000
  61 #define L1E_MASTER_CHIP_ID_MASK         0xFF000000
  62 #define L1E_MASTER_CHIP_REV_SHIFT       16
  63 #define L1E_MASTER_CHIP_ID_SHIFT        24
  64 
  65 
  66 /*
  67  * DMA CFG registers (L1E specific).
  68  */
  69 #define DMA_CFG_RD_REQ_PRI              0x00000400


  70 #define DMA_CFG_TXCMB_ENB               0x00100000

  71 #define DMA_CFG_RD_BURST_MASK           0x07
  72 #define DMA_CFG_RD_BURST_SHIFT          4
  73 #define DMA_CFG_WR_BURST_MASK           0x07
  74 #define DMA_CFG_WR_BURST_SHIFT          7




  75 
  76 #define L1E_TX_RING_CNT_MIN             32
  77 #define L1E_TX_RING_CNT_MAX             1020
  78 #define L1E_TX_RING_ALIGN               8
  79 #define L1E_RX_PAGE_ALIGN               32
  80 #define L1E_CMB_ALIGN                   32
  81 #define L1E_MAX_FRAMELEN                ETHERMAX
  82 
  83 #define L1E_RX_PAGE_SZ_MIN              (8 * 1024)
  84 #define L1E_RX_PAGE_SZ_MAX              (1024 * 1024)
  85 #define L1E_RX_FRAMES_PAGE              128
  86 #define L1E_RX_PAGE_SZ  \
  87         (ROUNDUP(L1E_MAX_FRAMELEN, L1E_RX_PAGE_ALIGN) * L1E_RX_FRAMES_PAGE)
  88 #define L1E_TX_CMB_SZ                   (sizeof (uint32_t))
  89 #define L1E_RX_CMB_SZ                   (sizeof (uint32_t))
  90 
  91 #define L1E_PROC_MAX    \
  92         ((L1E_RX_PAGE_SZ * L1E_RX_PAGES) / ETHERMAX)
  93 #define L1E_PROC_DEFAULT                (L1E_PROC_MAX / 4)
  94