1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 * Copyright (c) 2012, Joyent, Inc. All rights reserved.
26 */
27
28 /*
29 * Copyright (c) 2000 to 2010, LSI Corporation.
30 * All rights reserved.
31 *
32 * Redistribution and use in source and binary forms of all code within
33 * this file that is exclusively owned by LSI, with or without
34 * modification, is permitted provided that, in addition to the CDDL 1.0
35 * License requirements, the following conditions are met:
36 *
37 * Neither the name of the author nor the names of its contributors may be
38 * used to endorse or promote products derived from this software without
39 * specific prior written permission.
40 *
41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
42 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
43 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
44 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
45 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
46 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
47 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
48 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
49 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
50 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
51 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
52 * DAMAGE.
53 */
54
55 #ifndef _MPTSAS_IOCTL_H
56 #define _MPTSAS_IOCTL_H
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #include <sys/types.h>
63
64 #define MPTIOCTL ('I' << 8)
65 #define MPTIOCTL_GET_ADAPTER_DATA (MPTIOCTL | 1)
66 #define MPTIOCTL_UPDATE_FLASH (MPTIOCTL | 2)
67 #define MPTIOCTL_RESET_ADAPTER (MPTIOCTL | 3)
68 #define MPTIOCTL_PASS_THRU (MPTIOCTL | 4)
69 #define MPTIOCTL_EVENT_QUERY (MPTIOCTL | 5)
70 #define MPTIOCTL_EVENT_ENABLE (MPTIOCTL | 6)
71 #define MPTIOCTL_EVENT_REPORT (MPTIOCTL | 7)
72 #define MPTIOCTL_GET_PCI_INFO (MPTIOCTL | 8)
73 #define MPTIOCTL_DIAG_ACTION (MPTIOCTL | 9)
74 #define MPTIOCTL_REG_ACCESS (MPTIOCTL | 10)
75 #define MPTIOCTL_GET_DISK_INFO (MPTIOCTL | 11)
76 #define MPTIOCTL_LED_CONTROL (MPTIOCTL | 12)
77
78 /*
79 * The following are our ioctl() return status values. If everything went
80 * well, we return good status. If the buffer length sent to us is too short
81 * we return a status to tell the user.
82 */
83 #define MPTIOCTL_STATUS_GOOD 0
84 #define MPTIOCTL_STATUS_LEN_TOO_SHORT 1
85
86 typedef struct mptsas_pci_bits
87 {
88 union {
89 struct {
90 uint32_t DeviceNumber :5;
91 uint32_t FunctionNumber :3;
92 uint32_t BusNumber :24;
93 } bits;
94 uint32_t AsDWORD;
95 } u;
96 uint32_t PciSegmentId;
97 } mptsas_pci_bits_t;
98 /*
99 * The following is the MPTIOCTL_GET_ADAPTER_DATA data structure. This data
100 * structure is setup so that we hopefully are properly aligned for both
101 * 32-bit and 64-bit mode applications.
102 *
103 * Adapter Type - Value = 4 = SCSI Protocol through SAS-2 adapter
104 *
105 * MPI Port Number - The PCI Function number for this device
106 *
107 * PCI Device HW Id - The PCI device number for this device
108 *
109 */
110 #define MPTIOCTL_ADAPTER_TYPE_SAS2 4
111 typedef struct mptsas_adapter_data
112 {
113 uint32_t StructureLength;
114 uint32_t AdapterType;
115 uint32_t MpiPortNumber;
116 uint32_t PCIDeviceHwId;
117 uint32_t PCIDeviceHwRev;
118 uint32_t SubSystemId;
119 uint32_t SubsystemVendorId;
120 uint32_t Reserved1;
121 uint32_t MpiFirmwareVersion;
122 uint32_t BiosVersion;
123 uint8_t DriverVersion[32];
124 uint8_t Reserved2;
125 uint8_t ScsiId;
126 uint16_t Reserved3;
127 mptsas_pci_bits_t PciInformation;
128 } mptsas_adapter_data_t;
129
130
131 typedef struct mptsas_update_flash
132 {
133 uint64_t PtrBuffer;
134 uint32_t ImageChecksum;
135 uint32_t ImageOffset;
136 uint32_t ImageSize;
137 uint32_t ImageType;
138 } mptsas_update_flash_t;
139
140
141 #define MPTSAS_PASS_THRU_DIRECTION_NONE 0
142 #define MPTSAS_PASS_THRU_DIRECTION_READ 1
143 #define MPTSAS_PASS_THRU_DIRECTION_WRITE 2
144 #define MPTSAS_PASS_THRU_DIRECTION_BOTH 3
145
146 typedef struct mptsas_pass_thru
147 {
148 uint64_t PtrRequest;
149 uint64_t PtrReply;
150 uint64_t PtrData;
151 uint32_t RequestSize;
152 uint32_t ReplySize;
153 uint32_t DataSize;
154 uint32_t DataDirection;
155 uint64_t PtrDataOut;
156 uint32_t DataOutSize;
157 uint32_t Timeout;
158 } mptsas_pass_thru_t;
159
160
161 /*
162 * Event queue defines
163 */
164 #define MPTSAS_EVENT_QUEUE_SIZE (50) /* Max Events stored in driver */
165 #define MPTSAS_MAX_EVENT_DATA_LENGTH (48) /* Size of each event in Dwords */
166
167 typedef struct mptsas_event_query
168 {
169 uint16_t Entries;
170 uint16_t Reserved;
171 uint32_t Types[4];
172 } mptsas_event_query_t;
173
174 typedef struct mptsas_event_enable
175 {
176 uint32_t Types[4];
177 } mptsas_event_enable_t;
178
179 /*
180 * Event record entry for ioctl.
181 */
182 typedef struct mptsas_event_entry
183 {
184 uint32_t Type;
185 uint32_t Number;
186 uint32_t Data[MPTSAS_MAX_EVENT_DATA_LENGTH];
187 } mptsas_event_entry_t;
188
189 typedef struct mptsas_event_report
190 {
191 uint32_t Size;
192 mptsas_event_entry_t Events[1];
193 } mptsas_event_report_t;
194
195
196 typedef struct mptsas_pci_info
197 {
198 uint32_t BusNumber;
199 uint8_t DeviceNumber;
200 uint8_t FunctionNumber;
201 uint16_t InterruptVector;
202 uint8_t PciHeader[256];
203 } mptsas_pci_info_t;
204
205
206 typedef struct mptsas_diag_action
207 {
208 uint32_t Action;
209 uint32_t Length;
210 uint64_t PtrDiagAction;
211 uint32_t ReturnCode;
212 } mptsas_diag_action_t;
213
214 #define MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
215
216 #define MPTSAS_FW_DIAG_NEW (0x806E6577)
217
218 #define MPTSAS_FW_DIAG_TYPE_REGISTER (0x00000001)
219 #define MPTSAS_FW_DIAG_TYPE_UNREGISTER (0x00000002)
220 #define MPTSAS_FW_DIAG_TYPE_QUERY (0x00000003)
221 #define MPTSAS_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
222 #define MPTSAS_FW_DIAG_TYPE_RELEASE (0x00000005)
223
224 #define MPTSAS_FW_DIAG_INVALID_UID (0x00000000)
225
226 #define MPTSAS_FW_DIAG_ERROR_SUCCESS (0x00000000)
227 #define MPTSAS_FW_DIAG_ERROR_FAILURE (0x00000001)
228 #define MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000002)
229 #define MPTSAS_FW_DIAG_ERROR_POST_FAILED (0x00000010)
230 #define MPTSAS_FW_DIAG_ERROR_INVALID_UID (0x00000011)
231 #define MPTSAS_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
232 #define MPTSAS_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
233 #define MPTSAS_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
234
235
236 typedef struct mptsas_fw_diag_register
237 {
238 uint8_t ExtendedType;
239 uint8_t BufferType;
240 uint16_t ApplicationFlags;
241 uint32_t DiagnosticFlags;
242 uint32_t ProductSpecific[23];
243 uint32_t RequestedBufferSize;
244 uint32_t UniqueId;
245 } mptsas_fw_diag_register_t;
246
247 typedef struct mptsas_fw_diag_unregister
248 {
249 uint32_t UniqueId;
250 } mptsas_fw_diag_unregister_t;
251
252 #define MPTSAS_FW_DIAG_FLAG_APP_OWNED (0x0001)
253 #define MPTSAS_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
254 #define MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
255
256 typedef struct mptsas_fw_diag_query
257 {
258 uint8_t ExtendedType;
259 uint8_t BufferType;
260 uint16_t ApplicationFlags;
261 uint32_t DiagnosticFlags;
262 uint32_t ProductSpecific[23];
263 uint32_t TotalBufferSize;
264 uint32_t DriverAddedBufferSize;
265 uint32_t UniqueId;
266 } mptsas_fw_diag_query_t;
267
268 typedef struct mptsas_fw_diag_release
269 {
270 uint32_t UniqueId;
271 } mptsas_fw_diag_release_t;
272
273 #define MPTSAS_FW_DIAG_FLAG_REREGISTER (0x0001)
274 #define MPTSAS_FW_DIAG_FLAG_FORCE_RELEASE (0x0002)
275
276 typedef struct mptsas_diag_read_buffer
277 {
278 uint8_t Status;
279 uint8_t Reserved;
280 uint16_t Flags;
281 uint32_t StartingOffset;
282 uint32_t BytesToRead;
283 uint32_t UniqueId;
284 uint32_t DataBuffer[1];
285 } mptsas_diag_read_buffer_t;
286
287 /*
288 * Register Access
289 */
290 #define REG_IO_READ 1
291 #define REG_IO_WRITE 2
292 #define REG_MEM_READ 3
293 #define REG_MEM_WRITE 4
294
295 typedef struct mptsas_reg_access
296 {
297 uint32_t Command;
298 uint32_t RegOffset;
299 uint32_t RegData;
300 } mptsas_reg_access_t;
301
302 /*
303 * Disk Toplogy Information
304 */
305 typedef struct mptsas_disk_info_t
306 {
307 uint64_t SasAddress;
308 uint16_t Instance;
309 uint16_t Enclosure;
310 uint16_t Slot;
311 } mptsas_disk_info_t;
312
313 typedef struct mptsas_get_disk_info
314 {
315 uint16_t DiskCount;
316 mptsas_disk_info_t *PtrDiskInfoArray;
317 uint64_t DiskInfoArraySize;
318 } mptsas_get_disk_info_t;
319
320 #ifdef _KERNEL
321
322 typedef struct mptsas_get_disk_info32
323 {
324 uint16_t DiskCount;
325 caddr32_t PtrDiskInfoArray;
326 uint64_t DiskInfoArraySize;
327 } mptsas_get_disk_info32_t;
328
329 #endif /* _KERNEL */
330
331 /*
332 * LED Control
333 */
334
335 typedef struct mptsas_led_control
336 {
337 uint8_t Command;
338 uint16_t Enclosure;
339 uint16_t Slot;
340 uint8_t Led;
341 uint8_t LedStatus;
342 } mptsas_led_control_t;
343
344 #define MPTSAS_LEDCTL_FLAG_SET 1
345 #define MPTSAS_LEDCTL_FLAG_GET 2
346
347 #define MPTSAS_LEDCTL_LED_IDENT 1
348 #define MPTSAS_LEDCTL_LED_FAIL 2
349 #define MPTSAS_LEDCTL_LED_OK2RM 3
350
351 #ifdef __cplusplus
352 }
353 #endif
354
355 #endif /* _MPTSAS_IOCTL_H */