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OS-1997 mpt_sas: expose LED controls to libtopo
Reviewed by: Keith Wesolowski <keith.wesolowski@joyent.com>
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--- old/usr/src/uts/common/sys/scsi/adapters/mpt_sas/mptsas_ioctl.h
+++ new/usr/src/uts/common/sys/scsi/adapters/mpt_sas/mptsas_ioctl.h
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26 /*
27 27 * Copyright (c) 2013, Joyent, Inc. All rights reserved.
28 28 */
29 29
30 30 /*
31 31 * Copyright (c) 2000 to 2010, LSI Corporation.
32 32 * All rights reserved.
33 33 *
34 34 * Redistribution and use in source and binary forms of all code within
35 35 * this file that is exclusively owned by LSI, with or without
36 36 * modification, is permitted provided that, in addition to the CDDL 1.0
37 37 * License requirements, the following conditions are met:
38 38 *
39 39 * Neither the name of the author nor the names of its contributors may be
40 40 * used to endorse or promote products derived from this software without
41 41 * specific prior written permission.
42 42 *
43 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
46 46 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
47 47 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
48 48 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
49 49 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
50 50 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
51 51 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
52 52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
53 53 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
54 54 * DAMAGE.
55 55 */
56 56
57 57 #ifndef _MPTSAS_IOCTL_H
58 58 #define _MPTSAS_IOCTL_H
59 59
60 60 #ifdef __cplusplus
61 61 extern "C" {
62 62 #endif
63 63
64 64 #include <sys/types.h>
65 65
66 66 #define MPTIOCTL ('I' << 8)
67 67 #define MPTIOCTL_GET_ADAPTER_DATA (MPTIOCTL | 1)
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68 68 #define MPTIOCTL_UPDATE_FLASH (MPTIOCTL | 2)
69 69 #define MPTIOCTL_RESET_ADAPTER (MPTIOCTL | 3)
70 70 #define MPTIOCTL_PASS_THRU (MPTIOCTL | 4)
71 71 #define MPTIOCTL_EVENT_QUERY (MPTIOCTL | 5)
72 72 #define MPTIOCTL_EVENT_ENABLE (MPTIOCTL | 6)
73 73 #define MPTIOCTL_EVENT_REPORT (MPTIOCTL | 7)
74 74 #define MPTIOCTL_GET_PCI_INFO (MPTIOCTL | 8)
75 75 #define MPTIOCTL_DIAG_ACTION (MPTIOCTL | 9)
76 76 #define MPTIOCTL_REG_ACCESS (MPTIOCTL | 10)
77 77 #define MPTIOCTL_GET_DISK_INFO (MPTIOCTL | 11)
78 +#define MPTIOCTL_LED_CONTROL (MPTIOCTL | 12)
78 79
79 80 /*
80 81 * The following are our ioctl() return status values. If everything went
81 82 * well, we return good status. If the buffer length sent to us is too short
82 83 * we return a status to tell the user.
83 84 */
84 85 #define MPTIOCTL_STATUS_GOOD 0
85 86 #define MPTIOCTL_STATUS_LEN_TOO_SHORT 1
86 87
87 88 typedef struct mptsas_pci_bits
88 89 {
89 90 union {
90 91 struct {
91 92 uint32_t DeviceNumber :5;
92 93 uint32_t FunctionNumber :3;
93 94 uint32_t BusNumber :24;
94 95 } bits;
95 96 uint32_t AsDWORD;
96 97 } u;
97 98 uint32_t PciSegmentId;
98 99 } mptsas_pci_bits_t;
99 100 /*
100 101 * The following is the MPTIOCTL_GET_ADAPTER_DATA data structure. This data
101 102 * structure is setup so that we hopefully are properly aligned for both
102 103 * 32-bit and 64-bit mode applications.
103 104 *
104 105 * Adapter Type - Value = 4 = SCSI Protocol through SAS-2 adapter
105 106 *
106 107 * MPI Port Number - The PCI Function number for this device
107 108 *
108 109 * PCI Device HW Id - The PCI device number for this device
109 110 *
110 111 */
111 112 #define MPTIOCTL_ADAPTER_TYPE_SAS2 4
112 113 typedef struct mptsas_adapter_data
113 114 {
114 115 uint32_t StructureLength;
115 116 uint32_t AdapterType;
116 117 uint32_t MpiPortNumber;
117 118 uint32_t PCIDeviceHwId;
118 119 uint32_t PCIDeviceHwRev;
119 120 uint32_t SubSystemId;
120 121 uint32_t SubsystemVendorId;
121 122 uint32_t Reserved1;
122 123 uint32_t MpiFirmwareVersion;
123 124 uint32_t BiosVersion;
124 125 uint8_t DriverVersion[32];
125 126 uint8_t Reserved2;
126 127 uint8_t ScsiId;
127 128 uint16_t Reserved3;
128 129 mptsas_pci_bits_t PciInformation;
129 130 } mptsas_adapter_data_t;
130 131
131 132
132 133 typedef struct mptsas_update_flash
133 134 {
134 135 uint64_t PtrBuffer;
135 136 uint32_t ImageChecksum;
136 137 uint32_t ImageOffset;
137 138 uint32_t ImageSize;
138 139 uint32_t ImageType;
139 140 } mptsas_update_flash_t;
140 141
141 142
142 143 #define MPTSAS_PASS_THRU_DIRECTION_NONE 0
143 144 #define MPTSAS_PASS_THRU_DIRECTION_READ 1
144 145 #define MPTSAS_PASS_THRU_DIRECTION_WRITE 2
145 146 #define MPTSAS_PASS_THRU_DIRECTION_BOTH 3
146 147
147 148 typedef struct mptsas_pass_thru
148 149 {
149 150 uint64_t PtrRequest;
150 151 uint64_t PtrReply;
151 152 uint64_t PtrData;
152 153 uint32_t RequestSize;
153 154 uint32_t ReplySize;
154 155 uint32_t DataSize;
155 156 uint32_t DataDirection;
156 157 uint64_t PtrDataOut;
157 158 uint32_t DataOutSize;
158 159 uint32_t Timeout;
159 160 } mptsas_pass_thru_t;
160 161
161 162
162 163 /*
163 164 * Event queue defines
164 165 */
165 166 #define MPTSAS_EVENT_QUEUE_SIZE (50) /* Max Events stored in driver */
166 167 #define MPTSAS_MAX_EVENT_DATA_LENGTH (48) /* Size of each event in Dwords */
167 168
168 169 typedef struct mptsas_event_query
169 170 {
170 171 uint16_t Entries;
171 172 uint16_t Reserved;
172 173 uint32_t Types[4];
173 174 } mptsas_event_query_t;
174 175
175 176 typedef struct mptsas_event_enable
176 177 {
177 178 uint32_t Types[4];
178 179 } mptsas_event_enable_t;
179 180
180 181 /*
181 182 * Event record entry for ioctl.
182 183 */
183 184 typedef struct mptsas_event_entry
184 185 {
185 186 uint32_t Type;
186 187 uint32_t Number;
187 188 uint32_t Data[MPTSAS_MAX_EVENT_DATA_LENGTH];
188 189 } mptsas_event_entry_t;
189 190
190 191 typedef struct mptsas_event_report
191 192 {
192 193 uint32_t Size;
193 194 mptsas_event_entry_t Events[1];
194 195 } mptsas_event_report_t;
195 196
196 197
197 198 typedef struct mptsas_pci_info
198 199 {
199 200 uint32_t BusNumber;
200 201 uint8_t DeviceNumber;
201 202 uint8_t FunctionNumber;
202 203 uint16_t InterruptVector;
203 204 uint8_t PciHeader[256];
204 205 } mptsas_pci_info_t;
205 206
206 207
207 208 typedef struct mptsas_diag_action
208 209 {
209 210 uint32_t Action;
210 211 uint32_t Length;
211 212 uint64_t PtrDiagAction;
212 213 uint32_t ReturnCode;
213 214 } mptsas_diag_action_t;
214 215
215 216 #define MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
216 217
217 218 #define MPTSAS_FW_DIAG_NEW (0x806E6577)
218 219
219 220 #define MPTSAS_FW_DIAG_TYPE_REGISTER (0x00000001)
220 221 #define MPTSAS_FW_DIAG_TYPE_UNREGISTER (0x00000002)
221 222 #define MPTSAS_FW_DIAG_TYPE_QUERY (0x00000003)
222 223 #define MPTSAS_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
223 224 #define MPTSAS_FW_DIAG_TYPE_RELEASE (0x00000005)
224 225
225 226 #define MPTSAS_FW_DIAG_INVALID_UID (0x00000000)
226 227
227 228 #define MPTSAS_FW_DIAG_ERROR_SUCCESS (0x00000000)
228 229 #define MPTSAS_FW_DIAG_ERROR_FAILURE (0x00000001)
229 230 #define MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000002)
230 231 #define MPTSAS_FW_DIAG_ERROR_POST_FAILED (0x00000010)
231 232 #define MPTSAS_FW_DIAG_ERROR_INVALID_UID (0x00000011)
232 233 #define MPTSAS_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
233 234 #define MPTSAS_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
234 235 #define MPTSAS_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
235 236
236 237
237 238 typedef struct mptsas_fw_diag_register
238 239 {
239 240 uint8_t ExtendedType;
240 241 uint8_t BufferType;
241 242 uint16_t ApplicationFlags;
242 243 uint32_t DiagnosticFlags;
243 244 uint32_t ProductSpecific[23];
244 245 uint32_t RequestedBufferSize;
245 246 uint32_t UniqueId;
246 247 } mptsas_fw_diag_register_t;
247 248
248 249 typedef struct mptsas_fw_diag_unregister
249 250 {
250 251 uint32_t UniqueId;
251 252 } mptsas_fw_diag_unregister_t;
252 253
253 254 #define MPTSAS_FW_DIAG_FLAG_APP_OWNED (0x0001)
254 255 #define MPTSAS_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
255 256 #define MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
256 257
257 258 typedef struct mptsas_fw_diag_query
258 259 {
259 260 uint8_t ExtendedType;
260 261 uint8_t BufferType;
261 262 uint16_t ApplicationFlags;
262 263 uint32_t DiagnosticFlags;
263 264 uint32_t ProductSpecific[23];
264 265 uint32_t TotalBufferSize;
265 266 uint32_t DriverAddedBufferSize;
266 267 uint32_t UniqueId;
267 268 } mptsas_fw_diag_query_t;
268 269
269 270 typedef struct mptsas_fw_diag_release
270 271 {
271 272 uint32_t UniqueId;
272 273 } mptsas_fw_diag_release_t;
273 274
274 275 #define MPTSAS_FW_DIAG_FLAG_REREGISTER (0x0001)
275 276 #define MPTSAS_FW_DIAG_FLAG_FORCE_RELEASE (0x0002)
276 277
277 278 typedef struct mptsas_diag_read_buffer
278 279 {
279 280 uint8_t Status;
280 281 uint8_t Reserved;
281 282 uint16_t Flags;
282 283 uint32_t StartingOffset;
283 284 uint32_t BytesToRead;
284 285 uint32_t UniqueId;
285 286 uint32_t DataBuffer[1];
286 287 } mptsas_diag_read_buffer_t;
287 288
288 289 /*
289 290 * Register Access
290 291 */
291 292 #define REG_IO_READ 1
292 293 #define REG_IO_WRITE 2
293 294 #define REG_MEM_READ 3
294 295 #define REG_MEM_WRITE 4
295 296
296 297 typedef struct mptsas_reg_access
297 298 {
298 299 uint32_t Command;
299 300 uint32_t RegOffset;
300 301 uint32_t RegData;
301 302 } mptsas_reg_access_t;
302 303
303 304 /*
304 305 * Disk Toplogy Information
305 306 */
306 307 typedef struct mptsas_disk_info
307 308 {
308 309 uint64_t SasAddress;
309 310 uint16_t Instance;
310 311 uint16_t Enclosure;
311 312 uint16_t Slot;
312 313 } mptsas_disk_info_t;
313 314
314 315 typedef struct mptsas_get_disk_info
315 316 {
316 317 uint16_t DiskCount;
317 318 mptsas_disk_info_t *PtrDiskInfoArray;
318 319 uint64_t DiskInfoArraySize;
319 320 } mptsas_get_disk_info_t;
320 321
321 322 #ifdef _KERNEL
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322 323
323 324 typedef struct mptsas_get_disk_info32
324 325 {
325 326 uint16_t DiskCount;
326 327 caddr32_t PtrDiskInfoArray;
327 328 uint64_t DiskInfoArraySize;
328 329 } mptsas_get_disk_info32_t;
329 330
330 331 #endif /* _KERNEL */
331 332
333 +/*
334 + * LED Control
335 + */
336 +
337 +typedef struct mptsas_led_control
338 +{
339 + uint8_t Command;
340 + uint16_t Enclosure;
341 + uint16_t Slot;
342 + uint8_t Led;
343 + uint8_t LedStatus;
344 +} mptsas_led_control_t;
345 +
346 +#define MPTSAS_LEDCTL_FLAG_SET 1
347 +#define MPTSAS_LEDCTL_FLAG_GET 2
348 +
349 +#define MPTSAS_LEDCTL_LED_IDENT 1
350 +#define MPTSAS_LEDCTL_LED_FAIL 2
351 +#define MPTSAS_LEDCTL_LED_OK2RM 3
352 +
332 353 #ifdef __cplusplus
333 354 }
334 355 #endif
335 356
336 357 #endif /* _MPTSAS_IOCTL_H */
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