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take to dis and libdisasm with an axe; does not yet compile
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--- old/usr/src/lib/libdisasm/sparc/dis_sparc_fmt.h
+++ new/usr/src/lib/libdisasm/common/dis_sparc_fmt.h
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
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22 22 /*
23 23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26
27 27 /*
28 28 * Copyright 2007 Jason King. All rights reserved.
29 29 * Use is subject to license terms.
30 30 */
31 31
32 -#pragma ident "%Z%%M% %I% %E% SMI"
33 -
34 32 #ifndef _DIS_SPARC_FMT_H
35 33 #define _DIS_SPARC_FMT_H
36 34
37 35 #ifdef __cplusplus
38 36 extern "C" {
39 37 #endif
40 38
41 39 #include <sys/types.h>
42 40 #include "libdisasm.h"
43 41 #include "dis_sparc.h"
44 42
45 43 /* which set of registers are used with an instruction */
46 44 #define REG_INT 0x00 /* regular integer registers */
47 45 #define REG_FP 0x01 /* single-precision fp registers */
48 46 #define REG_FPD 0x02 /* double-precision fp registers */
49 47 #define REG_FPQ 0x03 /* quad-precision fp registers */
50 48 #define REG_CP 0x04 /* coprocessor registers (v8) */
51 49 #define REG_ICC 0x05 /* %icc / % xcc */
52 50 #define REG_FCC 0x06 /* %fccn */
53 51 #define REG_FSR 0x07 /* %fsr */
54 52 #define REG_CSR 0x08 /* %csr */
55 53 #define REG_CQ 0x09 /* %cq */
56 54 #define REG_NONE 0x0a /* no registers */
57 55
58 56 /* the size fo the displacement for branches */
59 57 #define DISP22 0x00
60 58 #define DISP19 0x01
61 59 #define DISP16 0x02
62 60 #define CONST22 0x03
63 61
64 62 /* get/set the register set name for the rd field of an instruction */
65 63 #define FLG_RD(x) (x)
66 64 #define FLG_RD_VAL(x) (x & 0xfL)
67 65
68 66 #define FLG_STORE (0x1L << 24) /* the instruction is not a load */
69 67 #define FLG_ASI (0x2L << 24) /* the load/store includes an asi value */
70 68
71 69
72 70 /* flags for ALU instructions */
73 71
74 72 /* set/get register set name for 1st argument position */
75 73 #define FLG_P1(x) (x << 8)
76 74 #define FLG_P1_VAL(x) ((x >> 8) & 0xfL)
77 75
78 76 /* get/set reg set for 2nd argument position */
79 77 #define FLG_P2(x) (x << 4)
80 78 #define FLG_P2_VAL(x) ((x >> 4) & 0xfL)
81 79
82 80 /* get/set for 3rd argument position */
83 81 #define FLG_P3(x) (x)
84 82 #define FLG_P3_VAL(x) (x & 0xfL)
85 83
86 84 /* set if the arguments do not contain immediate values */
87 85 #define FLG_NOIMM (0x01L << 24)
88 86
89 87
90 88
91 89 /* flags for branch instructions */
92 90
93 91 /* has branch prediction */
94 92 #define FLG_PRED (0x01L << 24)
95 93
96 94 /* get/set condition code register set -- usually REG_NONE */
97 95 #define FLG_RS1(x) (x)
98 96 #define FLG_RS1_VAL(x) (x & 0xfL)
99 97
100 98 /* get/set displacement size */
101 99 #define FLG_DISP(x) (x << 4L)
102 100 #define FLG_DISP_VAL(x) ((x >> 4L) & 0x0fL)
103 101
104 102
105 103 int fmt_call(dis_handle_t *, uint32_t, const inst_t *, int);
106 104 int fmt_ls(dis_handle_t *, uint32_t, const inst_t *, int);
107 105 int fmt_alu(dis_handle_t *, uint32_t, const inst_t *, int);
108 106 int fmt_branch(dis_handle_t *, uint32_t, const inst_t *, int);
109 107 int fmt_sethi(dis_handle_t *, uint32_t, const inst_t *, int);
110 108 int fmt_fpop1(dis_handle_t *, uint32_t, const inst_t *, int);
111 109 int fmt_fpop2(dis_handle_t *, uint32_t, const inst_t *, int);
112 110 int fmt_vis(dis_handle_t *, uint32_t, const inst_t *, int);
113 111 int fmt_trap(dis_handle_t *, uint32_t, const inst_t *, int);
114 112 int fmt_regwin(dis_handle_t *, uint32_t, const inst_t *, int);
115 113 int fmt_trap_ret(dis_handle_t *, uint32_t, const inst_t *, int);
116 114 int fmt_movcc(dis_handle_t *, uint32_t, const inst_t *, int);
117 115 int fmt_movr(dis_handle_t *, uint32_t, const inst_t *, int);
118 116 int fmt_fused(dis_handle_t *, uint32_t, const inst_t *, int);
119 117
120 118 #ifdef __cplusplus
121 119 }
122 120 #endif
123 121
124 122 #endif /* _DIS_SPARC_FMT_H */
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