1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27 /*
28 * Copyright 2007 Jason King. All rights reserved.
29 * Use is subject to license terms.
30 */
31
32 #ifndef _DIS_SPARC_FMT_H
33 #define _DIS_SPARC_FMT_H
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 #include <sys/types.h>
40 #include "libdisasm.h"
41 #include "dis_sparc.h"
42
43 /* which set of registers are used with an instruction */
44 #define REG_INT 0x00 /* regular integer registers */
45 #define REG_FP 0x01 /* single-precision fp registers */
46 #define REG_FPD 0x02 /* double-precision fp registers */
47 #define REG_FPQ 0x03 /* quad-precision fp registers */
48 #define REG_CP 0x04 /* coprocessor registers (v8) */
49 #define REG_ICC 0x05 /* %icc / % xcc */
50 #define REG_FCC 0x06 /* %fccn */
51 #define REG_FSR 0x07 /* %fsr */
52 #define REG_CSR 0x08 /* %csr */
53 #define REG_CQ 0x09 /* %cq */
54 #define REG_NONE 0x0a /* no registers */
55
56 /* the size fo the displacement for branches */
57 #define DISP22 0x00
58 #define DISP19 0x01
59 #define DISP16 0x02
60 #define CONST22 0x03
61
62 /* get/set the register set name for the rd field of an instruction */
63 #define FLG_RD(x) (x)
64 #define FLG_RD_VAL(x) (x & 0xfL)
65
66 #define FLG_STORE (0x1L << 24) /* the instruction is not a load */
67 #define FLG_ASI (0x2L << 24) /* the load/store includes an asi value */
68
69
70 /* flags for ALU instructions */
71
72 /* set/get register set name for 1st argument position */
73 #define FLG_P1(x) (x << 8)
74 #define FLG_P1_VAL(x) ((x >> 8) & 0xfL)
75
76 /* get/set reg set for 2nd argument position */
77 #define FLG_P2(x) (x << 4)
78 #define FLG_P2_VAL(x) ((x >> 4) & 0xfL)
79
80 /* get/set for 3rd argument position */
81 #define FLG_P3(x) (x)
82 #define FLG_P3_VAL(x) (x & 0xfL)
83
84 /* set if the arguments do not contain immediate values */
85 #define FLG_NOIMM (0x01L << 24)
86
87
88
89 /* flags for branch instructions */
90
91 /* has branch prediction */
92 #define FLG_PRED (0x01L << 24)
93
94 /* get/set condition code register set -- usually REG_NONE */
95 #define FLG_RS1(x) (x)
96 #define FLG_RS1_VAL(x) (x & 0xfL)
97
98 /* get/set displacement size */
99 #define FLG_DISP(x) (x << 4L)
100 #define FLG_DISP_VAL(x) ((x >> 4L) & 0x0fL)
101
102
103 int fmt_call(dis_handle_t *, uint32_t, const inst_t *, int);
104 int fmt_ls(dis_handle_t *, uint32_t, const inst_t *, int);
105 int fmt_alu(dis_handle_t *, uint32_t, const inst_t *, int);
106 int fmt_branch(dis_handle_t *, uint32_t, const inst_t *, int);
107 int fmt_sethi(dis_handle_t *, uint32_t, const inst_t *, int);
108 int fmt_fpop1(dis_handle_t *, uint32_t, const inst_t *, int);
109 int fmt_fpop2(dis_handle_t *, uint32_t, const inst_t *, int);
110 int fmt_vis(dis_handle_t *, uint32_t, const inst_t *, int);
111 int fmt_trap(dis_handle_t *, uint32_t, const inst_t *, int);
112 int fmt_regwin(dis_handle_t *, uint32_t, const inst_t *, int);
113 int fmt_trap_ret(dis_handle_t *, uint32_t, const inst_t *, int);
114 int fmt_movcc(dis_handle_t *, uint32_t, const inst_t *, int);
115 int fmt_movr(dis_handle_t *, uint32_t, const inst_t *, int);
116 int fmt_fused(dis_handle_t *, uint32_t, const inst_t *, int);
117
118 #ifdef __cplusplus
119 }
120 #endif
121
122 #endif /* _DIS_SPARC_FMT_H */