1 /*
2 * Copyright (c) 2015 Solarflare Communications Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
29 */
30
31 #ifndef _SYS_EF10_IMPL_H
32 #define _SYS_EF10_IMPL_H
33
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37
38 #if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
39 #define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
40 #elif EFSYS_OPT_HUNTINGTON
41 #define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS
42 #elif EFSYS_OPT_MEDFORD
43 #define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS
44 #endif
45
46 /*
47 * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
48 * possibly be increased, or the write size reported by newer firmware used
49 * instead.
50 */
51 #define EF10_NVRAM_CHUNK 0x80
52
53 /* Alignment requirement for value written to RX WPTR:
54 * the WPTR must be aligned to an 8 descriptor boundary
55 */
56 #define EF10_RX_WPTR_ALIGN 8
57
58 /*
59 * Max byte offset into the packet the TCP header must start for the hardware
60 * to be able to parse the packet correctly.
61 */
62 #define EF10_TCP_HEADER_OFFSET_LIMIT 208
63
64 /* Invalid RSS context handle */
65 #define EF10_RSS_CONTEXT_INVALID (0xffffffff)
66
67
68 /* EV */
69
70 __checkReturn efx_rc_t
71 ef10_ev_init(
72 __in efx_nic_t *enp);
73
74 void
75 ef10_ev_fini(
76 __in efx_nic_t *enp);
77
78 __checkReturn efx_rc_t
79 ef10_ev_qcreate(
80 __in efx_nic_t *enp,
81 __in unsigned int index,
82 __in efsys_mem_t *esmp,
83 __in size_t n,
84 __in uint32_t id,
85 __in efx_evq_t *eep);
86
87 void
88 ef10_ev_qdestroy(
89 __in efx_evq_t *eep);
90
91 __checkReturn efx_rc_t
92 ef10_ev_qprime(
93 __in efx_evq_t *eep,
94 __in unsigned int count);
95
96 void
97 ef10_ev_qpost(
98 __in efx_evq_t *eep,
99 __in uint16_t data);
100
101 __checkReturn efx_rc_t
102 ef10_ev_qmoderate(
103 __in efx_evq_t *eep,
104 __in unsigned int us);
105
106 #if EFSYS_OPT_QSTATS
107 void
108 ef10_ev_qstats_update(
109 __in efx_evq_t *eep,
110 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat);
111 #endif /* EFSYS_OPT_QSTATS */
112
113 void
114 ef10_ev_rxlabel_init(
115 __in efx_evq_t *eep,
116 __in efx_rxq_t *erp,
117 __in unsigned int label);
118
119 void
120 ef10_ev_rxlabel_fini(
121 __in efx_evq_t *eep,
122 __in unsigned int label);
123
124 /* INTR */
125
126 __checkReturn efx_rc_t
127 ef10_intr_init(
128 __in efx_nic_t *enp,
129 __in efx_intr_type_t type,
130 __in efsys_mem_t *esmp);
131
132 void
133 ef10_intr_enable(
134 __in efx_nic_t *enp);
135
136 void
137 ef10_intr_disable(
138 __in efx_nic_t *enp);
139
140 void
141 ef10_intr_disable_unlocked(
142 __in efx_nic_t *enp);
143
144 __checkReturn efx_rc_t
145 ef10_intr_trigger(
146 __in efx_nic_t *enp,
147 __in unsigned int level);
148
149 void
150 ef10_intr_status_line(
151 __in efx_nic_t *enp,
152 __out boolean_t *fatalp,
153 __out uint32_t *qmaskp);
154
155 void
156 ef10_intr_status_message(
157 __in efx_nic_t *enp,
158 __in unsigned int message,
159 __out boolean_t *fatalp);
160
161 void
162 ef10_intr_fatal(
163 __in efx_nic_t *enp);
164 void
165 ef10_intr_fini(
166 __in efx_nic_t *enp);
167
168 /* NIC */
169
170 extern __checkReturn efx_rc_t
171 ef10_nic_probe(
172 __in efx_nic_t *enp);
173
174 extern __checkReturn efx_rc_t
175 ef10_nic_set_drv_limits(
176 __inout efx_nic_t *enp,
177 __in efx_drv_limits_t *edlp);
178
179 extern __checkReturn efx_rc_t
180 ef10_nic_get_vi_pool(
181 __in efx_nic_t *enp,
182 __out uint32_t *vi_countp);
183
184 extern __checkReturn efx_rc_t
185 ef10_nic_get_bar_region(
186 __in efx_nic_t *enp,
187 __in efx_nic_region_t region,
188 __out uint32_t *offsetp,
189 __out size_t *sizep);
190
191 extern __checkReturn efx_rc_t
192 ef10_nic_reset(
193 __in efx_nic_t *enp);
194
195 extern __checkReturn efx_rc_t
196 ef10_nic_init(
197 __in efx_nic_t *enp);
198
199 #if EFSYS_OPT_DIAG
200
201 extern __checkReturn efx_rc_t
202 ef10_nic_register_test(
203 __in efx_nic_t *enp);
204
205 #endif /* EFSYS_OPT_DIAG */
206
207 extern void
208 ef10_nic_fini(
209 __in efx_nic_t *enp);
210
211 extern void
212 ef10_nic_unprobe(
213 __in efx_nic_t *enp);
214
215
216 /* MAC */
217
218 extern __checkReturn efx_rc_t
219 ef10_mac_poll(
220 __in efx_nic_t *enp,
221 __out efx_link_mode_t *link_modep);
222
223 extern __checkReturn efx_rc_t
224 ef10_mac_up(
225 __in efx_nic_t *enp,
226 __out boolean_t *mac_upp);
227
228 extern __checkReturn efx_rc_t
229 ef10_mac_addr_set(
230 __in efx_nic_t *enp);
231
232 extern __checkReturn efx_rc_t
233 ef10_mac_pdu_set(
234 __in efx_nic_t *enp);
235
236 extern __checkReturn efx_rc_t
237 ef10_mac_reconfigure(
238 __in efx_nic_t *enp);
239
240 extern __checkReturn efx_rc_t
241 ef10_mac_multicast_list_set(
242 __in efx_nic_t *enp);
243
244 extern __checkReturn efx_rc_t
245 ef10_mac_filter_default_rxq_set(
246 __in efx_nic_t *enp,
247 __in efx_rxq_t *erp,
248 __in boolean_t using_rss);
249
250 extern void
251 ef10_mac_filter_default_rxq_clear(
252 __in efx_nic_t *enp);
253
254 #if EFSYS_OPT_LOOPBACK
255
256 extern __checkReturn efx_rc_t
257 ef10_mac_loopback_set(
258 __in efx_nic_t *enp,
259 __in efx_link_mode_t link_mode,
260 __in efx_loopback_type_t loopback_type);
261
262 #endif /* EFSYS_OPT_LOOPBACK */
263
264 #if EFSYS_OPT_MAC_STATS
265
266 extern __checkReturn efx_rc_t
267 ef10_mac_stats_update(
268 __in efx_nic_t *enp,
269 __in efsys_mem_t *esmp,
270 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
271 __inout_opt uint32_t *generationp);
272
273 #endif /* EFSYS_OPT_MAC_STATS */
274
275
276 /* MCDI */
277
278 #if EFSYS_OPT_MCDI
279
280 extern __checkReturn efx_rc_t
281 ef10_mcdi_init(
282 __in efx_nic_t *enp,
283 __in const efx_mcdi_transport_t *mtp);
284
285 extern void
286 ef10_mcdi_fini(
287 __in efx_nic_t *enp);
288
289 extern void
290 ef10_mcdi_send_request(
291 __in efx_nic_t *enp,
292 __in void *hdrp,
293 __in size_t hdr_len,
294 __in void *sdup,
295 __in size_t sdu_len);
296
297 extern __checkReturn boolean_t
298 ef10_mcdi_poll_response(
299 __in efx_nic_t *enp);
300
301 extern void
302 ef10_mcdi_read_response(
303 __in efx_nic_t *enp,
304 __out_bcount(length) void *bufferp,
305 __in size_t offset,
306 __in size_t length);
307
308 extern efx_rc_t
309 ef10_mcdi_poll_reboot(
310 __in efx_nic_t *enp);
311
312 extern __checkReturn efx_rc_t
313 ef10_mcdi_feature_supported(
314 __in efx_nic_t *enp,
315 __in efx_mcdi_feature_id_t id,
316 __out boolean_t *supportedp);
317
318 #endif /* EFSYS_OPT_MCDI */
319
320 /* NVRAM */
321
322 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
323
324 extern __checkReturn efx_rc_t
325 ef10_nvram_buf_read_tlv(
326 __in efx_nic_t *enp,
327 __in_bcount(max_seg_size) caddr_t seg_data,
328 __in size_t max_seg_size,
329 __in uint32_t tag,
330 __deref_out_bcount_opt(*sizep) caddr_t *datap,
331 __out size_t *sizep);
332
333 extern __checkReturn efx_rc_t
334 ef10_nvram_buf_write_tlv(
335 __inout_bcount(partn_size) caddr_t partn_data,
336 __in size_t partn_size,
337 __in uint32_t tag,
338 __in_bcount(tag_size) caddr_t tag_data,
339 __in size_t tag_size,
340 __out size_t *total_lengthp);
341
342 extern __checkReturn efx_rc_t
343 ef10_nvram_partn_read_tlv(
344 __in efx_nic_t *enp,
345 __in uint32_t partn,
346 __in uint32_t tag,
347 __deref_out_bcount_opt(*sizep) caddr_t *datap,
348 __out size_t *sizep);
349
350 extern __checkReturn efx_rc_t
351 ef10_nvram_partn_write_tlv(
352 __in efx_nic_t *enp,
353 __in uint32_t partn,
354 __in uint32_t tag,
355 __in_bcount(size) caddr_t data,
356 __in size_t size);
357
358 extern __checkReturn efx_rc_t
359 ef10_nvram_partn_write_segment_tlv(
360 __in efx_nic_t *enp,
361 __in uint32_t partn,
362 __in uint32_t tag,
363 __in_bcount(size) caddr_t data,
364 __in size_t size,
365 __in boolean_t all_segments);
366
367 extern __checkReturn efx_rc_t
368 ef10_nvram_partn_lock(
369 __in efx_nic_t *enp,
370 __in uint32_t partn);
371
372 extern void
373 ef10_nvram_partn_unlock(
374 __in efx_nic_t *enp,
375 __in uint32_t partn);
376
377 #endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */
378
379 #if EFSYS_OPT_NVRAM
380
381 #if EFSYS_OPT_DIAG
382
383 extern __checkReturn efx_rc_t
384 ef10_nvram_test(
385 __in efx_nic_t *enp);
386
387 #endif /* EFSYS_OPT_DIAG */
388
389 extern __checkReturn efx_rc_t
390 ef10_nvram_type_to_partn(
391 __in efx_nic_t *enp,
392 __in efx_nvram_type_t type,
393 __out uint32_t *partnp);
394
395 extern __checkReturn efx_rc_t
396 ef10_nvram_partn_size(
397 __in efx_nic_t *enp,
398 __in uint32_t partn,
399 __out size_t *sizep);
400
401 extern __checkReturn efx_rc_t
402 ef10_nvram_partn_rw_start(
403 __in efx_nic_t *enp,
404 __in uint32_t partn,
405 __out size_t *chunk_sizep);
406
407 extern __checkReturn efx_rc_t
408 ef10_nvram_partn_read_mode(
409 __in efx_nic_t *enp,
410 __in uint32_t partn,
411 __in unsigned int offset,
412 __out_bcount(size) caddr_t data,
413 __in size_t size,
414 __in uint32_t mode);
415
416 extern __checkReturn efx_rc_t
417 ef10_nvram_partn_read(
418 __in efx_nic_t *enp,
419 __in uint32_t partn,
420 __in unsigned int offset,
421 __out_bcount(size) caddr_t data,
422 __in size_t size);
423
424 extern __checkReturn efx_rc_t
425 ef10_nvram_partn_erase(
426 __in efx_nic_t *enp,
427 __in uint32_t partn,
428 __in unsigned int offset,
429 __in size_t size);
430
431 extern __checkReturn efx_rc_t
432 ef10_nvram_partn_write(
433 __in efx_nic_t *enp,
434 __in uint32_t partn,
435 __in unsigned int offset,
436 __out_bcount(size) caddr_t data,
437 __in size_t size);
438
439 extern void
440 ef10_nvram_partn_rw_finish(
441 __in efx_nic_t *enp,
442 __in uint32_t partn);
443
444 extern __checkReturn efx_rc_t
445 ef10_nvram_partn_get_version(
446 __in efx_nic_t *enp,
447 __in uint32_t partn,
448 __out uint32_t *subtypep,
449 __out_ecount(4) uint16_t version[4]);
450
451 extern __checkReturn efx_rc_t
452 ef10_nvram_partn_set_version(
453 __in efx_nic_t *enp,
454 __in uint32_t partn,
455 __in_ecount(4) uint16_t version[4]);
456
457 extern __checkReturn efx_rc_t
458 ef10_nvram_buffer_validate(
459 __in efx_nic_t *enp,
460 __in uint32_t partn,
461 __in_bcount(buffer_size)
462 caddr_t bufferp,
463 __in size_t buffer_size);
464
465 extern __checkReturn efx_rc_t
466 ef10_nvram_buffer_create(
467 __in efx_nic_t *enp,
468 __in uint16_t partn_type,
469 __in_bcount(buffer_size)
470 caddr_t bufferp,
471 __in size_t buffer_size);
472
473 extern __checkReturn efx_rc_t
474 ef10_nvram_buffer_find_item_start(
475 __in_bcount(buffer_size)
476 caddr_t bufferp,
477 __in size_t buffer_size,
478 __out uint32_t *startp
479 );
480
481 extern __checkReturn efx_rc_t
482 ef10_nvram_buffer_find_end(
483 __in_bcount(buffer_size)
484 caddr_t bufferp,
485 __in size_t buffer_size,
486 __in uint32_t offset,
487 __out uint32_t *endp
488 );
489
490 extern __checkReturn __success(return != B_FALSE) boolean_t
491 ef10_nvram_buffer_find_item(
492 __in_bcount(buffer_size)
493 caddr_t bufferp,
494 __in size_t buffer_size,
495 __in uint32_t offset,
496 __out uint32_t *startp,
497 __out uint32_t *lengthp
498 );
499
500 extern __checkReturn efx_rc_t
501 ef10_nvram_buffer_get_item(
502 __in_bcount(buffer_size)
503 caddr_t bufferp,
504 __in size_t buffer_size,
505 __in uint32_t offset,
506 __in uint32_t length,
507 __out_bcount_part(item_max_size, *lengthp)
508 caddr_t itemp,
509 __in size_t item_max_size,
510 __out uint32_t *lengthp
511 );
512
513 extern __checkReturn efx_rc_t
514 ef10_nvram_buffer_insert_item(
515 __in_bcount(buffer_size)
516 caddr_t bufferp,
517 __in size_t buffer_size,
518 __in uint32_t offset,
519 __in_bcount(length) caddr_t keyp,
520 __in uint32_t length,
521 __out uint32_t *lengthp
522 );
523
524 extern __checkReturn efx_rc_t
525 ef10_nvram_buffer_delete_item(
526 __in_bcount(buffer_size)
527 caddr_t bufferp,
528 __in size_t buffer_size,
529 __in uint32_t offset,
530 __in uint32_t length,
531 __in uint32_t end
532 );
533
534 extern __checkReturn efx_rc_t
535 ef10_nvram_buffer_finish(
536 __in_bcount(buffer_size)
537 caddr_t bufferp,
538 __in size_t buffer_size
539 );
540
541 #endif /* EFSYS_OPT_NVRAM */
542
543
544 /* PHY */
545
546 typedef struct ef10_link_state_s {
547 uint32_t els_adv_cap_mask;
548 uint32_t els_lp_cap_mask;
549 unsigned int els_fcntl;
550 efx_link_mode_t els_link_mode;
551 #if EFSYS_OPT_LOOPBACK
552 efx_loopback_type_t els_loopback;
553 #endif
554 boolean_t els_mac_up;
555 } ef10_link_state_t;
556
557 extern void
558 ef10_phy_link_ev(
559 __in efx_nic_t *enp,
560 __in efx_qword_t *eqp,
561 __out efx_link_mode_t *link_modep);
562
563 extern __checkReturn efx_rc_t
564 ef10_phy_get_link(
565 __in efx_nic_t *enp,
566 __out ef10_link_state_t *elsp);
567
568 extern __checkReturn efx_rc_t
569 ef10_phy_power(
570 __in efx_nic_t *enp,
571 __in boolean_t on);
572
573 extern __checkReturn efx_rc_t
574 ef10_phy_reconfigure(
575 __in efx_nic_t *enp);
576
577 extern __checkReturn efx_rc_t
578 ef10_phy_verify(
579 __in efx_nic_t *enp);
580
581 extern __checkReturn efx_rc_t
582 ef10_phy_oui_get(
583 __in efx_nic_t *enp,
584 __out uint32_t *ouip);
585
586 #if EFSYS_OPT_PHY_STATS
587
588 extern __checkReturn efx_rc_t
589 ef10_phy_stats_update(
590 __in efx_nic_t *enp,
591 __in efsys_mem_t *esmp,
592 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
593
594 #endif /* EFSYS_OPT_PHY_STATS */
595
596
597 /* TX */
598
599 extern __checkReturn efx_rc_t
600 ef10_tx_init(
601 __in efx_nic_t *enp);
602
603 extern void
604 ef10_tx_fini(
605 __in efx_nic_t *enp);
606
607 extern __checkReturn efx_rc_t
608 ef10_tx_qcreate(
609 __in efx_nic_t *enp,
610 __in unsigned int index,
611 __in unsigned int label,
612 __in efsys_mem_t *esmp,
613 __in size_t n,
614 __in uint32_t id,
615 __in uint16_t flags,
616 __in efx_evq_t *eep,
617 __in efx_txq_t *etp,
618 __out unsigned int *addedp);
619
620 extern void
621 ef10_tx_qdestroy(
622 __in efx_txq_t *etp);
623
624 extern __checkReturn efx_rc_t
625 ef10_tx_qpost(
626 __in efx_txq_t *etp,
627 __in_ecount(n) efx_buffer_t *eb,
628 __in unsigned int n,
629 __in unsigned int completed,
630 __inout unsigned int *addedp);
631
632 extern void
633 ef10_tx_qpush(
634 __in efx_txq_t *etp,
635 __in unsigned int added,
636 __in unsigned int pushed);
637
638 extern __checkReturn efx_rc_t
639 ef10_tx_qpace(
640 __in efx_txq_t *etp,
641 __in unsigned int ns);
642
643 extern __checkReturn efx_rc_t
644 ef10_tx_qflush(
645 __in efx_txq_t *etp);
646
647 extern void
648 ef10_tx_qenable(
649 __in efx_txq_t *etp);
650
651 extern __checkReturn efx_rc_t
652 ef10_tx_qpio_enable(
653 __in efx_txq_t *etp);
654
655 extern void
656 ef10_tx_qpio_disable(
657 __in efx_txq_t *etp);
658
659 extern __checkReturn efx_rc_t
660 ef10_tx_qpio_write(
661 __in efx_txq_t *etp,
662 __in_ecount(buf_length) uint8_t *buffer,
663 __in size_t buf_length,
664 __in size_t pio_buf_offset);
665
666 extern __checkReturn efx_rc_t
667 ef10_tx_qpio_post(
668 __in efx_txq_t *etp,
669 __in size_t pkt_length,
670 __in unsigned int completed,
671 __inout unsigned int *addedp);
672
673 extern __checkReturn efx_rc_t
674 ef10_tx_qdesc_post(
675 __in efx_txq_t *etp,
676 __in_ecount(n) efx_desc_t *ed,
677 __in unsigned int n,
678 __in unsigned int completed,
679 __inout unsigned int *addedp);
680
681 extern void
682 ef10_tx_qdesc_dma_create(
683 __in efx_txq_t *etp,
684 __in efsys_dma_addr_t addr,
685 __in size_t size,
686 __in boolean_t eop,
687 __out efx_desc_t *edp);
688
689 extern void
690 ef10_tx_qdesc_tso_create(
691 __in efx_txq_t *etp,
692 __in uint16_t ipv4_id,
693 __in uint32_t tcp_seq,
694 __in uint8_t tcp_flags,
695 __out efx_desc_t *edp);
696
697 extern void
698 ef10_tx_qdesc_tso2_create(
699 __in efx_txq_t *etp,
700 __in uint16_t ipv4_id,
701 __in uint32_t tcp_seq,
702 __in uint16_t tcp_mss,
703 __out_ecount(count) efx_desc_t *edp,
704 __in int count);
705
706 extern void
707 ef10_tx_qdesc_vlantci_create(
708 __in efx_txq_t *etp,
709 __in uint16_t vlan_tci,
710 __out efx_desc_t *edp);
711
712
713 #if EFSYS_OPT_QSTATS
714
715 extern void
716 ef10_tx_qstats_update(
717 __in efx_txq_t *etp,
718 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat);
719
720 #endif /* EFSYS_OPT_QSTATS */
721
722 typedef uint32_t efx_piobuf_handle_t;
723
724 #define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1)
725
726 extern __checkReturn efx_rc_t
727 ef10_nic_pio_alloc(
728 __inout efx_nic_t *enp,
729 __out uint32_t *bufnump,
730 __out efx_piobuf_handle_t *handlep,
731 __out uint32_t *blknump,
732 __out uint32_t *offsetp,
733 __out size_t *sizep);
734
735 extern __checkReturn efx_rc_t
736 ef10_nic_pio_free(
737 __inout efx_nic_t *enp,
738 __in uint32_t bufnum,
739 __in uint32_t blknum);
740
741 extern __checkReturn efx_rc_t
742 ef10_nic_pio_link(
743 __inout efx_nic_t *enp,
744 __in uint32_t vi_index,
745 __in efx_piobuf_handle_t handle);
746
747 extern __checkReturn efx_rc_t
748 ef10_nic_pio_unlink(
749 __inout efx_nic_t *enp,
750 __in uint32_t vi_index);
751
752
753 /* VPD */
754
755 #if EFSYS_OPT_VPD
756
757 extern __checkReturn efx_rc_t
758 ef10_vpd_init(
759 __in efx_nic_t *enp);
760
761 extern __checkReturn efx_rc_t
762 ef10_vpd_size(
763 __in efx_nic_t *enp,
764 __out size_t *sizep);
765
766 extern __checkReturn efx_rc_t
767 ef10_vpd_read(
768 __in efx_nic_t *enp,
769 __out_bcount(size) caddr_t data,
770 __in size_t size);
771
772 extern __checkReturn efx_rc_t
773 ef10_vpd_verify(
774 __in efx_nic_t *enp,
775 __in_bcount(size) caddr_t data,
776 __in size_t size);
777
778 extern __checkReturn efx_rc_t
779 ef10_vpd_reinit(
780 __in efx_nic_t *enp,
781 __in_bcount(size) caddr_t data,
782 __in size_t size);
783
784 extern __checkReturn efx_rc_t
785 ef10_vpd_get(
786 __in efx_nic_t *enp,
787 __in_bcount(size) caddr_t data,
788 __in size_t size,
789 __inout efx_vpd_value_t *evvp);
790
791 extern __checkReturn efx_rc_t
792 ef10_vpd_set(
793 __in efx_nic_t *enp,
794 __in_bcount(size) caddr_t data,
795 __in size_t size,
796 __in efx_vpd_value_t *evvp);
797
798 extern __checkReturn efx_rc_t
799 ef10_vpd_next(
800 __in efx_nic_t *enp,
801 __in_bcount(size) caddr_t data,
802 __in size_t size,
803 __out efx_vpd_value_t *evvp,
804 __inout unsigned int *contp);
805
806 extern __checkReturn efx_rc_t
807 ef10_vpd_write(
808 __in efx_nic_t *enp,
809 __in_bcount(size) caddr_t data,
810 __in size_t size);
811
812 extern void
813 ef10_vpd_fini(
814 __in efx_nic_t *enp);
815
816 #endif /* EFSYS_OPT_VPD */
817
818
819 /* RX */
820
821 extern __checkReturn efx_rc_t
822 ef10_rx_init(
823 __in efx_nic_t *enp);
824
825 #if EFSYS_OPT_RX_SCATTER
826 extern __checkReturn efx_rc_t
827 ef10_rx_scatter_enable(
828 __in efx_nic_t *enp,
829 __in unsigned int buf_size);
830 #endif /* EFSYS_OPT_RX_SCATTER */
831
832
833 #if EFSYS_OPT_RX_SCALE
834
835 extern __checkReturn efx_rc_t
836 ef10_rx_scale_mode_set(
837 __in efx_nic_t *enp,
838 __in efx_rx_hash_alg_t alg,
839 __in efx_rx_hash_type_t type,
840 __in boolean_t insert);
841
842 extern __checkReturn efx_rc_t
843 ef10_rx_scale_key_set(
844 __in efx_nic_t *enp,
845 __in_ecount(n) uint8_t *key,
846 __in size_t n);
847
848 extern __checkReturn efx_rc_t
849 ef10_rx_scale_tbl_set(
850 __in efx_nic_t *enp,
851 __in_ecount(n) unsigned int *table,
852 __in size_t n);
853
854 extern __checkReturn uint32_t
855 ef10_rx_prefix_hash(
856 __in efx_nic_t *enp,
857 __in efx_rx_hash_alg_t func,
858 __in uint8_t *buffer);
859
860 #endif /* EFSYS_OPT_RX_SCALE */
861
862 extern __checkReturn efx_rc_t
863 ef10_rx_prefix_pktlen(
864 __in efx_nic_t *enp,
865 __in uint8_t *buffer,
866 __out uint16_t *lengthp);
867
868 extern void
869 ef10_rx_qpost(
870 __in efx_rxq_t *erp,
871 __in_ecount(n) efsys_dma_addr_t *addrp,
872 __in size_t size,
873 __in unsigned int n,
874 __in unsigned int completed,
875 __in unsigned int added);
876
877 extern void
878 ef10_rx_qpush(
879 __in efx_rxq_t *erp,
880 __in unsigned int added,
881 __inout unsigned int *pushedp);
882
883 extern __checkReturn efx_rc_t
884 ef10_rx_qflush(
885 __in efx_rxq_t *erp);
886
887 extern void
888 ef10_rx_qenable(
889 __in efx_rxq_t *erp);
890
891 extern __checkReturn efx_rc_t
892 ef10_rx_qcreate(
893 __in efx_nic_t *enp,
894 __in unsigned int index,
895 __in unsigned int label,
896 __in efx_rxq_type_t type,
897 __in efsys_mem_t *esmp,
898 __in size_t n,
899 __in uint32_t id,
900 __in efx_evq_t *eep,
901 __in efx_rxq_t *erp);
902
903 extern void
904 ef10_rx_qdestroy(
905 __in efx_rxq_t *erp);
906
907 extern void
908 ef10_rx_fini(
909 __in efx_nic_t *enp);
910
911 #if EFSYS_OPT_FILTER
912
913 typedef struct ef10_filter_handle_s {
914 uint32_t efh_lo;
915 uint32_t efh_hi;
916 } ef10_filter_handle_t;
917
918 typedef struct ef10_filter_entry_s {
919 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */
920 ef10_filter_handle_t efe_handle;
921 } ef10_filter_entry_t;
922
923 /*
924 * BUSY flag indicates that an update is in progress.
925 * AUTO_OLD flag is used to mark and sweep MAC packet filters.
926 */
927 #define EFX_EF10_FILTER_FLAG_BUSY 1U
928 #define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U
929 #define EFX_EF10_FILTER_FLAGS 3U
930
931 /*
932 * Size of the hash table used by the driver. Doesn't need to be the
933 * same size as the hardware's table.
934 */
935 #define EFX_EF10_FILTER_TBL_ROWS 8192
936
937 /* Only need to allow for one directed and one unknown unicast filter */
938 #define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2
939
940 /* Allow for the broadcast address to be added to the multicast list */
941 #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
942
943 typedef struct ef10_filter_table_s {
944 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
945 efx_rxq_t * eft_default_rxq;
946 boolean_t eft_using_rss;
947 uint32_t eft_unicst_filter_indexes[
948 EFX_EF10_FILTER_UNICAST_FILTERS_MAX];
949 boolean_t eft_unicst_filter_count;
950 uint32_t eft_mulcst_filter_indexes[
951 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
952 uint32_t eft_mulcst_filter_count;
953 boolean_t eft_using_all_mulcst;
954 } ef10_filter_table_t;
955
956 __checkReturn efx_rc_t
957 ef10_filter_init(
958 __in efx_nic_t *enp);
959
960 void
961 ef10_filter_fini(
962 __in efx_nic_t *enp);
963
964 __checkReturn efx_rc_t
965 ef10_filter_restore(
966 __in efx_nic_t *enp);
967
968 __checkReturn efx_rc_t
969 ef10_filter_add(
970 __in efx_nic_t *enp,
971 __inout efx_filter_spec_t *spec,
972 __in boolean_t may_replace);
973
974 __checkReturn efx_rc_t
975 ef10_filter_delete(
976 __in efx_nic_t *enp,
977 __inout efx_filter_spec_t *spec);
978
979 extern __checkReturn efx_rc_t
980 ef10_filter_supported_filters(
981 __in efx_nic_t *enp,
982 __out uint32_t *list,
983 __out size_t *length);
984
985 extern __checkReturn efx_rc_t
986 ef10_filter_reconfigure(
987 __in efx_nic_t *enp,
988 __in_ecount(6) uint8_t const *mac_addr,
989 __in boolean_t all_unicst,
990 __in boolean_t mulcst,
991 __in boolean_t all_mulcst,
992 __in boolean_t brdcst,
993 __in_ecount(6*count) uint8_t const *addrs,
994 __in uint32_t count);
995
996 extern void
997 ef10_filter_get_default_rxq(
998 __in efx_nic_t *enp,
999 __out efx_rxq_t **erpp,
1000 __out boolean_t *using_rss);
1001
1002 extern void
1003 ef10_filter_default_rxq_set(
1004 __in efx_nic_t *enp,
1005 __in efx_rxq_t *erp,
1006 __in boolean_t using_rss);
1007
1008 extern void
1009 ef10_filter_default_rxq_clear(
1010 __in efx_nic_t *enp);
1011
1012
1013 #endif /* EFSYS_OPT_FILTER */
1014
1015 extern __checkReturn efx_rc_t
1016 efx_mcdi_get_function_info(
1017 __in efx_nic_t *enp,
1018 __out uint32_t *pfp,
1019 __out_opt uint32_t *vfp);
1020
1021 extern __checkReturn efx_rc_t
1022 efx_mcdi_privilege_mask(
1023 __in efx_nic_t *enp,
1024 __in uint32_t pf,
1025 __in uint32_t vf,
1026 __out uint32_t *maskp);
1027
1028 extern __checkReturn efx_rc_t
1029 efx_mcdi_get_port_assignment(
1030 __in efx_nic_t *enp,
1031 __out uint32_t *portp);
1032
1033 extern __checkReturn efx_rc_t
1034 efx_mcdi_get_port_modes(
1035 __in efx_nic_t *enp,
1036 __out uint32_t *modesp);
1037
1038 extern __checkReturn efx_rc_t
1039 efx_mcdi_get_mac_address_pf(
1040 __in efx_nic_t *enp,
1041 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1042
1043 extern __checkReturn efx_rc_t
1044 efx_mcdi_get_mac_address_vf(
1045 __in efx_nic_t *enp,
1046 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1047
1048 extern __checkReturn efx_rc_t
1049 efx_mcdi_get_clock(
1050 __in efx_nic_t *enp,
1051 __out uint32_t *sys_freqp);
1052
1053 extern __checkReturn efx_rc_t
1054 efx_mcdi_get_vector_cfg(
1055 __in efx_nic_t *enp,
1056 __out_opt uint32_t *vec_basep,
1057 __out_opt uint32_t *pf_nvecp,
1058 __out_opt uint32_t *vf_nvecp);
1059
1060 extern __checkReturn efx_rc_t
1061 ef10_get_datapath_caps(
1062 __in efx_nic_t *enp);
1063
1064 extern __checkReturn efx_rc_t
1065 ef10_get_privilege_mask(
1066 __in efx_nic_t *enp,
1067 __out uint32_t *maskp);
1068
1069 extern __checkReturn efx_rc_t
1070 ef10_external_port_mapping(
1071 __in efx_nic_t *enp,
1072 __in uint32_t port,
1073 __out uint8_t *external_portp);
1074
1075
1076 #ifdef __cplusplus
1077 }
1078 #endif
1079
1080 #endif /* _SYS_EF10_IMPL_H */