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--- old/usr/src/head/ieeefp.h
+++ new/usr/src/head/ieeefp.h
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License, Version 1.0 only
6 6 * (the "License"). You may not use this file except in compliance
7 7 * with the License.
8 8 *
9 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 10 * or http://www.opensolaris.org/os/licensing.
11 11 * See the License for the specific language governing permissions
12 12 * and limitations under the License.
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13 13 *
14 14 * When distributing Covered Code, include this CDDL HEADER in each
15 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 16 * If applicable, add the following below this CDDL HEADER, with the
17 17 * fields enclosed by brackets "[]" replaced with your own identifying
18 18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 19 *
20 20 * CDDL HEADER END
21 21 */
22 22 /*
23 + * Copyright 2014 Garrett D'Amore <garrett@damore.org>
24 + *
23 25 * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
24 26 * Use is subject to license terms.
25 27 */
26 28
27 29 /* Copyright (c) 1988 AT&T */
28 30 /* All Rights Reserved */
29 31
30 32
31 33 #ifndef _IEEEFP_H
32 34 #define _IEEEFP_H
33 35
34 -#pragma ident "%Z%%M% %I% %E% SMI"
35 -
36 36 #ifdef __cplusplus
37 37 extern "C" {
38 38 #endif
39 39
40 40 /*
41 41 * Floating point enviornment for machines that support
42 42 * the IEEE 754 floating-point standard. This file currently
43 43 * supports the 80*87, and SPARC families.
44 44 *
45 45 * This header defines the following interfaces:
46 46 * 1) Classes of floating point numbers
47 47 * 2) Rounding Control
48 48 * 3) Exception Control
49 49 * 4) Exception Handling
50 50 * 5) Utility Macros
51 51 * 6) Full Exception Environment Control
52 52 */
53 53
54 54 /*
55 55 * CLASSES of floating point numbers *************************
56 56 * IEEE floating point values fall into 1 of the following 10
57 57 * classes
58 58 */
59 59 typedef enum fpclass_t {
60 60 FP_SNAN = 0, /* signaling NaN */
61 61 FP_QNAN = 1, /* quiet NaN */
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62 62 FP_NINF = 2, /* negative infinity */
63 63 FP_PINF = 3, /* positive infinity */
64 64 FP_NDENORM = 4, /* negative denormalized non-zero */
65 65 FP_PDENORM = 5, /* positive denormalized non-zero */
66 66 FP_NZERO = 6, /* -0.0 */
67 67 FP_PZERO = 7, /* +0.0 */
68 68 FP_NNORM = 8, /* negative normalized non-zero */
69 69 FP_PNORM = 9 /* positive normalized non-zero */
70 70 } fpclass_t;
71 71
72 -#if defined(__STDC__)
73 72 extern fpclass_t fpclass(double); /* get class of double value */
74 73 extern int finite(double);
75 74 extern int unordered(double, double);
76 -#else
77 -extern fpclass_t fpclass(); /* get class of double value */
78 -#endif
79 75
80 76 /*
81 77 * ROUNDING CONTROL ******************************************
82 78 *
83 79 * At all times, floating-point math is done using one of four
84 80 * mutually-exclusive rounding modes.
85 81 */
86 82
87 83 #if defined(__i386) || defined(__amd64)
88 84
89 85 /*
90 86 * NOTE: the values given are chosen to match those used by the
91 87 * 80*87 rounding mode field in the control word.
92 88 */
93 89 typedef enum fp_rnd {
94 90 FP_RN = 0, /* round to nearest representable number, tie -> even */
95 91 FP_RM = 1, /* round toward minus infinity */
96 92 FP_RP = 2, /* round toward plus infinity */
97 93 FP_RZ = 3 /* round toward zero (truncate) */
98 94 } fp_rnd;
99 95
100 96 #endif
101 97
102 98 #if defined(__sparc)
103 99
104 100 /*
105 101 * NOTE: the values given are chosen to match those used by the
106 102 * RD (Round Direction) field of the FSR (Floating Point State Register).
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107 103 */
108 104 typedef enum fp_rnd {
109 105 FP_RN = 0, /* round to nearest representable number, tie -> even */
110 106 FP_RZ = 1, /* round toward zero (truncate) */
111 107 FP_RP = 2, /* round toward plus infinity */
112 108 FP_RM = 3 /* round toward minus infinity */
113 109 } fp_rnd;
114 110
115 111 #endif
116 112
117 -#if defined(__STDC__)
118 113 extern fp_rnd fpsetround(fp_rnd); /* set rounding mode, return previous */
119 114 extern fp_rnd fpgetround(void); /* return current rounding mode */
120 115
121 -#else
122 -extern fp_rnd fpsetround(); /* set rounding mode, return previous */
123 -extern fp_rnd fpgetround(); /* return current rounding mode */
124 -
125 -#endif
126 -
127 116 /*
128 117 * EXCEPTION CONTROL *****************************************
129 118 *
130 119 */
131 120
132 121 #define fp_except int
133 122
134 123 #define FP_DISABLE 0 /* exception will be ignored */
135 124 #define FP_ENABLE 1 /* exception will cause SIGFPE */
136 125 #define FP_CLEAR 0 /* exception has not occurred */
137 126 #define FP_SET 1 /* exception has occurred */
138 127
139 128 #if defined(__i386) || defined(__amd64)
140 129
141 130 /*
142 131 * There are six floating point exceptions, which can be individually
143 132 * ENABLED (== 1) or DISABLED (== 0). When an exception occurs
144 133 * (ENABLED or not), the fact is noted by changing an associated
145 134 * "sticky bit" from CLEAR (==0) to SET (==1).
146 135 *
147 136 * NOTE: the bit positions in fp_except are chosen to match those of
148 137 * the 80*87 control word mask bits. Although the 87 chips actually
149 138 * ENABLE exceptions with a mask value of 0 (not 1, as on the 3b), it
150 139 * is felt that switching these values may create more problems than
151 140 * it solves.
152 141 */
153 142
154 143 /* an fp_except can have the following (not exclusive) values: */
155 144 #define FP_X_INV 0x01 /* invalid operation exception */
156 145 #define FP_X_DNML 0x02 /* denormalization exception */
157 146 #define FP_X_DZ 0x04 /* divide-by-zero exception */
158 147 #define FP_X_OFL 0x08 /* overflow exception */
159 148 #define FP_X_UFL 0x10 /* underflow exception */
160 149 #define FP_X_IMP 0x20 /* imprecise (loss of precision) */
161 150
162 151 #endif
163 152
164 153 #if defined(__sparc)
165 154
166 155 /*
167 156 * There are five floating-point exceptions, which can be individually
168 157 * ENABLED (== 1) or DISABLED (== 0). When an exception occurs
169 158 * (ENABLED or not), the fact is noted by changing an associated
170 159 * "sticky bit" from CLEAR (==0) to SET (==1).
171 160 *
172 161 * NOTE: the bit positions in an fp_except are chosen to match that in
173 162 * the Trap Enable Mask of the FSR (Floating Point State Register).
174 163 */
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175 164
176 165 /* an fp_except can have the following (not exclusive) values: */
177 166 #define FP_X_INV 0x10 /* invalid operation exception */
178 167 #define FP_X_OFL 0x08 /* overflow exception */
179 168 #define FP_X_UFL 0x04 /* underflow exception */
180 169 #define FP_X_DZ 0x02 /* divide-by-zero exception */
181 170 #define FP_X_IMP 0x01 /* imprecise (loss of precision) */
182 171
183 172 #endif
184 173
185 -#if defined(__STDC__)
186 174 extern fp_except fpgetmask(void); /* current exception mask */
187 175 extern fp_except fpsetmask(fp_except); /* set mask, return previous */
188 176 extern fp_except fpgetsticky(void); /* return logged exceptions */
189 177 extern fp_except fpsetsticky(fp_except); /* change logged exceptions */
190 178
191 -#else
192 -extern fp_except fpgetmask(); /* current exception mask */
193 -extern fp_except fpsetmask(); /* set mask, return previous */
194 -extern fp_except fpgetsticky(); /* return logged exceptions */
195 -extern fp_except fpsetsticky(); /* change logged exceptions */
196 -
197 -#endif
198 -
199 179 /*
200 180 * UTILITY MACROS ********************************************
201 181 */
202 182
203 -#if defined(__STDC__)
204 183 extern int isnanf(float);
205 184 extern int isnand(double);
206 185
207 -#else
208 -extern int isnand();
209 -#define isnanf(x) (((*(long *)&(x) & 0x7f800000L) == 0x7f800000L) && \
210 - ((*(long *)&(x) & 0x007fffffL) != 0x00000000L))
211 -#endif
212 -
213 186 #if defined(__i386) || defined(__amd64)
214 187
215 188 /*
216 189 * EXCEPTION HANDLING ****************************************
217 190 *
218 191 * When a signal handler catches an FPE, it will have a freshly initialized
219 192 * coprocessor. This allows signal handling routines to make use of
220 193 * floating point arithmetic, if need be. The previous state of the 87
221 194 * chip is available, however. There are two ways to get at this information,
222 195 * depending on how the signal handler was set up.
223 196 *
224 197 * If the handler was set via signal() or sigset(), the old, SVR3, method
225 198 * should be used: the signal handler assumes that it has a single parameter,
226 199 * which is of type struct _fpstackframe, defined below. By investigating
227 200 * this parameter, the cause of the FPE may be determined. By modifying it,
228 201 * the state of the coprocessor can be changed upon return to the main task.
229 202 * THIS METHOD IS OBSOLETE, AND MAY NOT BE SUPPORTED IN FUTURE RELEASES.
230 203 *
231 204 * If the handler was set via sigaction(), the new, SVR4, method should be
232 205 * used: the third argument to the handler will be a pointer to a ucontext
233 206 * structure (see sys/ucontext.h). The uc_mcontext.fpregs member of the
234 207 * ucontext structure holds the saved floating-point registers. This can be
235 208 * examined and/or modified. By modifying it, the state of the coprocessor
236 209 * can be changed upon return to the main task.
237 210 */
238 211
239 212 struct _fpreg { /* structure of a temp real fp register */
240 213 unsigned short significand[4]; /* 64 bit mantissa value */
241 214 unsigned short exponent; /* 15 bit exponent and sign bit */
242 215 };
243 216
244 217 #if defined(__i386)
245 218
246 219 /*
247 220 * AMD64 users should use sigaction() as described above.
248 221 */
249 222
250 223 struct _fpstackframe { /* signal handler's argument */
251 224 long signo; /* signal number arg */
252 225 long regs[19]; /* all registers */
253 226 struct _fpstate *fpsp; /* address of saved 387 state */
254 227 char *wsp; /* address of saved Weitek state */
255 228 };
256 229
257 230 #endif
258 231
259 232 #if defined(__i386) || defined(__amd64)
260 233
261 234 #if defined(__amd64)
262 235 #define _fpstate _fpstate32
263 236 #endif
264 237
265 238 struct _fpstate { /* saved state info from an exception */
266 239 unsigned int cw, /* control word */
267 240 sw, /* status word after fnclex-not useful */
268 241 tag, /* tag word */
269 242 ipoff, /* %eip register */
270 243 cssel, /* code segment selector */
271 244 dataoff, /* data operand address */
272 245 datasel; /* data operand selector */
273 246 struct _fpreg _st[8]; /* saved register stack */
274 247 unsigned int status; /* status word saved at exception */
275 248 unsigned int mxcsr;
276 249 unsigned int xstatus; /* status word saved at exception */
277 250 unsigned int __pad[2];
278 251 unsigned int xmm[8][4];
279 252 };
280 253
281 254 #if defined(__amd64)
282 255 #undef _fpstate
283 256 #endif
284 257
285 258 #endif /* __i386 || __amd64 */
286 259
287 260 /*
288 261 * The structure of the 80*87 status and control words, and the mxcsr
289 262 * register are given by the following structures.
290 263 */
291 264 struct _cw87 {
292 265 unsigned
293 266 mask: 6, /* exception masks */
294 267 res1: 2, /* not used */
295 268 prec: 2, /* precision control field */
296 269 rnd: 2, /* rounding control field */
297 270 inf: 1, /* infinity control (not on 387) */
298 271 res2: 3; /* not used */
299 272 };
300 273
301 274 struct _sw87 {
302 275 unsigned
303 276 excp: 6, /* exception sticky bits */
304 277 res1: 1, /* not used */
305 278 errs: 1, /* error summary-set if unmasked excp */
306 279 c012: 3, /* condition code bits 0..2 */
307 280 stkt: 3, /* stack top pointer */
308 281 c3: 1, /* condition code bit 3 */
309 282 busy: 1; /* coprocessor busy */
310 283 };
311 284
312 285 struct _mxcsr {
313 286 unsigned
314 287 excp: 6, /* exception sticky bits */
315 288 daz: 1, /* denormals are zeroes */
316 289 mask: 6, /* exception masks */
317 290 rnd: 2, /* rounding control */
318 291 fzero: 1; /* flush to zero */
319 292 };
320 293
321 294 #endif
322 295
323 296 #ifdef __cplusplus
324 297 }
325 298 #endif
326 299
327 300 #endif /* _IEEEFP_H */
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