735 ld [%sp+0x44],%f0 736 set 0xffffffff,%o0 737 st %o0,[%sp+0x44] 738 ld [%sp+0x44],%f1 739 .end 740 741 .inline __quiet_nanf,0 742 set 0x7fffffff,%o0 743 st %o0,[%sp+0x44] 744 ld [%sp+0x44],%f0 745 .end 746 747 .inline __r_quiet_nan_,0 748 set 0x7fffffff,%o0 749 st %o0,[%sp+0x44] 750 ld [%sp+0x44],%f0 751 .end 752 753 .inline __swapEX,1 754 and %o0,0x1f,%o1 755 sll %o1,5,%o1 ! input to aexc bit location 756 .volatile 757 st %fsr,[%sp+0x44] 758 ld [%sp+0x44],%o0 ! o0 = fsr 759 andn %o0,0x3e0,%o2 760 or %o1,%o2,%o1 ! o1 = new fsr 761 st %o1,[%sp+0x44] 762 ld [%sp+0x44],%fsr 763 srl %o0,5,%o0 764 and %o0,0x1f,%o0 765 .nonvolatile 766 .end 767 768 .inline _QgetRD,0 769 st %fsr,[%sp+0x44] 770 ld [%sp+0x44],%o0 ! o0 = fsr 771 srl %o0,30,%o0 ! return __round control value 772 .end 773 774 .inline _QgetRP,0 775 or %g0,%g0,%o0 776 .end 777 778 .inline __swapRD,1 779 and %o0,0x3,%o0 780 sll %o0,30,%o1 ! input to RD bit location 781 .volatile 782 st %fsr,[%sp+0x44] 783 ld [%sp+0x44],%o0 ! o0 = fsr 784 set 0xc0000000,%o4 ! mask of rounding direction bits 785 andn %o0,%o4,%o2 786 or %o1,%o2,%o1 ! o1 = new fsr 787 st %o1,[%sp+0x44] 788 ld [%sp+0x44],%fsr 789 srl %o0,30,%o0 790 and %o0,0x3,%o0 791 .nonvolatile 792 .end 793 ! 794 ! On the SPARC, __swapRP is a no-op; always return 0 for backward compatibility 795 ! 796 797 .inline __swapRP,1 798 or %g0,%g0,%o0 799 .end 800 801 .inline __swapTE,1 802 and %o0,0x1f,%o0 803 sll %o0,23,%o1 ! input to TEM bit location 804 .volatile 805 st %fsr,[%sp+0x44] 806 ld [%sp+0x44],%o0 ! o0 = fsr 807 set 0x0f800000,%o4 ! mask of TEM (Trap Enable Mode bits) 808 andn %o0,%o4,%o2 809 or %o1,%o2,%o1 ! o1 = new fsr 810 st %o1,[%sp+0x48] 811 ld [%sp+0x48],%fsr 812 srl %o0,23,%o0 813 and %o0,0x1f,%o0 814 .nonvolatile 815 .end 816 817 .inline __fp_class,2 818 sethi %hi(0x80000000),%o2 ! o2 gets 80000000 819 andn %o0,%o2,%o0 ! o0-o1 gets abs(x) 820 orcc %o0,%o1,%g0 ! set cc as x is zero/nonzero 821 bne 1f ! branch if x is nonzero 822 nop 823 mov 0,%o0 | 735 ld [%sp+0x44],%f0 736 set 0xffffffff,%o0 737 st %o0,[%sp+0x44] 738 ld [%sp+0x44],%f1 739 .end 740 741 .inline __quiet_nanf,0 742 set 0x7fffffff,%o0 743 st %o0,[%sp+0x44] 744 ld [%sp+0x44],%f0 745 .end 746 747 .inline __r_quiet_nan_,0 748 set 0x7fffffff,%o0 749 st %o0,[%sp+0x44] 750 ld [%sp+0x44],%f0 751 .end 752 753 .inline __swapEX,1 754 and %o0,0x1f,%o1 755 sll %o1,5,%o1 ! shift input to aexc bit location 756 .volatile 757 st %fsr,[%sp+0x44] 758 ld [%sp+0x44],%o0 ! o0 = fsr 759 andn %o0,0x3e0,%o2 760 or %o1,%o2,%o1 ! o1 = new fsr 761 st %o1,[%sp+0x44] 762 ld [%sp+0x44],%fsr 763 srl %o0,5,%o0 764 and %o0,0x1f,%o0 765 .nonvolatile 766 .end 767 768 .inline _QgetRD,0 769 st %fsr,[%sp+0x44] 770 ld [%sp+0x44],%o0 ! o0 = fsr 771 srl %o0,30,%o0 ! return __round control value 772 .end 773 774 .inline _QgetRP,0 775 or %g0,%g0,%o0 776 .end 777 778 .inline __swapRD,1 779 and %o0,0x3,%o0 780 sll %o0,30,%o1 ! shift input to RD bit location 781 .volatile 782 st %fsr,[%sp+0x44] 783 ld [%sp+0x44],%o0 ! o0 = fsr 784 set 0xc0000000,%o4 ! mask of rounding direction bits 785 andn %o0,%o4,%o2 786 or %o1,%o2,%o1 ! o1 = new fsr 787 st %o1,[%sp+0x44] 788 ld [%sp+0x44],%fsr 789 srl %o0,30,%o0 790 and %o0,0x3,%o0 791 .nonvolatile 792 .end 793 ! 794 ! On the SPARC, __swapRP is a no-op; always return 0 for backward compatibility 795 ! 796 797 .inline __swapRP,1 798 or %g0,%g0,%o0 799 .end 800 801 .inline __swapTE,1 802 and %o0,0x1f,%o0 803 sll %o0,23,%o1 ! shift input to TEM bit location 804 .volatile 805 st %fsr,[%sp+0x44] 806 ld [%sp+0x44],%o0 ! o0 = fsr 807 set 0x0f800000,%o4 ! mask of TEM (Trap Enable Mode bits) 808 andn %o0,%o4,%o2 809 or %o1,%o2,%o1 ! o1 = new fsr 810 st %o1,[%sp+0x48] 811 ld [%sp+0x48],%fsr 812 srl %o0,23,%o0 813 and %o0,0x1f,%o0 814 .nonvolatile 815 .end 816 817 .inline __fp_class,2 818 sethi %hi(0x80000000),%o2 ! o2 gets 80000000 819 andn %o0,%o2,%o0 ! o0-o1 gets abs(x) 820 orcc %o0,%o1,%g0 ! set cc as x is zero/nonzero 821 bne 1f ! branch if x is nonzero 822 nop 823 mov 0,%o0 |