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3217 cfgadm should spell "adaptors" correctly
Reviewed by: Alexander Eremin <alexander.r.eremin@gmail.com>
Reviewed by: David Hoeppner <0xffea@gmail.com>
Reviewed by: Gary Mills <gary_mills@fastmail.fm>
Reviewed by: Eric Schrock <Eric.Schrock@delphix.com>


1256 
1257         tmp = ipw2100_csr_get32(sc, IPW2100_CSR_RST);
1258         ipw2100_csr_put32(sc, IPW2100_CSR_RST,
1259             tmp | IPW2100_RST_PRINCETON_RESET);
1260 
1261         sc->sc_flags &= ~IPW2100_FLAG_FW_INITED;
1262 }
1263 
1264 /*
1265  * all ipw2100 interrupts will be masked by this routine
1266  */
1267 static int
1268 ipw2100_chip_reset(struct ipw2100_softc *sc)
1269 {
1270         int             ntries;
1271         uint32_t        tmp;
1272 
1273         ipw2100_master_stop(sc);
1274 
1275         /*
1276          * move adatper to DO state
1277          */
1278         tmp = ipw2100_csr_get32(sc, IPW2100_CSR_CTL);
1279         ipw2100_csr_put32(sc, IPW2100_CSR_CTL, tmp | IPW2100_CTL_INIT);
1280 
1281         /*
1282          * wait for clock stabilization
1283          */
1284         for (ntries = 0; ntries < 1000; ntries++) {
1285                 if (ipw2100_csr_get32(sc, IPW2100_CSR_CTL)
1286                     & IPW2100_CTL_CLOCK_READY)
1287                         break;
1288                 drv_usecwait(200);
1289         }
1290         if (ntries == 1000)
1291                 return (DDI_FAILURE);
1292 
1293         tmp = ipw2100_csr_get32(sc, IPW2100_CSR_RST);
1294         ipw2100_csr_put32(sc, IPW2100_CSR_RST, tmp | IPW2100_RST_SW_RESET);
1295 
1296         drv_usecwait(10);




1256 
1257         tmp = ipw2100_csr_get32(sc, IPW2100_CSR_RST);
1258         ipw2100_csr_put32(sc, IPW2100_CSR_RST,
1259             tmp | IPW2100_RST_PRINCETON_RESET);
1260 
1261         sc->sc_flags &= ~IPW2100_FLAG_FW_INITED;
1262 }
1263 
1264 /*
1265  * all ipw2100 interrupts will be masked by this routine
1266  */
1267 static int
1268 ipw2100_chip_reset(struct ipw2100_softc *sc)
1269 {
1270         int             ntries;
1271         uint32_t        tmp;
1272 
1273         ipw2100_master_stop(sc);
1274 
1275         /*
1276          * move adapter to DO state
1277          */
1278         tmp = ipw2100_csr_get32(sc, IPW2100_CSR_CTL);
1279         ipw2100_csr_put32(sc, IPW2100_CSR_CTL, tmp | IPW2100_CTL_INIT);
1280 
1281         /*
1282          * wait for clock stabilization
1283          */
1284         for (ntries = 0; ntries < 1000; ntries++) {
1285                 if (ipw2100_csr_get32(sc, IPW2100_CSR_CTL)
1286                     & IPW2100_CTL_CLOCK_READY)
1287                         break;
1288                 drv_usecwait(200);
1289         }
1290         if (ntries == 1000)
1291                 return (DDI_FAILURE);
1292 
1293         tmp = ipw2100_csr_get32(sc, IPW2100_CSR_RST);
1294         ipw2100_csr_put32(sc, IPW2100_CSR_RST, tmp | IPW2100_RST_SW_RESET);
1295 
1296         drv_usecwait(10);