7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22 /*
23 * Copyright (c) 1999-2000 by Sun Microsystems, Inc.
24 * All rights reserved.
25 */
26
27 #pragma ident "%Z%%M% %I% %E% SMI"
28
29 /*
30 * hci1394_extern.c
31 * Central location for externs. There are two exceptions to this,
32 * hci1394_statep (located in hci1394.c) and hci1394_evts (located in
33 * hci1394_s1394if.c).
34 */
35
36 #include <sys/conf.h>
37 #include <sys/ddi.h>
38 #include <sys/modctl.h>
39 #include <sys/stat.h>
40
41 #include <sys/1394/h1394.h>
42
43 #include <sys/1394/adapters/hci1394.h>
44
45
46
47 /*
48 * The 1394 bus ticks are in 125uS increments. split_timeout is represented in
49 * 1394 bus ticks. 800 bus ticks is 100mS.
50 */
51 uint32_t hci1394_split_timeout = 800;
52
53
54 /*
55 * 1394 address map for OpenHCI adpaters.
56 *
57 * This is what is reported to the services layer. The hci1394 driver does not
58 * modify the HW to reflect this. This should reflect what the OpenHCI 1.0 HW
59 * is set to. The comments below give the actual address ranges where the
60 * actual structure has the format of - start address, size, type.
61 *
62 * physical => 0x0000000000000000 - 0x00000000FFFFFFFF
63 * posted write => 0x0000000100000000 - 0x0000FFFEFFFFFFFF
64 * normal => 0x0000FFFF00000000 - 0x0000FFFFEFFFFFFF
65 * csr => 0x0000FFFFF0000000 - 0x0000FFFFFFFFFFFF
66 */
67 h1394_addr_map_t hci1394_addr_map[HCI1394_ADDR_MAP_SIZE] = {
68 {0x0000000000000000, 0x0000000100000000, H1394_ADDR_PHYSICAL},
69 {0x0000000100000000, 0x0000FFFE00000000, H1394_ADDR_POSTED_WRITE},
70 {0x0000FFFF00000000, 0x00000000F0000000, H1394_ADDR_NORMAL},
71 {0x0000FFFFF0000000, 0x0000000010000000, H1394_ADDR_CSR}
72 };
73
74
75 /* Max number of uS to wait for phy reads & writes to finish */
|
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22 /*
23 * Copyright (c) 1999-2000 by Sun Microsystems, Inc.
24 * All rights reserved.
25 */
26
27 /*
28 * hci1394_extern.c
29 * Central location for externs. There are two exceptions to this,
30 * hci1394_statep (located in hci1394.c) and hci1394_evts (located in
31 * hci1394_s1394if.c).
32 */
33
34 #include <sys/conf.h>
35 #include <sys/ddi.h>
36 #include <sys/modctl.h>
37 #include <sys/stat.h>
38
39 #include <sys/1394/h1394.h>
40
41 #include <sys/1394/adapters/hci1394.h>
42
43
44
45 /*
46 * The 1394 bus ticks are in 125uS increments. split_timeout is represented in
47 * 1394 bus ticks. 800 bus ticks is 100mS.
48 */
49 uint32_t hci1394_split_timeout = 800;
50
51
52 /*
53 * 1394 address map for OpenHCI adapters.
54 *
55 * This is what is reported to the services layer. The hci1394 driver does not
56 * modify the HW to reflect this. This should reflect what the OpenHCI 1.0 HW
57 * is set to. The comments below give the actual address ranges where the
58 * actual structure has the format of - start address, size, type.
59 *
60 * physical => 0x0000000000000000 - 0x00000000FFFFFFFF
61 * posted write => 0x0000000100000000 - 0x0000FFFEFFFFFFFF
62 * normal => 0x0000FFFF00000000 - 0x0000FFFFEFFFFFFF
63 * csr => 0x0000FFFFF0000000 - 0x0000FFFFFFFFFFFF
64 */
65 h1394_addr_map_t hci1394_addr_map[HCI1394_ADDR_MAP_SIZE] = {
66 {0x0000000000000000, 0x0000000100000000, H1394_ADDR_PHYSICAL},
67 {0x0000000100000000, 0x0000FFFE00000000, H1394_ADDR_POSTED_WRITE},
68 {0x0000FFFF00000000, 0x00000000F0000000, H1394_ADDR_NORMAL},
69 {0x0000FFFFF0000000, 0x0000000010000000, H1394_ADDR_CSR}
70 };
71
72
73 /* Max number of uS to wait for phy reads & writes to finish */
|