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6064 ixgbe needs X550 support


   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
  24  */
  25 
  26 /*
  27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  28  * Copyright 2012 Nexenta Systems, Inc. All rights reserved.

  29  */
  30 
  31 #include "ixgbe_sw.h"
  32 
  33 static int ixgbe_tx_copy(ixgbe_tx_ring_t *, tx_control_block_t *, mblk_t *,
  34     uint32_t, boolean_t);
  35 static int ixgbe_tx_bind(ixgbe_tx_ring_t *, tx_control_block_t *, mblk_t *,
  36     uint32_t);
  37 static int ixgbe_tx_fill_ring(ixgbe_tx_ring_t *, link_list_t *,
  38     ixgbe_tx_context_t *, size_t);
  39 static void ixgbe_save_desc(tx_control_block_t *, uint64_t, size_t);
  40 static tx_control_block_t *ixgbe_get_free_list(ixgbe_tx_ring_t *);
  41 
  42 static int ixgbe_get_context(mblk_t *, ixgbe_tx_context_t *);
  43 static boolean_t ixgbe_check_context(ixgbe_tx_ring_t *,
  44     ixgbe_tx_context_t *);
  45 static void ixgbe_fill_context(struct ixgbe_adv_tx_context_desc *,
  46     ixgbe_tx_context_t *);
  47 
  48 #ifndef IXGBE_DEBUG


1064                 ASSERT(tx_ring->work_list[tcb_index] == NULL);
1065                 tx_ring->work_list[tcb_index] = tcb;
1066 
1067                 tcb_index = index;
1068                 tcb = (tx_control_block_t *)LIST_POP_HEAD(pending_list);
1069         }
1070 
1071         if (load_context) {
1072                 /*
1073                  * Count the context descriptor for
1074                  * the first tx control block.
1075                  */
1076                 first_tcb->desc_num++;
1077         }
1078         first_tcb->last_index = PREV_INDEX(index, 1, tx_ring->ring_size);
1079 
1080         /*
1081          * The Insert Ethernet CRC (IFCS) bit and the checksum fields are only
1082          * valid in the first descriptor of the packet.
1083          * Setting paylen in every first_tbd for all parts.
1084          * 82599 and X540 require the packet length in paylen field with or
1085          * without LSO and 82598 will ignore it in non-LSO mode.
1086          */
1087         ASSERT(first_tbd != NULL);
1088         first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS;
1089 
1090         switch (hw->mac.type) {
1091         case ixgbe_mac_82598EB:
1092                 if (ctx != NULL && ctx->lso_flag) {
1093                         first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
1094                         first_tbd->read.olinfo_status |=
1095                             (mbsize - ctx->mac_hdr_len - ctx->ip_hdr_len
1096                             - ctx->l4_hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT;
1097                 }
1098                 break;
1099 
1100         case ixgbe_mac_82599EB:
1101         case ixgbe_mac_X540:


1102                 if (ctx != NULL && ctx->lso_flag) {
1103                         first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
1104                         first_tbd->read.olinfo_status |=
1105                             (mbsize - ctx->mac_hdr_len - ctx->ip_hdr_len
1106                             - ctx->l4_hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT;
1107                 } else {
1108                         first_tbd->read.olinfo_status |=
1109                             (mbsize << IXGBE_ADVTXD_PAYLEN_SHIFT);
1110                 }
1111                 break;
1112 
1113         default:
1114                 break;
1115         }
1116 
1117         /* Set hardware checksum bits */
1118         if (hcksum_flags != 0) {
1119                 if (hcksum_flags & HCK_IPV4_HDRCKSUM)
1120                         first_tbd->read.olinfo_status |=
1121                             IXGBE_ADVTXD_POPTS_IXSM;




   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 
  22 /*
  23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
  24  */
  25 
  26 /*
  27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  28  * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
  29  * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
  30  */
  31 
  32 #include "ixgbe_sw.h"
  33 
  34 static int ixgbe_tx_copy(ixgbe_tx_ring_t *, tx_control_block_t *, mblk_t *,
  35     uint32_t, boolean_t);
  36 static int ixgbe_tx_bind(ixgbe_tx_ring_t *, tx_control_block_t *, mblk_t *,
  37     uint32_t);
  38 static int ixgbe_tx_fill_ring(ixgbe_tx_ring_t *, link_list_t *,
  39     ixgbe_tx_context_t *, size_t);
  40 static void ixgbe_save_desc(tx_control_block_t *, uint64_t, size_t);
  41 static tx_control_block_t *ixgbe_get_free_list(ixgbe_tx_ring_t *);
  42 
  43 static int ixgbe_get_context(mblk_t *, ixgbe_tx_context_t *);
  44 static boolean_t ixgbe_check_context(ixgbe_tx_ring_t *,
  45     ixgbe_tx_context_t *);
  46 static void ixgbe_fill_context(struct ixgbe_adv_tx_context_desc *,
  47     ixgbe_tx_context_t *);
  48 
  49 #ifndef IXGBE_DEBUG


1065                 ASSERT(tx_ring->work_list[tcb_index] == NULL);
1066                 tx_ring->work_list[tcb_index] = tcb;
1067 
1068                 tcb_index = index;
1069                 tcb = (tx_control_block_t *)LIST_POP_HEAD(pending_list);
1070         }
1071 
1072         if (load_context) {
1073                 /*
1074                  * Count the context descriptor for
1075                  * the first tx control block.
1076                  */
1077                 first_tcb->desc_num++;
1078         }
1079         first_tcb->last_index = PREV_INDEX(index, 1, tx_ring->ring_size);
1080 
1081         /*
1082          * The Insert Ethernet CRC (IFCS) bit and the checksum fields are only
1083          * valid in the first descriptor of the packet.
1084          * Setting paylen in every first_tbd for all parts.
1085          * 82599, X540 and X550 require the packet length in paylen field
1086          * with or without LSO and 82598 will ignore it in non-LSO mode.
1087          */
1088         ASSERT(first_tbd != NULL);
1089         first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS;
1090 
1091         switch (hw->mac.type) {
1092         case ixgbe_mac_82598EB:
1093                 if (ctx != NULL && ctx->lso_flag) {
1094                         first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
1095                         first_tbd->read.olinfo_status |=
1096                             (mbsize - ctx->mac_hdr_len - ctx->ip_hdr_len
1097                             - ctx->l4_hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT;
1098                 }
1099                 break;
1100 
1101         case ixgbe_mac_82599EB:
1102         case ixgbe_mac_X540:
1103         case ixgbe_mac_X550:
1104         case ixgbe_mac_X550EM_x:
1105                 if (ctx != NULL && ctx->lso_flag) {
1106                         first_tbd->read.cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
1107                         first_tbd->read.olinfo_status |=
1108                             (mbsize - ctx->mac_hdr_len - ctx->ip_hdr_len
1109                             - ctx->l4_hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT;
1110                 } else {
1111                         first_tbd->read.olinfo_status |=
1112                             (mbsize << IXGBE_ADVTXD_PAYLEN_SHIFT);
1113                 }
1114                 break;
1115 
1116         default:
1117                 break;
1118         }
1119 
1120         /* Set hardware checksum bits */
1121         if (hcksum_flags != 0) {
1122                 if (hcksum_flags & HCK_IPV4_HDRCKSUM)
1123                         first_tbd->read.olinfo_status |=
1124                             IXGBE_ADVTXD_POPTS_IXSM;